From 06e963e6060b2359612360bf1307620e156a5a37 Mon Sep 17 00:00:00 2001 From: Nico Schottelius Date: Mon, 12 Aug 2019 17:36:43 +0200 Subject: [PATCH] Adding logs from plan.org --- doc/Background.tex | 5 +- doc/Conclusion.tex | 63 +++++++++++++++- doc/Design.tex | 1 + doc/Results.tex | 22 +++++- doc/appendix.tex | 175 +++++++++++++++++++++++++++++++++++++++++++++ doc/plan.org | 61 ++++++++-------- 6 files changed, 291 insertions(+), 36 deletions(-) diff --git a/doc/Background.tex b/doc/Background.tex index 60c0c4a..6b0eb22 100644 --- a/doc/Background.tex +++ b/doc/Background.tex @@ -103,10 +103,13 @@ the two protocols for this thesis are: \label{fig:ipv4header} \end{figure} % ---------------------------------------------------------------------- -\section{\label{background:arpndp}ARP and NDP - FIXME} +\section{\label{background:arpndp}ARP and NDP, ICMP ICMP6- FIXME} Required for finding host. ARP who has NDP similar -- add traces here + +being able to answer to error messages +MTU / pmtu % ---------------------------------------------------------------------- \section{\label{background:transition}IPv6 Translation Mechanisms} While in this thesis the focus was in NAT64 as a translation mechanism, diff --git a/doc/Conclusion.tex b/doc/Conclusion.tex index 109ea34..b47d550 100644 --- a/doc/Conclusion.tex +++ b/doc/Conclusion.tex @@ -14,7 +14,7 @@ Many misleading \section{\label{conclusion:bmv2}BMV2} -maybe remove + \section{\label{conclusion:P4}P4} @@ -39,6 +39,18 @@ ternary matching. switch cannot be used in actions +if things don't work, often a checksum problem. + +if frame checksum, then length of packet is broken + +\begin{verbatim} +p4c --target bmv2 --arch v1model --std p4-16 "../p4src/static-mapping.p4" -o "/home/p4/master-thesis/p4src" +../p4src/static-mapping.p4(366): error: Program is not supported by this target, because table MyIngress.v6_networks has multiple successors + table v6_networks { + ^^^^^^^^^^^ + +\end{verbatim} + \begin{verbatim} ipaddress.ip_network("2001:db8:61::/64") IPv6Network(u'3230:3031:3a64:6238:3a36:313a:3a2f:3634/128') @@ -59,6 +71,8 @@ Hitting expression bug \section{\label{conclusion:netpfga}NetFGPA - all HERE} personal note here +MTU limitations: 1500 according to a private mail from Salvator Galea +cambridge / uk long compile process error prone compile process @@ -69,6 +83,29 @@ Vivado SDNET xx k lines of supporting code +Vivado installation: silent errors, infinite loop, missing libncurses5 + +82k lines of code that are interdependent +Many non critical error messages on the way +Zero exit fatal errors + +missing / spreaded documentation + +tcpdump on local nfX doesn't work -> can only debug on other endpoint + + +First card: Writing tables fails +hardware debug shows some errors +but hardware debug on correct card also shows some error +Debug ioctl errors when writing table entries + + +Output all ports -> port mapping documented only in a testdata script + + +hwtest: Execution fails due to missing djtgcfg + + no payload accessq Many workarounds @@ -91,6 +128,11 @@ Renaming VARIABLES in the definition of Reproducibility: +hours for finding right output ports + +packet size / annotation + + \section{\label{conclusion:realworld}Real world applications} Can be deployed using the netpfga. Or Barefoot or Arista. @@ -106,7 +148,24 @@ Different HW Speed only limited to line speed. Could be running at 100 Gbit/s without modifications. -\section{todo} +PMTU +handling error cases + +Our algorithm uses the IPv4-Compatible IPv6 Address\cite{rfc4291} to +embed IPv4 addresses. However RFC6052\cite{rfc6052} defines different +embeddings depending on the prefix size. A future version should +support these schemes to be compatible to other implementations. + +No fragmentation +No address / mac learning + +\section{\label{conclusion:closing}Closing words (NAME?)} +While the port to NetPFGA was significantly more effort then expected, +the learnings of the different layers were very much appreciated / liked + +It was a + +\section{todo - FIXME: remove} \begin{verbatim} ***** Summary eher kurz ***** Outlook als subsection! diff --git a/doc/Design.tex b/doc/Design.tex index 30bca96..e2eac05 100644 --- a/doc/Design.tex +++ b/doc/Design.tex @@ -147,3 +147,4 @@ not the full headers are used, but the pseudo headers (compare figures \ref{fig:ipv6pseudoheader} and \ref{fig:ipv4pseudoheader}). To compensate the carry bit, our code uses 17 bit integers for correcting the carry. +% FIXME: add note to python script / checksum diffing diff --git a/doc/Results.tex b/doc/Results.tex index 5c39d6a..624261b 100644 --- a/doc/Results.tex +++ b/doc/Results.tex @@ -12,7 +12,7 @@ NetFPGA: capabale of line speed Nat64, focused port on nat64 \section{\label{Results:BMV2}BMV2} Responds to icmp, icmp6 -ndp +ndp \cite{rfc4861} arp test framework openvswitch @@ -20,6 +20,14 @@ test framework openvswitch Fully functional host Can compute checksums on its own. +focus on typical use cases of icmp, icmp6, the software implementation +supports translating echo request and echo reply messages, but does +not support all ICMP/ICMP6 translations that are defined in +RFC6145\cite{rfc6145}. + +Stateful : no automatic removal + + \section{\label{results:tayga}Tayga} 3gbit @@ -41,7 +49,17 @@ General result: limited NAT64 is working, however \section{\label{results:softwarenat64}NAT64 in Software} Tayga, Jool -\section{todo} +\section{\label{results:features}Feature comparison} + +speed - sessions - eamt +can act as host +lpm tables +ping +ping6 support +ndp +controller support + +\section{todo - FIXME: remove} \begin{verbatim} ***** Dorth eher detailiertes Drawing diff --git a/doc/appendix.tex b/doc/appendix.tex index b91de4d..b0ff702 100644 --- a/doc/appendix.tex +++ b/doc/appendix.tex @@ -1497,6 +1497,181 @@ root@ESPRIMO-P956:~# \chapter{\label{bufferssssss}Buffer} +\section{NetFPGA compile errors} + +- infinite loop in installer + +\begin{verbatim} +# Fix introduced for SDNet 2017.4 +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +# Fix introduced for SDNet 2018.2 +sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp: cannot stat 'src/*.tbl': No such file or directory +make: *** [Makefile:23: cpp_test] Error 1 +[23:12] loch:minip4% + +\end{verbatim} + +\begin{verbatim} + ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. + ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... +\end{verbatim} + +\begin{verbatim} +/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang -fPIC -c -std=gnu89 -nobuiltininc -nostdinc++ -w -Wl,--unres +olved-symbols=ignore-in-object-files -fbracket-depth=1048576 -I/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/../li +b/clang/3.1/include -fPIC -m64 -I"/opt/Xilinx/Vivado/2018.2/data/xsim/include" "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/ob +j/xsim_3.c" -O0 -sim -o "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.lnx64.o" -DXILINX_SIMULATOR +/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang: error while loading shared libraries: libncurses.so.5: cannot + open shared object file: No such file or directory +ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. +ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... +[20:00] rainbow:SimpleSumeSwitch% + +\end{verbatim} + +\begin{verbatim} +# Fix introduced for SDNet 2018.2 +sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp: cannot stat 'testdata/*.txt': No such file or directory +make: *** [Makefile:17: all] Error 1 +[15:46] rainbow:minip4% + +\end{verbatim} + +\begin{verbatim} +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +Traceback (most recent call last): + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi", line 108, in + write_to_file(args.file_pcap, args.output) + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi", line 88, in write_to_file + for pkt in rdpcap(file_in): + File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 728, in rdpcap + with PcapReader(filename) as fdesc: + File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 751, in __call__ + filename, fdesc, magic = cls.open(filename) + File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 778, in open + fdesc = open(filename, "rb") +IOError: [Errno 2] No such file or directory: 'src.pcap' +make[1]: *** [Makefile:5: all] Error 1 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +make: *** [Makefile:32: frontend] Error 2 +[15:47] rainbow:minip4% + +\end{verbatim} + +\begin{verbatim} +update_compile_order: Time (s): cpu = 00:00:17 ; elapsed = 00:00:09 . Memory (MB): peak = 1995.594 ; gain = 0.016 ; free physic +al = 21975 ; free virtual = 33161 +loading libsume.. +Traceback (most recent call last): + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de +fault/run.py", line 42, in + import config_writes + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de +fault/config_writes.py", line 7 + + ^ +IndentationError: expected an indented block + while executing +"exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py" + invoked from within +"set output [exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py]" + (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_s +ume_switch_sim.tcl" line 177) +INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:21:21 2019... + + +\end{verbatim} + +\begin{verbatim} +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.log': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_expect.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.axi': No such file or directory +=== Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] +\end{verbatim} + +\begin{verbatim} +# add_wave $nf_sume_sdnet_ip/out_src_port +# add_wave $nf_sume_sdnet_ip/out_dst_port +# set const_reg_ip /top_tb/top_sim/nf_datapath_0/nf_sume_sdnet_wrapper_1/inst/SimpleSumeSwitch_inst/const_reg_rw_0/ +# add_wave_divider {const reg extern signals} +# add_wave $const_reg_ip +ERROR: [Wavedata 42-471] Note: Nothing was found for the following items: /top_tb/top_sim/nf_datapath_0/nf_sume_sdnet_wrapper_1/inst/SimpleSumeSwitch_inst/const_reg_rw_0/ +ERROR: [Common 17-39] 'add_wave' failed due to earlier errors. + + while executing +"add_wave $const_reg_ip " + (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_sume_switch_sim.tcl" line 328) +INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:31:59 2019... +make: *** [Makefile:121: sim] Error 1 +make: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test' +512 +=== Work directory is /tmp/nico/test/simple_sume_switch +=== Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory +=== Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] +[15:31] rainbow:P4-NetFPGA% +\end{verbatim} + +\begin{verbatim} + # open_run impl_1 + ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open + Vivado% +\end{verbatim} + +\begin{verbatim} +ERROR: [BD 41-171] The modes of the interface pins 'cfg_interrupt'(Slave) and 'pcie3_cfg_interrupt'(Slave) are incompatible. They cannot be connected. +ERROR: [BD 5-3] Error: running connect_bd_intf_net. +ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. + + while executing +"connect_bd_intf_net -intf_net nf_riffa_dma_1_pcie3_cfg_interrupt [get_bd_intf_pins nf_riffa_dma_1/cfg_interrupt] [get_bd_intf_pins pcie3_7x_1/pcie3_cf..." + (procedure "create_hier_cell_dma_sub" line 141) + invoked from within +"create_hier_cell_dma_sub [current_bd_instance .] dma_sub" + (procedure "create_root_design" line 68) + invoked from within +"create_root_design """ + (file "./tcl/control_sub.tcl" line 729) + + while executing +"source ./tcl/control_sub.tcl" + (file "tcl/simple_sume_switch.tcl" line 89) + +\end{verbatim} + +\section{Traces} + +Proof of stuff working, reference for each stage / feature + Stuff that needs to be cleaned up \section{Introduction} diff --git a/doc/plan.org b/doc/plan.org index 7e696c0..d462e00 100644 --- a/doc/plan.org +++ b/doc/plan.org @@ -1,4 +1,5 @@ -* Time table / log +* DONE Time table / log + CLOSED: [2019-08-12 Mon 17:01] | When? | What? | Notes | | 2019-02-21 | Kick-Off | x | | | Finish all admin points | x | @@ -244,14 +245,14 @@ | | * RFC4291 IPv4-Mapped IPv6 Address (16 1s) | | | | | | | | - Session handling | | -| | * RFC6145: Translation ip/icmp, obsoleted by RFC 7915 | | +| | * RFC6145: Translation ip/icmp, obsoleted by RFC 7915 | x | | | * RFC6146: NAT64 definition, only TCP, UDP, and ICMP traffic | | | | * RFC6052: embedding support | | | | * Mode: IPv6 outgoing -> "masquarading" | | | | * Mode: IPv4 | | | | | | | | - Translation details | | -| | * How to handle ICMP4->icmp6 correctly (RFC7915) | | +| | * How to handle ICMP4->icmp6 correctly (RFC7915) | x | | | | | | | - Hardware | | | | * NetFPGA | | @@ -266,7 +267,7 @@ | | | | | | | | | | Meeting notes | | -| | - difference based | | +| | - difference based | x | | | - first physical access | | | | - tofino: if it compiles -> line rate | | | | - chaining switches / OS -> single port rate | | @@ -294,21 +295,21 @@ | | Bidirectional support | | | | Will need IPv6 embedding suport https://tools.ietf.org/html/rfc6052 | | | | | | -| 2019-04-18 | NAT64 prefix based IPv6->IPv4 conversion [tayga] | | +| 2019-04-18 | NAT64 prefix based IPv6->IPv4 conversion [tayga] | x | | | Use case: IPv6 hosts send to specific /96 | | | | | | -| 2019-05-23 | NAT64 dynamic pool implementation: n:1 ipv6 to ipv4 mapping | | -| | And n:1 stateful mappings https://www.jool.mx/en/run-nat64.html | | -| | Needs active controller | | -| | Needs timeout / leases | | +| 2019-05-23 | NAT64 dynamic pool implementation: n:1 ipv6 to ipv4 mapping | x | +| | And n:1 stateful mappings https://www.jool.mx/en/run-nat64.html | x | +| | Needs active controller | x | +| | Needs timeout / leases | x | | | Might work w/ registers | | | | | | | 2019-06-16 | | | | | Laurent meeting | | | | | | -| | - Vivado installation: silent errors, infinite loop, missing libncurses5 | | +| | - Vivado installation: silent errors, infinite loop, missing libncurses5 | x | | | | | -| | - Compiling netfpga: 82k lines of code that are interdependent | | +| | - Compiling netfpga: 82k lines of code that are interdependent | x | | | - Many non critical error messages on the way | | | | - Zero exit fatal errors | | | | | | @@ -324,28 +325,28 @@ | | | | | | - HW test | | | | * compiling for 3 days | | -| | * Execution fails due to missing djtgcfg | | +| | * Execution fails due to missing djtgcfg | x | | | | | | | Payload to control plane | | -| | - digest not possible due to missing | | +| | - digest not possible due to missing content | | | | - might work with working | | | | | | | | Next steps: | | -| | - Debug ioctl errors when writing table entries | | +| | - Debug ioctl errors when writing table entries | x | | | | | -| | - Understand HDL or PX user engines for writing checksum part | | +| | - Understand HDL or PX user engines for writing checksum part | x | | | - Adjust controller to digest | | | | | | | | HDL notes | | | | - cycle limitations | | -| | - variable length might be a problem | | +| | - variable length might be a problem | x | | | | | | | Next steps after discussion: | | | | | | | | - checkout ipv6 test on netpfga / modify v6 packet | | -| | - checkout whether diff is possible on checksum -> see ttl | | +| | - checkout whether diff is possible on checksum -> see ttl | x | | | - checkout externs of Hendrik / report | | -| | - Asses checksum difficulty | | +| | - Asses checksum difficulty | x | | | | | | | Handing in thesis: | | | | | | @@ -371,9 +372,9 @@ | | - overflow (delta > payload) handling unclear | | | | | | | | Netpfga | | -| | - Old one had several failure messages (one in DDR area) | | -| | - New one: tables can be written | | -| | - Need 3 ports: v4, v6, management | | +| | - Old one had several failure messages (one in DDR area) | x | +| | - New one: tables can be written | x | +| | - Need 3 ports: v4, v6, management | x | | | | | | | Next steps: | | | | - Test checksums delta on software switch | | @@ -390,17 +391,17 @@ | 2019-07-01 | | | | | Meeting Laurent | | | | | | -| | - Diff'ing in python: | | +| | - Diff'ing in python: | x | | | * offsetting works | | | | * Need to adjust to actual translation code | | | | | | | | - Phasing in netpfga code / copy & compile & fix | | | | * Code structure w/o apply logic | | -| | * DIFF: Output port selection | | +| | * DIFF: Output port selection | x | | | * DIFF: Sending to CPU | | | | | | | | - Diff'ing in P4 | | -| | * IPv4 checksum is w/o payload | | +| | * IPv4 checksum is w/o payload | x | | | | | | | - Different generated output | | | | | | @@ -419,7 +420,7 @@ | | - Maybe compile to openvswitch | | | | | | | 2019-07-06 | | | -| | Test case for delta in P4/BMV2: | | +| | Test case for delta in P4/BMV2: | x | | | | | | | | | | | | | @@ -427,7 +428,7 @@ | 2019-07-11 | | | | | Meeting Laurent | | | | | | -| | - Delta diff in P4 from v4 -> v6: checksum working, off by one error | | +| | - Delta diff in P4 from v4 -> v6: checksum working, off by one error | x | | | -> assume overflow | | | | -> very likely | | | | | | @@ -443,7 +444,7 @@ | | https://github.com/jkitchin/org-ref | | | | | | | | | | -| 2019-07-25 | Benmarking results between P4, Jool, Tayga | | +| 2019-07-25 | Benmarking results between P4, Jool, Tayga | x | | | Real hardware of advantage | | | | | | | | | | @@ -604,7 +605,6 @@ DEBUG:main:cpu = > DEBUG:main:cpu = > DEBUG:main:o=>>> @@ -630,7 +630,6 @@ multicast address of the target address." ****** create a multicast group with an ID ****** associate the "node" with the multicast group ID **** If destination is within ff02::1:ff00:0/104, multicast - *** DONE Make switch answer icmp6 echo request for *** DONE Introduce mixed mode: switch: icmp6 echo reply, controller: NDP **** DONE try 1: reply seen, but checksum is incorrect @@ -1561,7 +1560,8 @@ Cannot find required executable simple_switch. Please make sure that it is installed and available in your $PATH: (/home/nico/vcs/master-thesis/support/virtualenv-with-site/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/home/nico/vcs/master-thesis/support/p4c/build/) (virtualenv-with-site) root@line:/home/nico/vcs/master-thesis/p4app# -** TODO Port to Hardware +** DONE Port to Hardware + CLOSED: [2019-08-12 Mon 17:29] *** NetPFGA documentation **** Port mapping | 1 | nf0 | @@ -1570,7 +1570,6 @@ Please make sure that it is installed and available in your $PATH: **** DONE Understand the simulations part -> not atm **** DONE Install vivado **** DONE Install SDNET - **** DONE fix license issue make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' echo ok