From 533ae3e080c67826de9041049970609bc0a28557 Mon Sep 17 00:00:00 2001 From: Nico Schottelius Date: Sat, 18 May 2019 15:33:21 +0200 Subject: [PATCH] ++ log netpfga --- doc/plan.org | 305 +++++++++++++++++++++++++++++++++++++++++++++- netpfga/README.md | 18 ++- 2 files changed, 321 insertions(+), 2 deletions(-) diff --git a/doc/plan.org b/doc/plan.org index 0271fd0..0f6707d 100644 --- a/doc/plan.org +++ b/doc/plan.org @@ -1416,12 +1416,315 @@ Please make sure that it is installed and available in your $PATH: *** DONE Get access to tofino: no, NDA issues *** TODO Get NetFPGA running **** TODO Understand the simulations part -**** TODO Install vivado +**** DONE Install vivado **** DONE Install SDNET **** TODO Create either HDL or PX for supporting payload checksum https://github.com/NetFPGA/P4-NetFPGA-public/issues/13 + https://github.com/NetFPGA/P4-NetFPGA-public/issues/13#issuecomment-490431016 ***** TODO Explore HDL ***** TODO Explore PX +**** DONE fix license issue +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' +echo ok +ok +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' +sdnet ./src/switch_calc.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + +Cannot obtain license +make: *** [Makefile:67: compile_no_cpp_test] Error 1 +nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ + +**** TODO Testing / compiling / uploading stuff to the NetPFGA -- + https://github.com/NetFPGA/P4-NetFPGA-public/wiki/Tutorial-Assignments +***** DONE try 1 + According to + DO NOT USE THIS:: ==> https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Reference-Learning-Switch + + root@loch:~/projects/P4-NetFPGA/tools/scripts# ./nf_test.py hw --major learning --minor sw + Please set the environment variable 'SUME_FOLDER' to point to the local NetFPGA source + Traceback (most recent call last): + File "./nf_test.py", line 632, in + identifyWorkDir() + File "./nf_test.py", line 418, in identifyWorkDir + project = os.path.basename(os.path.abspath(os.environ['NF_DESIGN_DIR'])) + File "/usr/lib/python2.7/UserDict.py", line 40, in __getitem__ + raise KeyError(key) + KeyError: 'NF_DESIGN_DIR' + root@loch:~/projects/P4-NetFPGA/tools/scripts# + + Trying + https://github.com/NetFPGA/P4-NetFPGA-public/wiki/Tutorial-Assignments + + root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# mv switch_calc.p4 switch_calc_orig.p4 + root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# ln -s switch_calc_solution.p4 switch_calc.p4 + root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# + + root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc# make + make -C src/ clean + make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + rm -f *.sdnet *.tbl .sdnet_switch_info.dat + make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + make -C testdata/ clean + make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' + rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py + make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' + rm -rf nf_sume_sdnet_ip/ + rm -f + rm -f sw/config_tables.c + make -C src/ + make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + p4c-sdnet -o .sdnet --sdnet_info .sdnet_switch_info.dat _solution.p4 + make[1]: p4c-sdnet: Command not found + make[1]: *** [Makefile:34: all] Error 127 + make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + make: *** [Makefile:60: frontend] Error 2 + root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc# + + As nico: + + nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ make + make -C src/ clean + make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + rm -f *.sdnet *.tbl .sdnet_switch_info.dat + make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + make -C testdata/ clean + make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' + rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py + make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' + rm -rf nf_sume_sdnet_ip/ + rm -f + rm -f sw/config_tables.c + make -C src/ + make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + p4c-sdnet -o switch_calc.sdnet --sdnet_info .sdnet_switch_info.dat switch_calc_solution.p4 + cpp: error: switch_calc_solution.p4: No such file or directory + cpp: warning: ‘-x c’ after last input file has no effect + cpp: fatal error: no input files + compilation terminated. + error: Preprocessor returned exit code 256; aborting compilation + error: 1 errors encountered, aborting compilation + make[1]: *** [Makefile:34: all] Error 1 + make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' + make: *** [Makefile:60: frontend] Error 2 + nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ + + nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src$ cp switch_calc.p4 switch_calc_solution.p4 + + $ cd $P4_PROJECT_DIR/nf_sume_sdnet_ip/SimpleSumeSwitch + + $ ./vivado_sim.bash. + +***** DONE try 2: create an almost empty p4 project based on switch_calc +****** DONE frontend build: ok +****** DONE testdata: skipped +****** DONE compile_cpp_test: ok +****** DONE run_scripts: ok +****** TODO cpp_test: error +# Fix introduced for SDNet 2017.4 +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +# Fix introduced for SDNet 2018.2 +sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp: cannot stat 'src/*.tbl': No such file or directory +make: *** [Makefile:23: cpp_test] Error 1 +[23:12] loch:minip4% +******* DONE Removing cp of *tbl +******* DONE Removing pcap copy +******* TODO removing all cp's +***** DONE try 3: good until step 4; broken at the simulation +****** log 1 + [15:26] rainbow:~% echo $P4_PROJECT_DIR + /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 + [15:26] rainbow:~% + [15:26] rainbow:~% cd $P4_PROJECT_DIR && make + + Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... + Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... + Compiling module work.S_SYNCER_for_S_SYNCER_for_TopDep... + Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=2... + Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... + Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=1... + Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... + Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... + Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... + Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... + Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... + Compiling module work.S_SYNCER_for_TopDeparser + Compiling module work.xpm_memory_base(MEMORY_TYPE=1,ME... + Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=2... + Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... + Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... + Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... + Compiling module work.S_SYNCER_for__OUT_ + Compiling module work.S_CONTROLLER_SimpleSumeSwitch + Compiling module work.SimpleSumeSwitch + Compiling module work.TB_System_Stim + Compiling module work.Check + Compiling module work.SimpleSumeSwitch_tb + Compiling module work.glbl + ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. + ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... + [15:29] rainbow:SimpleSumeSwitch% ./vivado_sim.bash +****** trying to find the error in the generated c code +[15:29] rainbow:SimpleSumeSwitch% find . -name xsim_3.c +./xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c +****** error seems to occur in xelab +***** DONE try 4: vivado 2018.2 instead of 2018.3 + Probably both ok - errors are the same +***** DONE new error: /usr/include/stdio.h:27:36: fatal error: bits/libc-header-start.h: No such file or directory +apt-get install gcc-multilib g++-multilib +***** DONE same error +Compiling module work.glbl +ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. +ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... +[17:47] rainbow:SimpleSumeSwitch% +***** DONE with verbosity / fixing ncurses dependency + +ICR Memory Usage: 5072KB, 18432KB +/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang -fPIC -c -std=gnu89 -nobuiltininc -nostdinc++ -w -Wl,--unres +olved-symbols=ignore-in-object-files -fbracket-depth=1048576 -I/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/../li +b/clang/3.1/include -fPIC -m64 -I"/opt/Xilinx/Vivado/2018.2/data/xsim/include" "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/ob +j/xsim_3.c" -O0 -sim -o "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.lnx64.o" -DXILINX_SIMULATOR +/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang: error while loading shared libraries: libncurses.so.5: cannot + open shared object file: No such file or directory +ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. +ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... +[20:00] rainbow:SimpleSumeSwitch% + +root@rainbow:~# apt install libncurses5-dev + + +[20:02] rainbow:~% ldd /opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang + linux-vdso.so.1 (0x00007ffda6bf6000) + libz.so.1 => /lib/x86_64-linux-gnu/libz.so.1 (0x00007f8e23208000) + libpthread.so.0 => /lib/x86_64-linux-gnu/libpthread.so.0 (0x00007f8e231e7000) + libncurses.so.5 => not found + librt.so.1 => /lib/x86_64-linux-gnu/librt.so.1 (0x00007f8e231dc000) + libdl.so.2 => /lib/x86_64-linux-gnu/libdl.so.2 (0x00007f8e231d6000) + libstdc++.so.6 => /lib/x86_64-linux-gnu/libstdc++.so.6 (0x00007f8e22ff5000) + libm.so.6 => /lib/x86_64-linux-gnu/libm.so.6 (0x00007f8e22ea5000) + libgcc_s.so.1 => /lib/x86_64-linux-gnu/libgcc_s.so.1 (0x00007f8e22e8b000) + libc.so.6 => /lib/x86_64-linux-gnu/libc.so.6 (0x00007f8e22ca0000) + /lib64/ld-linux-x86-64.so.2 (0x00007f8e2323f000) +[20:02] rainbow:~% + +root@rainbow:~# apt install libncurses5 + +***** DONE Run step 7: ok +# set_property value_format {long} [ipx::get_user_parameter SDNET_ADDR_WIDTH [ipx::current_core]] +# ipx::add_subcore xilinx.com:ip:axis_data_fifo:1.1 [ipx::get_file_groups xilinx_anylanguagesynthesis -of_objects [ipx::current_core]] +# ipx::add_subcore xilinx.com:ip:axis_data_fifo:1.1 [ipx::get_file_groups xilinx_anylanguagebehavioralsimulation -of_objects [ipx::current_core]] +# ipx::add_bus_parameter FREQ_HZ [ipx::get_bus_interfaces m_axis -of_objects [ipx::current_core]] +# ipx::add_bus_parameter FREQ_HZ [ipx::get_bus_interfaces s_axis -of_objects [ipx::current_core]] +# update_ip_catalog -rebuild +INFO: [IP_Flow 19-234] Refreshing IP repositories +INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/lib/hw'. +WARNING: [IP_Flow 19-3656] If you move the project, the path for repository '/home/nico/projects/P4-NetFPGA/lib/hw' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj'.) +# ipx::infer_user_parameters [ipx::current_core] +# ipx::check_integrity [ipx::current_core] +INFO: [IP_Flow 19-861] XGUI layout file basename "xgui/nf_sume_sdnet_v1_0.tcl" does not have the current IP _v format. If the IP name or version was changed recently, recreate this file to update the file format. +INFO: [IP_Flow 19-2181] Payment Required is not set for this core. +INFO: [IP_Flow 19-2187] The Product Guide file is missing. +INFO: [Ipptcl 7-1486] check_integrity: Integrity check passed. +# ipx::save_core [ipx::current_core] +# update_ip_catalog +# close_project +INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:18:13 2019... +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip' +[15:18] rainbow:minip4% cd $P4_PROJECT_DIR && make uninstall_sdnet && make install_sdnet + +***** DONE run step 8: just copies a python script +[15:18] rainbow:minip4% cd $NF_DESIGN_DIR/test/sim_switch_default && make +rm -f config_writes.py* +rm -f *.pyc +cp /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py ./ +[15:18] rainbow:sim_switch_default% +***** TODO run step 9: sume simulation: fails with various errors, python and cp failures +cd $SUME_FOLDER +./tools/scripts/nf_test.py sim --major switch --minor default +****** TODO python indent bug +# update_compile_order -fileset sim_1 +update_compile_order: Time (s): cpu = 00:00:17 ; elapsed = 00:00:09 . Memory (MB): peak = 1995.594 ; gain = 0.016 ; free physic +al = 21975 ; free virtual = 33161 +loading libsume.. +Traceback (most recent call last): + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de +fault/run.py", line 42, in + import config_writes + File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de +fault/config_writes.py", line 7 + + ^ +IndentationError: expected an indented block + while executing +"exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py" + invoked from within +"set output [exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py]" + (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_s +ume_switch_sim.tcl" line 177) +INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:21:21 2019... + +-> inserting pass in def config_tables() +****** DONE post python cp error: different error after fixing python +=== Work directory is /tmp/nico/test/simple_sume_switch +=== Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_stim.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_expected.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.log': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_expect.axi': No such file or directory +cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.axi': No such file or directory +=== Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] +[15:21] rainbow:P4-NetFPGA% + +**** TODO Understand which steps do what for netfpga +**** TODO Understand a bit of xilinx/netfpga/vivado + - https://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_4/ug900-vivado-logic-simulation.pdf + + +The xvhdl and xvlog commands parse VHDL and Verilog files, respectively. Descriptions +for each option are available in Table 5-2, page 102. + +This command parses the VHDL source file(s) and stores the parsed dump into a HDL library +on disk. +***** xelab +xelab +The xelab command, for given top-level units, does the following: +• Loads children design units using language binding rules or the –L +command line specified HDL libraries +• Performs a static elaboration of the design (sets parameters, generics, puts generate +statements into effect, and so forth) +• Generates executable code +• Links the generated executable code with the simulation kernel library to create an +executable simulation snapshot +You then use the produced executable simulation snapshot name as an option to the xsim +command along with other options to effect HDL simulation +***** Summary of xilinx toolchain +VHDL->[via xvhdl]-> HDL +Verilog->[via xvlog]->HDL + + +***** TODO Understand SimpleSumeSwitch +SimpleSumeSwitch( + TopParser(), + TopPipe(), + TopDeparser() +) main; +**** TODO Understand the different switch models (?) ** NAT64/NAT46 Features in jool and tayga *** TODO Static 1:1 NAT46: translate from IPv4 to IPv6 with a table **** TODO TCP diff --git a/netpfga/README.md b/netpfga/README.md index b16bb57..a6338af 100644 --- a/netpfga/README.md +++ b/netpfga/README.md @@ -93,7 +93,7 @@ fi ``` -### Compile the NetPFGA drivers +### Compile "SUME hardware library cores and some software to access registers" ``` @@ -101,8 +101,24 @@ cd $SUME_FOLDER/lib/hw/xilinx/cores/tcam_v1_1_0/ && make update && make cd $SUME_FOLDER/lib/hw/xilinx/cores/cam_v1_1_0/ && make update && make cd $SUME_SDNET/sw/sume && make cd $SUME_FOLDER && make +``` + +### Compile SUME drivers ``` +cd $DRIVER_FOLDER +make all +sudo make install +sudo modprobe sume_riffa +lsmod | grep sume_riffa +``` + +### Install packages for P4 + +``` +root@loch:~# apt install python-scapy +``` + ## Known / encountered BUGS