From 58ee92f46f7fb418288c39977833fa18272b0fdd Mon Sep 17 00:00:00 2001 From: Nico Schottelius Date: Thu, 21 Feb 2019 23:38:09 +0100 Subject: [PATCH] Add very basic controller --- p4app/controller.py | 94 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 p4app/controller.py diff --git a/p4app/controller.py b/p4app/controller.py new file mode 100644 index 0000000..24c69e3 --- /dev/null +++ b/p4app/controller.py @@ -0,0 +1,94 @@ +import nnpy +import struct + +from p4utils.utils.topology import Topology +from p4utils.utils.sswitch_API import SimpleSwitchAPI + +from scapy.all import sniff, get_if_list, Ether, get_if_hwaddr, sendp +from scapy.all import IP, Raw, IPv6, TCP, TCP_client +from scapy.all import Ether, sniff, Packet, BitField + +import sys +import re + +import logging +logging.basicConfig() +log = logging.getLogger("main") + +class L2Controller(object): + def __init__(self, sw_name): + self.init_boilerplate() + self.init() + + def init_boilerplate(self, sw_name): + self.topo = Topology(db="topology.db") + self.sw_name = sw_name + self.thrift_port = self.topo.get_thrift_port(sw_name) + self.cpu_port = self.topo.get_cpu_port_index(self.sw_name) + self.controller = SimpleSwitchAPI(self.thrift_port) + self.intf = str(self.topo.get_cpu_port_intf(self.sw_name).replace("eth0", "eth1")) + + def init(self): + self.controller.reset_state() + self.fill_tables() + self.add_mirror() + + def add_mirror(self): + if self.cpu_port: + self.controller.mirroring_add(100, self.cpu_port) + + def fill_tables(self): + pass + + def debug_print_pkg(self, pkg, msg="INCOMING"): + log.info("{}: {}".format(msg, self.debug_format_pkg(pkg))) + + def debug_format_pkg(self, pkg): + packet = Ether(str(pkg)) + + if packet.type == 0x800: + ip = pkg.getlayer(IP) + elif packet.type == 0x86dd: + ip = pkg.getlayer(IPv6) + + # tcp = pkg.getlayer(TCP) + + # raw = pkg.getlayer(Raw) + + # return "{}:{} => {}:{}: flags={} seq={} ack={} raw={}".format( + # ip.src, tcp.sport, + # ip.dst, tcp.dport, + # tcp.flags, + # tcp.seq, + # tcp.ack, + # raw) + + + def recv_msg_cpu(self, pkg): + packet = Ether(str(pkg)) + + if packet.type == 0x800: + pass + elif packet.type == 0x86dd: + pass + else: + print("Broken pkg: {}".format(pkg)) + return + + def run_cpu_port_loop(self): + sniff(iface=self.intf, prn=self.recv_msg_cpu) + +if __name__ == "__main__": + import sys + import os + + if "DEBUG" in os.environ: + log.setLevel(logging.DEBUG) + else: + log.setLevel(logging.INFO) + + log.info("Booting...") + log.debug("Debug enabled.") + + sw_name = "s1" + controller = L2Controller(sw_name).run_cpu_port_loop()