diff --git a/netpfga/log/compile-2019-07-24-224930-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-224930-ipv6-ready-6.5 new file mode 100644 index 0000000..c795c55 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-224930-ipv6-ready-6.5 @@ -0,0 +1,44 @@ ++ date +Mit Jul 24 22:49:30 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f ./nf_sume_sdnet_ip/SimpleSumeSwitch/xelab.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_23155.backup.jou ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_23155.backup.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.jou ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsc.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimcrash.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimkernel.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.jou ./simple_sume_switch/hw/vivado.log ./simple_sume_switch/hw/vivado.jou ./simple_sume_switch/hw/vivado_24790.backup.jou ./simple_sume_switch/hw/vivado_1688.backup.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_auto_cc_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_auto_cc_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_mdm_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_mdm_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m03_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m03_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m01_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m01_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m07_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m07_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_rx_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_rx_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m08_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m08_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_clk_wiz_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_clk_wiz_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_bram_if_cntlr_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_bram_if_cntlr_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_s00_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_s00_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m06_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m06_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_clock_converter_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_clock_converter_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_fifo_10g_tx_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_fifo_10g_tx_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_pcie_reset_inv_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_pcie_reset_inv_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_v10_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_v10_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_pcie3_7x_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_pcie3_7x_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_nf_riffa_dma_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_nf_riffa_dma_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_xlconcat_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_xlconcat_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_lmb_bram_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_lmb_bram_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_fifo_10g_rx_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_fifo_10g_rx_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/impl_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/impl_1/vivado_5243.backup.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/impl_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m00_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m00_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_ilmb_v10_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_ilmb_v10_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_tx_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_tx_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_uartlite_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_uartlite_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m05_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m05_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_rst_clk_wiz_1_100M_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_rst_clk_wiz_1_100M_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_iic_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_iic_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_ilmb_bram_if_cntlr_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_ilmb_bram_if_cntlr_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_1_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_1_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_axi_intc_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_axi_intc_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m04_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m04_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/identifier_ip/summary.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/7bfef02244461664.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/bb89f09b44165778.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/efe6e3d49c3a8039.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/7c0f5c85c14564bf.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/3e60498069fd8bd5.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/74db4bf3f7578076.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/729c75d02cfc530d.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/f84a275938957408.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/bbbd46440b5c7213.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/3b530f2d27ae946b.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/37ac3cdf312077f7.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/9783353c4ff76f6c.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/b97cfdfeee8f8d17.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/12896bd3f3d414eb.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/a767e4aa25ef8a2e.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/a355d5924fa4a281.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/66c48b9feb81b863.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/b534406ce6538971.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/9c58bca45284afc8.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/21dbb55d3f7b1967.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/0c40fc07b96d1658.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/9b8a1c9dada027fa.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/9278bfe6c99dbe18.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/cd1648cfd505e41d.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/bcb85672e1d51456.logs/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.cache/ip/2018.2/cc4a2809a8a54e43.logs/runme.log ./simple_sume_switch/hw/vivado_24790.backup.log ./simple_sume_switch/hw/ip_repo/std/cores/output_queues_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/output_queues_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_interface_shared_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_interface_shared_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_interface_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_interface_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/axi_sim_transactor_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/axi_sim_transactor_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/axis_sim_record_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/axis_sim_record_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/fallthrough_small_fifo_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/fallthrough_small_fifo_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/barrier_gluelogic_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/barrier_gluelogic_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/axis_sim_stim_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/axis_sim_stim_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_attachment_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/nf_10ge_attachment_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/input_arbiter_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/input_arbiter_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/identifier_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/identifier_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/barrier_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/barrier_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/nf_axis_converter_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/nf_axis_converter_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/nf_riffa_dma_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/nf_riffa_dma_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/std/cores/axis_fifo_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/std/cores/axis_fifo_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/vivado.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/vivado.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xelab.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_23155.backup.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_23155.backup.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xsc.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimcrash.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimkernel.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/input_arbiter_drr_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/contrib/cores/input_arbiter_drr_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/sss_fallthrough_small_fifo_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/contrib/cores/sss_fallthrough_small_fifo_v1_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/sss_output_queues_v2_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/contrib/cores/sss_output_queues_v2_0_0/vivado.jou ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_endianess_manager_v1_0_0/vivado.log ./simple_sume_switch/hw/ip_repo/contrib/cores/nf_endianess_manager_v1_0_0/vivado.jou ./simple_sume_switch/hw/vivado_1688.backup.jou ./simple_sume_switch/sw/embedded/SDK_Workspace/simple_sume_switch/.metadata/.log ./simple_sume_switch/sw/embedded/SDK_Workspace/simple_sume_switch/.metadata/.plugins/org.eclipse.cdt.make.core/.log ./simple_sume_switch/sw/embedded/SDK_Workspace/simple_sume_switch/.metadata/.plugins/org.eclipse.cdt.core/.log ./simple_sume_switch/sw/embedded/SDK_Workspace/simple_sume_switch/SDK.log +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +actions_egress.p4(89): error: data-plane arguments in default_actions are currently unsupported: realmain_controller_debug_table_id_0 + default_action = controller_debug_table_id(TABLE_V4_NETWORKS); + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/translate/core/lookupEngine.cpp:137 +Compiler Bug: actions_egress.p4(89): unhandled expression realmain_controller_debug_table_id/realmain_controller_debug_table_id_0(5); + default_action = controller_debug_table_id(TABLE_V4_NETWORKS); + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-225254-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-225254-ipv6-ready-6.5 new file mode 100644 index 0000000..ccd9cee --- /dev/null +++ b/netpfga/log/compile-2019-07-24-225254-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 22:52:54 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (471564) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-225806-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-225806-ipv6-ready-6.5 new file mode 100644 index 0000000..d283a22 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-225806-ipv6-ready-6.5 @@ -0,0 +1,193 @@ ++ date +Mit Jul 24 22:58:06 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + +Compilation successful +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_externs.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ ./testdata/ ./sw/ --base_address 0x44020000 +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_API.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_CLI.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' +cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API +cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API +cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' +# The following command only applies if running P4_SWITCH Questa Simulation with Ubuntu +sed -i 's/vsim/vsim \-ldflags \"\-B\/usr\/lib\/x86\_64\-linux-gnu\"/g' nf_sume_sdnet_ip/SimpleSumeSwitch/questa.bash +# modify the P4_SWITCH_tb so that it writes the table configuration writes to a file +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/modify_P4_SWITCH_tb.py nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv +# Fix introduced for SDNet 2017.4 +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +# Fix introduced for SDNet 2018.2 +sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp testdata/*.axi nf_sume_sdnet_ip/SimpleSumeSwitch/ ++ date +Mit Jul 24 22:58:13 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch ++ ./vivado_sim.bash ++ find -name '*.v' -o -name '*.vp' -o -name '*.sv' ++ xargs -I % /opt/Xilinx/Vivado/2018.2/bin/xvlog -sv % +INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.v" into library work +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t +INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.vp" into library work +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_Engine +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_realmain_lookup_table_0_req_lookup_request_key +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_local_state_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_1 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_2 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_task +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_ingress_port +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_sume_metadata_dst_port +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_table_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_task +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_ingress_port +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_sume_metadata_dst_port +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_src_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_dst_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_version +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ihl +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_diff_serv +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ecn +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_totalLen +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_identification +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_flags +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_fragOffset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ttl +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_protocol +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_src_addr +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_dst_addr +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ethernet_ethertype +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_checksum +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv6_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_3 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_4 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_TopPipe_fl_realmain_tmp_2 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_TopPipe_fl_realmain_tmp_2 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_5 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_realmain_lookup_table_0_req_lookup_request_key +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_local_state_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_6 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_realmain_lookup_table_0_req_lookup_request_key +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_local_state_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_7 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_ipv4_protocol +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_switch_task +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_chk_icmp +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_na_ns_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_option_link_layer_addr_isValid +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_8 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_9 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_type +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_code +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_10 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_local_state_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_11 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_type +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_code +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_local_state_id +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_increment_offset +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_12 +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_nextSection +INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_increment_offset diff --git a/netpfga/log/compile-2019-07-24-225950-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-225950-ipv6-ready-6.5 new file mode 100644 index 0000000..0239081 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-225950-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 22:59:50 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f ./nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (428613) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230104-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230104-ipv6-ready-6.5 new file mode 100644 index 0000000..2ec8c38 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230104-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:01:04 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (428613) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230204-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230204-ipv6-ready-6.5 new file mode 100644 index 0000000..af1dd6b --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230204-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:02:04 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (429024) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230245-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230245-ipv6-ready-6.5 new file mode 100644 index 0000000..844d2ee --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230245-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:02:45 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (420697) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230332-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230332-ipv6-ready-6.5 new file mode 100644 index 0000000..3802aa7 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230332-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:03:32 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (409360) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230449-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230449-ipv6-ready-6.5 new file mode 100644 index 0000000..884e2f9 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230449-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:04:49 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-230601-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230601-ipv6-ready-6.5 new file mode 100644 index 0000000..667f72c --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230601-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:06:01 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-230639-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230639-ipv6-ready-6.5 new file mode 100644 index 0000000..ff48f1a --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230639-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:06:39 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (429147) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230733-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230733-ipv6-ready-6.5 new file mode 100644 index 0000000..4370e6f --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230733-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:07:33 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (433822) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230823-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230823-ipv6-ready-6.5 new file mode 100644 index 0000000..9181bc5 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230823-ipv6-ready-6.5 @@ -0,0 +1,26 @@ ++ date +Mit Jul 24 23:08:23 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +minip4_solution.p4(146): error: Could not find declaration for stupid + stupid(); + ^^^^^^ +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 1 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230843-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230843-ipv6-ready-6.5 new file mode 100644 index 0000000..8eb7e75 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230843-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:08:43 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (429150) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-230911-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230911-ipv6-ready-6.5 new file mode 100644 index 0000000..95c87db --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230911-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:09:11 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-230959-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-230959-ipv6-ready-6.5 new file mode 100644 index 0000000..ec4259c --- /dev/null +++ b/netpfga/log/compile-2019-07-24-230959-ipv6-ready-6.5 @@ -0,0 +1,77 @@ ++ date +Mit Jul 24 23:09:59 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + +Compilation successful +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_externs.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ ./testdata/ ./sw/ --base_address 0x44020000 +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_API.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_CLI.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' +cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API +cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API +cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' +# The following command only applies if running P4_SWITCH Questa Simulation with Ubuntu +sed -i 's/vsim/vsim \-ldflags \"\-B\/usr\/lib\/x86\_64\-linux-gnu\"/g' nf_sume_sdnet_ip/SimpleSumeSwitch/questa.bash +# modify the P4_SWITCH_tb so that it writes the table configuration writes to a file +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/modify_P4_SWITCH_tb.py nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv +# Fix introduced for SDNet 2017.4 +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash +sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +# Fix introduced for SDNet 2018.2 +sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash +cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ +cp testdata/*.axi nf_sume_sdnet_ip/SimpleSumeSwitch/ ++ date +Mit Jul 24 23:10:05 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch ++ ./vivado_sim.bash ++ find -name '*.v' -o -name '*.vp' -o -name '*.sv' ++ xargs -I % /opt/Xilinx/Vivado/2018.2/bin/xvlog -sv % diff --git a/netpfga/log/compile-2019-07-24-231102-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231102-ipv6-ready-6.5 new file mode 100644 index 0000000..ec925f1 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231102-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:11:02 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f ./nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-231217-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231217-ipv6-ready-6.5 new file mode 100644 index 0000000..313d601 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231217-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:12:17 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (422347) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-231326-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231326-ipv6-ready-6.5 new file mode 100644 index 0000000..82964a9 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231326-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:13:26 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (429175) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-231459-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231459-ipv6-ready-6.5 new file mode 100644 index 0000000..2c3cd80 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231459-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:14:59 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-231604-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231604-ipv6-ready-6.5 new file mode 100644 index 0000000..5e2c48b --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231604-ipv6-ready-6.5 @@ -0,0 +1,49 @@ ++ date +Mit Jul 24 23:16:04 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +./gen_testdata.py +Applying pkt on nf0 at 1: +Applying pkt on nf1 at 2: +Applying pkt on nf2 at 3: +Applying pkt on nf3 at 4: +nf0_applied times: [1] +nf1_applied times: [2] +nf2_applied times: [3] +nf3_applied times: [4] +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap +/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts +Xilinx SDNet Compiler version 2018.2, build 2342300 + diff --git a/netpfga/log/compile-2019-07-24-231643-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-231643-ipv6-ready-6.5 new file mode 100644 index 0000000..8437f77 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-231643-ipv6-ready-6.5 @@ -0,0 +1,39 @@ ++ date +Mit Jul 24 23:16:43 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +actions_egress.p4(52): warning: Table v6_networks is not used; removing +table v6_networks { + ^^^^^^^^^^^ +actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing + table nat46 { + ^^^^^ +minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates + out metadata meta, + ^^^^ +minip4_solution.p4(39) +parser RealParser( + ^^^^^^^^^^ +terminate called after throwing an instance of 'Util::CompilerBug' + what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 +Compiler Bug: unhandled node: (419979) + +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 134 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2 diff --git a/netpfga/log/compile-2019-07-24-232601-ipv6-ready-6.5 b/netpfga/log/compile-2019-07-24-232601-ipv6-ready-6.5 new file mode 100644 index 0000000..18be325 --- /dev/null +++ b/netpfga/log/compile-2019-07-24-232601-ipv6-ready-6.5 @@ -0,0 +1,59 @@ ++ date +Mit Jul 24 23:26:01 CEST 2019 ++ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 ++ make +make -C src/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +rm -f *.sdnet *.tbl .sdnet_switch_info.dat +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +make -C testdata/ clean +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' +rm -rf nf_sume_sdnet_ip/ +rm -f +rm -f sw/config_tables.c +make -C src/ +make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +minip4_solution.p4(149): error: Could not find declaration for tmp17 + delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; + ^^^^^ +Makefile:34: recipe for target 'all' failed +make[1]: *** [all] Error 1 +make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' +Makefile:31: recipe for target 'frontend' failed +make: *** [frontend] Error 2