* Time table / log | When? | What? | Notes | | 2019-02-21 | Kick-Off | x | | | Finish all admin points | x | | | Know when/how to coordinate | x | | 2019-02-21 | Clarifications Ueli Maurer (Mentor) | x | | | Write mail / phone | x | | 2019-02-22 | Have all papers handed in | | | | | | | 2019-02-22 | Have rough definition of tasks | x | | | | | | 2019-02-23 | python2 / ipaddress is buggy | x | | | p4utils is python2 only support | | | | bmpy_utils is not installable with pip | | | | python2 / latest ipaddress==1.0.22 still has the bug | | | | ipaddress.ip_network("2001:db8:61::/64") | | | | IPv6Network(u'3230:3031:3a64:6238:3a36:313a:3a2f:3634/128') | | | | | | | | egress routing | x | | | | | | 2019-02-24 | non reliable neighbor entries / flushing addresses puts into failed | | | | | | | | | | | 2019-02-28 | Meet Laurent #2 | | | | - Status | | | | * Setup base code | | | | * Parser for all protocols (udp,tcp,icmp,icmp6) | | | | * Started with icmp translation | | | | * Investigating into IPv6 based checksums | | | | * Reading into various RFCs, NDP, MLD | | | | * Reading about multicast / trying to figure out dynamic membership | | | | | | | | - Challenges | | | | * Some issues with python2 (ipaddr) - slowing down | x | | | https://github.com/phihag/ipaddress/issues/46 | | | | * Forwarded and received icmp6 packets are not "accepted" | | | | | | | | - Questions | | | | * Multicast: in controller | x | | | * Re-using code (lee howard) -> ok & mention | x | | | * A lot of redundant code / different tables / repeating: use if's | x | | | * 65k parsing is insane | x | | | | | | | - Next steps: | | | | * Supporting MLD | | | | * Save stuff in the controller | | | | * checkout ipaddr bug / status | | | | * Variable length / icmp6 in the controller | | | | * Go simple... | | | | * Meeting Edgar & Alexander week after | | | | * Summary on Slack | | | | * 1130 meeting now | | | | | | | | | | | 2019-03-01 | Feature list / priority list / roadmap clear | x | | | Joining P4 Slack | | | | | | | 2019-03-03 | icmp6 revised: | | | | - add address to table for forwarding to controller | x | | | - select correct format for forwarding | | | | - decode in controller | | | | - send back to switch | | | | - test with host | | | | | | | 2019-03-06 | Meet Laurent #3 | | | | - Checksum's in scapy | x | | | - Python2 ipaddress fix (import future) | x | | | - Added custom package format / additional information in packet | x | | | - (partial) NDP working in controller | x | | | - P4 checksum_with_payload | x | | | - Reading scapy / inet6 | x | | | - Further checksum tests -> required everywhere in IPv6 | x | | | - icmp6 echo request working in controller | x | | | - Hosts can ping6 the switch | x | | | - Ran into P4 casting bug: https://github.com/p4lang/p4c/issues/1765 | x | | | -> seems to be more than just casting bug | x | | | - Default route for ipv6 hosts | x | | | | | | | Next target: | | | | - Focus on enabling the "Internet" with ICMP6 translation | x | | | | | | | Next steps: | | | | - Investigate again into checksumming with payload in P4 | x | | | - Answering icmp6 echo request *in* in the switch | x | | | - Translate icmp6 to icmp | x | | | - Translate icmp to icmp6 | | | | - Multiple branches: | x | | | * Work on checksumming / p4 | x | | | * Work on metadata passing / p4 | x | | | * Work on static mapping (w/ incorrect checksum) 1:1 | | | | * v1model/ | | | | | | | | Notes: | | | | * Edgar back on Friday // check tofino checksumming | | | | * Bugs mentioning in thesis | | | | * Maybe run static mapping on tofino / p4_14 | | | | * Tofino p4_16: alpha compiler | | | | * Send recap / mail next week | | | | * week after 1130 Thursday | | | | | | | 2019-03-07 | ICMP6 checksumming works!!! | x | | | -> more fields needed to be included! | | | | | | | 2019-03-13 | Tried/trying to get vagrant VM or P4* running on the notebook | | | | | | | 2019-03-14 | NAT64 static rewrite | x | | | - table support | | | | - checksum not yet ported for translations | | | | - how to get mask from lpm table match? | | | | - how to get network from lpm match? | | | | - Create p4lang/p4-spec bug | | | | https://github.com/p4lang/p4-spec/issues/745 | | | | | | | 2019-03-21 | Meet Laurent #4 - post poned - sick | x | | | https://github.com/p4lang/p4-spec/issues/660 sizeof() missing | | | | | | | | - Need to introduce new headers | | | | - Might need deeper parsing for icmp6_ns | | | | - Need hwaddr in icmp6_na | | | | - Need to find out how to handle imcp6 options after target address | | | | | | | 2019-03-23 | Parsing down to link layer option | x | | | Parsing on wrong field detected by unset fields in wireshark | | | | Correcting parser->leads to incorrect checksum | | | | - NDP is answered to, but icmp6 echo request isn't -> extend table | | | | | | | | Problem with multiple LPM keys in table | | | | - logical problem, overlapping length matches | | | | - priority / ordering would be helpful | | | | | | | | | | | 2019-03-25 | | x | | | Writing down double LPM problem | | | | Removing source network support, documenting limitation | | | | Rewriting code to use multiple NAT64 destinations | | | | New test.py v6_static_mapping tests | | | | | | | | Again checksum errors in NDP answer | | | | Added debug code to send table ID towards controller | | | | | | | 2019-03-26 | | x | | | Find out where packet is stuck | | | | | | | 2019-03-27 | | | | | switch cannot be used in actions! | | | | Refactor program to use multiple tables instead of switch | | | | Ethernet frame check sequence error | | | | | | | 2019-03-28 | Meet Laurent #4 | | | | - Router solicitation for finding router on startup | | | | - test.py for TDD | | | | - Parsing icmp6 is not enough - one layer deeper | | | | - No LPM priorities | | | | - if/switch action logic | | | | - partial translation working to IPv4 | | | | - Focus on checksumming work (again) | | | | | | | | | | | | Notes: | | | | - Later using ternary matching | | | | - Document (nested) if's in action (in thesis) | | | | - SW and HW Targets Tofino [Albert, Thomas] | | | | - P414/P416 for Tofino? | | | | - Barefoot support/question: Ticket/Support System | | | | - Can try P416 compiler | | | | - Next week Laurent not around: send email + Albert/Thomas/Edgar meeting | | | | | | | 2019-03-30 | | | | | Refactoring code | | | | Hitting expression bug | | | | Translating TO icmp4 works! | | | | | | | 2019-04-02 | | | | | ARP egress support | | | | | | | 2019-04-03 | | | | | ARP corrections -- ARP working for the switch! | x | | | ICMP w/ incorrect checksum | x | | | ICMP w/ correct checksum - PING REPLIES!!! | x | | | Next: check / verify / translate nat46 | | | | | | | | | | | 2019-04-04 | | | | | Report [no meeting w/ Laurent] | | | | | | | | Added arp handling | | | | Added icmp handling | | | | Need to setup hardware addresses -> in theor resolution -> hardcoded atm | | | | | | | | | | | 2019-04-04 | NAT64 1:1 table ICMP, ICMPv6 working | x | | | Will need some switch local ip addresses | x | | | | | | 2019-04-11 | PLAN: NAT64 1:1 table UDP working | | | | checksums in both directions | | | | | | | 2019-04-11 | | | | | Meeting Laurent | | | | | | | | Status: | | | | - Minimal ARP working (for the switch address) | | | | | | | | - echo ping/request icmp<->icmp6 working | | | | - udp_v6->udp_v4 working | | | | - tcp_v6->tcp_v4 working | | | | - udp_v4->udp_v6 working | | | | - tcp_v4->udp_v6 working | | | | | | | | | | | | Next steps: | | | | - Hardware | | | | - icmp++ | | | | - pmtu | | | | - sessions main step | | | | | | | | Notes: | | | | - broadcast link only | | | | - About 2w delivery time | | | | - Get in touch with Tobias | | | | - Scalability analysis -> how many connections/connections/s | | | | - Forwarding information in tables | | | | - Hendrik: semester thesis / NetPFGA | | | | - Tobias: advising Hendrik / Netpfga | | | | | | | | | | | 2019-04-18 | PLAN: NAT64 1:1 table TCP/UDP working | x | | | | | | 2019-04-23 | | | | | Meet Laurent | | | | | | | | General | | | | - Get a better understanding of what others did | | | | | | | | Review docs / specs | | | | - Jool EAMT/SIIT fully | | | | | | | | - IPv4 embedding | | | | * Motivation/objective: working with real world DNS64 | | | | * RFC6052 suffix support | | | | * RFC4291 IPv4-Compatible IPv6 Address (16 0s) | | | | * RFC4291 IPv4-Mapped IPv6 Address (16 1s) | | | | | | | | - Session handling | | | | * RFC6145: Translation ip/icmp, obsoleted by RFC 7915 | | | | * RFC6146: NAT64 definition, only TCP, UDP, and ICMP traffic | | | | * RFC6052: embedding support | | | | * Mode: IPv6 outgoing -> "masquarading" | | | | * Mode: IPv4 | | | | | | | | - Translation details | | | | * How to handle ICMP4->icmp6 correctly (RFC7915) | | | | | | | | - Hardware | | | | * NetFPGA | | | | * Hardware machine for software comparison? | | | | | | | | | | | | New todos: | | | | | | | | - Translate fragment header | | | | - Support MTU / packet too big | | | | - Support PMTU, tcp mss | | | | | | | | | | | | Meeting notes | | | | - difference based | | | | - first physical access | | | | - tofino: if it compiles -> line rate | | | | - chaining switches / OS -> single port rate | | | | - netpfga | | | | - reason about what in hardware and what in software -> reason tradeoff | !!! | | | - table gets full | | | | | | | | | | | | Follow up: | | | | | | | | - what's the MTU of an interface? have a table | | | | - have port/mtu | | | | - total packeth length -> from IP | | | | - tables not in data plane | | | | - Meeting Hendrik | | | | - Meeting Kamila | | | | | | | | | | | | - 768k | | | | | | | | | | | | | | | 2019-05-02 | Jool SIIT / range / offset support https://www.jool.mx/en/run-vanilla.html | x | | | Jool EAMT support https://www.jool.mx/en/run-eam.html | | | | Bidirectional support | | | | Will need IPv6 embedding suport https://tools.ietf.org/html/rfc6052 | | | | | | | 2019-04-18 | NAT64 prefix based IPv6->IPv4 conversion [tayga] | | | | Use case: IPv6 hosts send to specific /96 | | | | | | | 2019-05-23 | NAT64 dynamic pool implementation: n:1 ipv6 to ipv4 mapping | | | | And n:1 stateful mappings https://www.jool.mx/en/run-nat64.html | | | | Needs active controller | | | | Needs timeout / leases | | | | Might work w/ registers | | | | | | | 2019-06-16 | | | | | Laurent meeting | | | | | | | | - Vivado installation: silent errors, infinite loop, missing libncurses5 | | | | | | | | - Compiling netfpga: 82k lines of code that are interdependent | | | | - Many non critical error messages on the way | | | | - Zero exit fatal errors | | | | | | | | - Code is not persistent in flash -> not there after power down | | | | | | | | - Not Receiving | | | | - tcpdump on local nfX doesn't work -> can only debug on other endpoint | | | | | | | | - Writing tables fails | | | | | | | | - Output all ports -> unclear how test data should look like | | | | - Found out broad/multicasting in theory -> bitmask | | | | | | | | - HW test | | | | * compiling for 3 days | | | | * Execution fails due to missing djtgcfg | | | | | | | | Payload to control plane | | | | - digest not possible due to missing | | | | - might work with working | | | | | | | | Next steps: | | | | - Debug ioctl errors when writing table entries | | | | | | | | - Understand HDL or PX user engines for writing checksum part | | | | - Adjust controller to digest | | | | | | | | HDL notes | | | | - cycle limitations | | | | - variable length might be a problem | | | | | | | | Next steps after discussion: | | | | | | | | - checkout ipv6 test on netpfga / modify v6 packet | | | | - checkout whether diff is possible on checksum -> see ttl | | | | - checkout externs of Hendrik / report | | | | - Asses checksum difficulty | | | | | | | | Handing in thesis: | | | | | | | | - Email pdf | | | | - code on github | | | | - tar.gz of the code | | | | | | | | - Decleration of -> from tobias | | | | - Week after: presentation | | | | | | | | | | | | - 15m talk | | | | - 15m q&a | | | | | | | | | | | 2019-06-24 | | | | | Laurent meeting | | | | | | | | Checksums | | | | - 16 bit sum of fields, later one/two complement | | | | - various implementations | | | | - is a sum -> commutative law | | | | - overflow (delta > payload) handling unclear | | | | | | | | Netpfga | | | | - Old one had several failure messages (one in DDR area) | | | | - New one: tables can be written | | | | - Need 3 ports: v4, v6, management | | | | | | | | Next steps: | | | | - Test checksums delta on software switch | | | | - Begin to port code to netpfga one-by-one | | | | | | | | Follow up notes: | | | | - Checkout Hendrik thesis / right / left shift | | | | - Fix computer in lab | | | | | | | | | | | 2019-06-27 | | | | | Target Hardware: code running | | | | | | | 2019-07-01 | | | | | Meeting Laurent | | | | | | | | - Diff'ing in python: | | | | * offsetting works | | | | * Need to adjust to actual translation code | | | | | | | | - Phasing in netpfga code / copy & compile & fix | | | | * Code structure w/o apply logic | | | | * DIFF: Output port selection | | | | * DIFF: Sending to CPU | | | | | | | | - Diff'ing in P4 | | | | * IPv4 checksum is w/o payload | | | | | | | | - Different generated output | | | | | | | | Next steps: | | | | - Implement in BMV2 diff | | | | - Checksum assignment / calc phase not clear | | | | - Check if action has to be used | | | | - Check if ifdef makes a difference | | | | - Defense: list of dates | | | | | | | | - iperf (alternative: hping) -> test on production setup | | | | | | | | Late tests: | | | | - Performance tests | | | | - Extra things | | | | - Maybe compile to openvswitch | | | | | | | 2019-07-06 | | | | | Test case for delta in P4/BMV2: | | | | | | | | | | | | | | | | | | | 2019-07-11 | | | | | Meeting Laurent | | | | | | | | - Delta diff in P4 from v4 -> v6: checksum working, off by one error | | | | -> assume overflow | | | | -> very likely | | | | | | | | - Investigating why NDP doesn't work | | | | | | | | - compile to netpfga: silent errors | | | | - netpfga: icmp6/ndp might not work => shifting back to controller | | | | - network card | | | | | | | | Integrated org-documentation into latex / export working | | | | https://bastibe.de/2014-09-23-org-cite.html | | | | http://viveks.info/org-mode-academic-writing-bibliographies-org-ref/ | | | | https://github.com/jkitchin/org-ref | | | | | | | | | | | 2019-07-25 | Benmarking results between P4, Jool, Tayga | | | | Real hardware of advantage | | | | | | | | | | | | | | | 2019-08-01 | Latest start writing documentation | | | | | | | | | | | 2019-08-21 | hand in thesis | | | | | | * Thesis implementation ** DONE Setup test VM for P4: 2a0a:e5c0:2:12:400:f0ff:fea9:c3e3 ** DONE Get feature list of jool ** DONE Get feature list of tayga ** DONE Setup P4 base / structure ** DONE Create minimal controller for populating tables ** DONE Checkout / review egress settings ** DONE Create Basis to translate ipv6 --> ipv4 with a (freely programmable) prefix; test ping6_switch *** DONE Insert prefix into switch: v6_networks *** DONE Support multiple ipv6 source networks: need new table w/ 2 keys! -> not at the moment *** DONE Write test.py to generate correct destination packets >>> a = ipaddress.ip_network("2001:db8::/32") >>> b = ipaddress.ip_address("10.0.0.1") >>> a[int(b)] IPv6Address('2001:db8::a00:1') *** DONE Using test.py, new NDP packets been seen, bur zero icmp on the outgoing side p4@ubuntu:~/master-thesis/p4app$ python test.py --method v6_static_mapping --debug INFO:main:Trying to reach 10.0.0.1 (64:ff9b::a00:1) from h1 sudo: unable to resolve host ubuntu PING 64:ff9b::a00:1(64:ff9b::a00:1) 56 data bytes --- 64:ff9b::a00:1 ping statistics --- 1 packets transmitted, 0 received, 100% packet loss, time 0ms p4@ubuntu:~/master-thesis/p4app$ \x00\x00\x00 :\xff\xfe\x80\x00\x00\x00\x00\x00\x00\x02\x00\n\xff\xfe\x00\x00\x01 \x01\r\xb8\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00B\x87\x00\x08+\x00\x00\x00\x00 \x01\r\xb8\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00B\x01\x01\x00\x00\n\x00\x00\x01' |>> DEBUG:main:cpu = > DEBUG:main:reassambled=>>> DEBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:reassambled=>>> DEBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:reassambled=>>> *** DONE Debug why neighbor discover does not work anymore **** log p4@ubuntu:~$ mx h1 tcpdump -lni any sudo: unable to resolve host ubuntu tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on any, link-type LINUX_SLL (Linux cooked), capture size 262144 bytes 19:57:53.258805 IP6 fe80::200:aff:fe00:1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8::42, length 32 19:57:54.256924 IP6 2001:db8::1 > 2001:db8::1: ICMP6, destination unreachable, unreachable address 64:ff9b::a00:1, length 112 EBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:reassambled=>>> INFO:main:Doing neighbor solicitation DEBUG:main:OUTGOING: >>> DEBUG:main:INCOMING: >>> After removing noise: DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> **** Do we have routing for fe80::/10? Probably not. Shouldn't we see it in the controller then? **** NDP is controller only! *** DONE Finish NDP in switch **** DONE Need to set R/S/O bits **** DONE Need to parse R/S/O bits *** DONE Maybe merge v6_address and v6_networks - /128 is the same *** DONE Implement address learning? -> not at the moment *** DONE Not sure whether we should react on router solicitation -> not at the moment - Using static routes -> should do the job *** DONE Implement the calculation Currently offset + ip address *** DONE Sketch the flow for session handling for icmp6 w/o packet loss - switch receives icmp6 packet for known prefix - controller needs to create session entry (?) Not sure what I meant to do here - closing. *** DONE Create table entry for mapping v4->v6 [net] *** DONE Create table entry for mapping v6->v4 [net] ** DONE Implement ICMP <-> ICMP6 translation *** DONE 2019-02-28 / icmp testing / first NDP steps **** DONE pinging in router mode: nothing shown in the controller, multicast forwarded -> "ok" root@ubuntu:~/master-thesis/p4app# ping6 -c1 2001:db8:61::42 PING 2001:db8:61::42(2001:db8:61::42) 56 data bytes From 2001:db8:61::1 icmp_seq=1 Destination unreachable: Address unreachable --- 2001:db8:61::42 ping statistics --- 1 packets transmitted, 0 received, +1 errors, 100% packet loss, time 0ms root@ubuntu:~/master-thesis/p4app# sudo: unable to resolve host ubuntu tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes 09:47:07.191569 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 09:47:08.190331 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 09:47:09.190279 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 **** DONE special rule for ff02::1:ff00:42 Semi works, replies are there, but host still retries: p4@ubuntu:~/master-thesis$ h=1; mx h$h tcpdump -lni h$h-eth0 sudo: unable to resolve host ubuntu tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes 09:58:04.786979 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 09:58:04.793560 IP6 2001:db8:61::42 > 2001:db8:61::1: ICMP6, neighbor advertisement, tgt is 2001:db8:61::42, length 32 09:58:05.786311 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 09:58:05.790506 IP6 2001:db8:61::42 > 2001:db8:61::1: ICMP6, neighbor advertisement, tgt is 2001:db8:61::42, length 32 09:58:06.786254 IP6 2001:db8:61::1 > ff02::1:ff00:42: ICMP6, neighbor solicitation, who has 2001:db8:61::42, length 32 09:58:06.792325 IP6 2001:db8:61::42 > 2001:db8:61::1: ICMP6, neighbor advertisement, tgt is 2001:db8:61::42, length 32 Maybe checksums? *** DONE Parse icmp *** DONE Parse icmpv6 *** DONE Add (static) egress configuration *** DONE Calculate ICMP6 checksums in controller **** Need to include the payload!?!! *** DONE Implement minimal neighbor discovery in controller **** DONE For the switch ***** DONE Register IPv6 address in table ***** DONE Parse ICMPv6 up to neighbor solicitation -> no: checksum problem ***** DONE Use NDP (Neighbor Solicitation (NDP) , Neighbor Advertisement (NDP)) -> no: controller ***** Approach 2: use cpu header, forward information to controller ***** DONE Fix the ip address match/mapping: 42 -> 2a -> use hex originally ***** DONE Find out why wrong type is used -> overlapping with NDP DEBUG:main:INCOMING: > p=> DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Debug purpose only DEBUG:main:INCOMING: > p=> DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Debug purpose only DEBUG:main:INCOMING: > p=> DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Debug purpose only ***** Disable debug by default -> gives correct packets DEBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Doing neighbor solicitation DEBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Doing neighbor solicitation DEBUG:main:INCOMING: > DEBUG:main:cpu = > DEBUG:main:o=>>> DEBUG:main:Doing neighbor solicitation **** DONE For other nodes -> multicast **** TODO Maybe implement link local addresses (missing at the moment) ***** ff02::/?? ***** rfc4861 "Neighbor Solicitation messages are multicast to the solicited-node multicast address of the target address." ***** DONE multicasting / groups ****** create a group ("node") that contains "all other" ports ****** create a multicast group with an ID ****** associate the "node" with the multicast group ID **** If destination is within ff02::1:ff00:0/104, multicast *** DONE Make switch answer icmp6 echo request for *** DONE Introduce mixed mode: switch: icmp6 echo reply, controller: NDP **** DONE try 1: reply seen, but checksum is incorrect **** DONE try 2: analysing tagya checksumming code static uint16_t ip6_checksum(struct ip6 *ip6, uint32_t data_len, uint8_t proto) { uint32_t sum = 0; uint16_t *p; int i; for (i = 0, p = ip6->src.s6_addr16; i < 16; ++i) sum += *p++; sum += htonl(data_len) >> 16; sum += htonl(data_len) & 0xffff; sum += htons(proto); while (sum > 0xffff) sum = (sum & 0xffff) + (sum >> 16); return ~sum; } static uint16_t convert_cksum(struct ip6 *ip6, struct ip4 *ip4) { uint32_t sum = 0; uint16_t *p; int i; sum += ~ip4->src.s_addr >> 16; sum += ~ip4->src.s_addr & 0xffff; sum += ~ip4->dest.s_addr >> 16; sum += ~ip4->dest.s_addr & 0xffff; for (i = 0, p = ip6->src.s6_addr16; i < 16; ++i) sum += *p++; while (sum > 0xffff) sum = (sum & 0xffff) + (sum >> 16); return sum; } ... static int xlate_payload_4to6(struct pkt *p, struct ip6 *ip6) { uint16_t *tck; uint16_t cksum; if (p->ip4->flags_offset & htons(IP4_F_MASK)) return 0; switch (p->data_proto) { case 1: cksum = ip6_checksum(ip6, htons(p->ip4->length) - p->header_len, 58); cksum = ones_add(p->icmp->cksum, cksum); if (p->icmp->type == 8) { p->icmp->type = 128; p->icmp->cksum = ones_add(cksum, ~(128 - 8)); } else { p->icmp->type = 129; p->icmp->cksum = ones_add(cksum, ~(129 - 0)); } return 0; *** DONE Add default route for v6 hosts p4@ubuntu:~/master-thesis$ mx h1 ip -6 r sudo: unable to resolve host ubuntu 2001:db8::/64 dev h1-eth0 proto kernel metric 256 pref medium fe80::/64 dev h1-eth0 proto kernel metric 256 pref medium default via 2001:db8::42 dev h1-eth0 metric 1024 pref medium p4@ubuntu:~/master-thesis$ *** DONE TEST ping6ing an emulated ipv6 host / Translate icmp <-> icmp6: test v6_static_mapping **** DONE try1: only packets on h1 + controller -> wrong checksum 2019-03-25 + filename=static_nat64-2019-03-25-1121-h1.pcap + intf=h1-eth0 + mx h1 tcpdump -ni h1-eth0 -w static_nat64-2019-03-25-1121-h1.pcap tcpdump: listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes ^C10 packets captured 10 packets received by filter 0 packets dropped by kernel DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> DEBUG:main:reassambled=>>> That looks like NDP is not working again. Why: checksum seems to be incorrect according to wireshark. Why? Checksum is the SAME as in the request -> probably not updated. After inserting marker: it's clear that the checksum code DOES NOT work on the task field! Problem: task field might be overriden for controller use in different table -> need different task field! **** DONE try2: checksum ok, but no packets on h3 ***** DONE Setup a default rule for the IPv4 world to debug on controller Still not seeing the converted packet, however seeing icmp6_ns packets which should not be there: table entry for ns: ff:02:00:00:00:00:00:00:00:00:00:01:ff:00:00:42/128 debug packet seen in controller: DEBUG:main:v6 reassambled=>>> DEBUG:main:v6 reassambled=>>> DEBUG:main:v6 reassambled=>>> DEBUG:main:v6 reassambled=>> debugging MIGHT come from nat64 table! **** DONE try3: re-rewrite: no packets on h3 again (2019-03-30) p4@ubuntu:~$ ~/master-thesis/p4app/sniff-host.sh h1 static_nat64 + cd /home/p4/master-thesis/pcap + host=h1 + name=static_nat64 + date +%F-%H%M + now=2019-03-30-1608 + filename=static_nat64-2019-03-30-1608-h1.pcap + intf=h1-eth0 + mx h1 tcpdump -ni h1-eth0 -w static_nat64-2019-03-30-1608-h1.pcap tcpdump: listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes ^C10 packets captured 10 packets received by filter 0 packets dropped by kernel p4@ubuntu:~$ p4@ubuntu:~/master-thesis/pcap$ ../p4app/sniff-host.sh h3 static_nat64 + cd /home/p4/master-thesis/pcap + host=h3 + name=static_nat64 + date +%F-%H%M + now=2019-03-30-1608 + filename=static_nat64-2019-03-30-1608-h3.pcap + intf=h3-eth0 + mx h3 tcpdump -ni h3-eth0 -w static_nat64-2019-03-30-1608-h3.pcap tcpdump: listening on h3-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes ^C0 packets captured 0 packets received by filter 0 packets dropped by kernel p4@ubuntu:~/master-thesis/pcap$ -> NDP is going to the controller instead of being handled by the switch INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS -> checksums likely broken again due to checksum changes -> solved, test case for verification is #+BEGIN_SRC p4@ubuntu:~$ python ~/master-thesis/p4app/test.py -m v6_static_mapping --debug INFO:main:Trying to reach 10.0.0.1 (2001:db8:1::a00:1) from h1 PING 2001:db8:1::a00:1(2001:db8:1::a00:1) 56 data bytes From 2001:db8::1 icmp_seq=1 Destination unreachable: Address unreachable --- 2001:db8:1::a00:1 ping statistics --- 1 packets transmitted, 0 received, +1 errors, 100% packet loss, time 0ms p4@ubuntu:~$ python ~/master-thesis/p4app/test.py -m ping6_switch --debug INFO:main:Trying to reach 2001:db8::42 from h1 PING 2001:db8::42(2001:db8::42) 56 data bytes 64 bytes from 2001:db8::42: icmp_seq=1 ttl=64 time=6.30 ms --- 2001:db8::42 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 6.304/6.304/6.304/0.000 ms #+END_SRC **** DONE try4: h3 receives packet, but length seems to be off - Seeing frame check sequence error - total length ipv4 = 69 (h3) - ipv6 payload length = 64 (h1) - comes from hdr.ipv4.totalLen = (bit<16>) hdr.ipv6.payload_length + 5; - https://tools.ietf.org/html/rfc791: Total Length is the length of the datagram, measured in octets, including internet header and data. - checksum = 0 -> offset incorrect??? - ipv4 checksum is 0 - nat64 frame length = 98 bytes - theory: ethernet: 48+48+16 = 112 bit -> 12 bytes - nat64: 76 bytes inside ethernet frame - nat64: 69 bytes according to total_len - nat64: -5 bytes = icmp4 = 64 bytes - icmp6 == 64 bytes - diff of 7 bytes :-) - icmp should be: - type+code+checksum = 4 bytes - seq + identifier = 4 bytes - data = variable, source is 56 bytes - real world ping: total_length = 84, 48 bytes icmp data - header length in both cases = 5 - identification 0 in nat64, 0x2cad in real - flags 0 in nat64, 0x4000 (DF) in real - ttl = 64 both - proto = icmp both cases - header checksum = 0 in nat64, set in real - data is shorter in nat64, due to total_len error - real world icmp contains time stamp data ??? - wireshark EXPECTS timestamp data in echo request! + 8 bytes and then data - almost fits diff 7 vs. 8 - 8 bytes in one block in wireshark - after ipv4: 6 + 8 + 3*(16) + 2 = 64 -- wtf?? - icmp6: data == 56 bytes - nat64 and realping4 frame == 98 bytes ***** TODO Correct IPv4 header checksum ***** TODO Correct ICMP header checksum ***** TODO Fix length issue - Seems like total_len is too short - but why? **** DONE try5: packet is good, but routing is "strange": default route == 10.0.0.66 root@ubuntu:~# ip r default via 10.0.0.66 dev h3-eth0 10.0.0.0/24 dev h3-eth0 proto kernel scope link src 10.0.0.1 root@ubuntu:~# **** DONE try6: host sees packet, but does not react on it, manually tring gateway ping p4@ubuntu:~$ mx h3 tcpdump -lni h3-eth0 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on h3-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes 09:06:02.636669 IP 10.1.1.1 > 10.0.0.1: ICMP echo request, id 31058, seq 1, length 64 in h3: root@ubuntu:~# ip a 1: lo: mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 inet 127.0.0.1/8 scope host lo valid_lft forever preferred_lft forever inet6 ::1/128 scope host valid_lft forever preferred_lft forever 2: h3-eth0@if38: mtu 9500 qdisc netem state UP group default qlen 1000 link/ether 00:00:0a:00:00:03 brd ff:ff:ff:ff:ff:ff link-netnsid 0 inet 10.0.0.1/24 scope global h3-eth0 valid_lft forever preferred_lft forever root@ubuntu:~# no arp entries: root@ubuntu:~# arp -an root@ubuntu:~# root@ubuntu:~# ping -c1 10.0.0.66 PING 10.0.0.66 (10.0.0.66) 56(84) bytes of data. From 10.0.0.1 icmp_seq=1 Destination Host Unreachable --- 10.0.0.66 ping statistics --- 1 packets transmitted, 0 received, +1 errors, 100% packet loss, time 0ms root@ubuntu:~# **** DONE try7: checkout dump from ping4_gw-2019-03-31-0916-h3.pcap: regular arp **** DONE Get a real world arp trace root@line:/home/nico/vcs/master-thesis/pcap# tcpdump -ni wlan0 -w ping4_realworld_p7 icmp or arp or host 192.168.4.1 tcpdump: listening on wlan0, link-type EN10MB (Ethernet), capture size 262144 bytes root@line:~# arp -an ? (192.168.4.188) at 00:0d:b9:46:3b:d4 [ether] on wlan0 root@line:~# ping -c1 192.168.4.1 PING 192.168.4.1 (192.168.4.1) 56(84) bytes of data. 64 bytes from 192.168.4.1: icmp_seq=1 ttl=64 time=15.5 ms --- 192.168.4.1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 15.533/15.533/15.533/0.000 ms root@line:~# **** TODO Implement default route handling, maybe implement ARP? ***** DONE create arp table ***** TODO Multiple tables not supported p4c --target bmv2 --arch v1model --std p4-16 "../p4src/static-mapping.p4" -o "/home/p4/master-thesis/p4src" ../p4src/static-mapping.p4(366): error: Program is not supported by this target, because table MyIngress.v6_networks has multiple successors table v6_networks { ^^^^^^^^^^^ Compilation Error ***** Entry in v4_networks? *** DONE Add table name support in debug messages *** DONE Why getting IPv6 packets in INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_NAT64 INFO:main:unhandled reassambled=>> from table TABLE_V4_NETWORKS *** DONE Solve logic problem: Valid headers - If ipv6 header is valid && nat64 will be made and afterwards v4 egress needs to be applied - If ipv4 header is valid && nat46 will be made and afterwards v6 egress needs to be applied *** DONE Check translated fields **** DONE source correctly translated to 10.1.1.1 **** DONE destination correctly translated to 10.0.0.1 -> pings h3 **** DONE egress is correct, comes out at h3 **** DONE protocol 58 is wrong -> should be 1 **** DONE figure out switch() syntax **** DONE transform protocol specific: icmp6 -> icmp ***** DONE Implement double table, as there are no if's in actions ***** DONE Debug Ethernet frame check sequence error -> need to compute checksum https://en.wikipedia.org/wiki/Frame_check_sequence According to Edgar this should not be seen anyway. ***** DONE Calculate ICMP checksum ***** DONE Check field lengths ***** DONE Fix resolve / mac addresses -> ethernet is wrong! INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS According to pcap/static_nat64-2019-04-03-0932-h3.pcap ethernet frame looks good. Still no reply / reaction from host h3. ***** DONE Fix IPv4 header checksum // wrong according to wireshark When & how to update? ***** DONE check packets static_nat64-2019-04-03-0957-h1.pcap: answer not outputted/natted! INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>>> from table TABLE_V6_NETWORKS ****** DONE Is 10.1.1.1/x in the nat64 table? yes Adding entry to lpm match table nat46 match key: LPM-0a:01:01:00/24 action: nat46_static runtime data: 20:01:0d:b8:00:00:00:00:00:00:00:00:00:00:00:00 0a:01:01:00 20:01:0d:b8:00:01:00:00:00:00:00:00:00:00:00:00 Entry has been added with handle 0 ****** DONE if nat46_static is called, why is the ethernet type still ipv4? -> log! ******* DONE nat46 table is applied ****** DONE Check why there is a miss in the table -> c&p bug? [09:57:31.415] [bmv2] [T] [thread 9332] [105.0] [cxt 0] Applying table 'MyIngress.v6_networks' [09:57:31.415] [bmv2] [D] [thread 9332] [105.0] [cxt 0] Looking up key: * hdr.ipv6.dst_addr : 20010db8000000000000000000000001 [09:57:31.415] [bmv2] [D] [thread 9332] [105.0] [cxt 0] Table 'MyIngress.v6_networks': miss **** DONE transform protocol specific: icmp -> icmp6 ***** DONE Make switch answer IPv4 icmp echo request for ****** DONE Make switch respond to ARP ****** DONE Make switch respond to icmp echo request w/ correct checksum (2019-04-03) ****** DONE Correct icmp6 checksum ******* DONE Checksum is SET, but not correct! **** DONE Test result (2019-04-03) p4@ubuntu:~$ python ~/master-thesis/p4app/test.py -m v6_static_mapping PING 2001:db8:1::a00:1(2001:db8:1::a00:1) 56 data bytes 64 bytes from 2001:db8:1::a00:1: icmp_seq=1 ttl=64 time=14.7 ms --- 2001:db8:1::a00:1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 14.750/14.750/14.750/0.000 ms p4@ubuntu:~$ *** DONE Add / check default route for v4 hosts *** DONE Check IPv4 -> IPv6 translation p4@ubuntu:~$ python ~/master-thesis/p4app/test.py -m v4_static_mapping PING 10.1.1.1 (10.1.1.1) 56(84) bytes of data. 64 bytes from 10.1.1.1: icmp_seq=1 ttl=64 time=12.5 ms --- 10.1.1.1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 12.593/12.593/12.593/0.000 ms p4@ubuntu:~$ ** DONE Implement ipv6<->ipv4 udp translation CLOSED: [2019-07-21 Sun 13:57] *** DONE udp: ipv6->ipv4 p4@ubuntu:~$ mx h3 "echo V4-OK | socat - UDP-LISTEN:2342" /usr/bin/mx: line 25: [: too many arguments V6-OK p4@ubuntu:~$ p4@ubuntu:~$ mx h1 "echo V6-OK | socat - UDP6:[2001:db8:1::a00:1]:2342" /usr/bin/mx: line 25: [: too many arguments V4-OK p4@ubuntu:~$ **** pcap/v6_udp-2019-04-11-0840-h1.pcap **** pcap/v6_udp-2019-04-11-0840-h3.pcap *** DONE udp: ipv4->ipv6 CLOSED: [2019-07-21 Sun 13:57] p4@ubuntu:~$ mx h3 "echo V4-OK | socat - UDP:10.1.1.1:2342" /usr/bin/mx: line 25: [: too many arguments V6-OK p4@ubuntu:~$ p4@ubuntu:~$ mx h1 "echo V6-OK | socat - UDP6-LISTEN:2342" /usr/bin/mx: line 25: [: too many arguments V4-OK **** proof create mode 100644 pcap/v4_udp-2019-04-11-0855-h1.pcap create mode 100644 pcap/v4_udp-2019-04-11-0855-h3.pcap ** DONE Implement ipv6<->ipv4 tcp translation *** DONE tcp: v6 -> v4 p4@ubuntu:~$ mx h1 "echo V6-OK | socat - TCP6:[2001:db8:1::a00:1]:2342" /usr/bin/mx: line 25: [: too many arguments V4-OK p4@ubuntu:~$ p4@ubuntu:~$ mx h3 "echo V4-OK | socat - TCP-LISTEN:2342" /usr/bin/mx: line 25: [: too many arguments V6-OK p4@ubuntu:~$ **** Proof create mode 100644 pcap/v6_tcp-2019-04-11-0846-h1.pcap create mode 100644 pcap/v6_tcp-2019-04-11-0846-h3.pcap *** DONE tcp: v4 -> v6 p4@ubuntu:~$ mx h3 "echo V4-OK | socat - TCP:10.1.1.1:2342" /usr/bin/mx: line 25: [: too many arguments V6-OK p4@ubuntu:~$ p4@ubuntu:~$ mx h1 "echo V6-OK | socat - TCP6-LISTEN:2342" /usr/bin/mx: line 25: [: too many arguments V4-OK p4@ubuntu:~$ **** Proof pcap/v4_tcp-2019-04-11-0853-h1.pcap | Bin 0 -> 1174 bytes pcap/v4_tcp-2019-04-11-0853-h3.pcap | Bin 0 -> 1070 bytes ** DONE Update p4c to avoid compiler bug CLOSED: [2019-07-21 Sun 13:59] *** DONE Updating p4c CLOSED: [2019-07-21 Sun 13:57] **** DONE Try1 p4@ubuntu:~/p4-learning/vm/bin$ sh update-p4c.sh update-p4c.sh: 34: update-p4c.sh: Syntax error: "(" unexpected p4@ubuntu:~/p4-learning/vm/bin$ git pull Already up-to-date. p4@ubuntu:~/p4-learning/vm/bin$ git describe --always fb9d0ea p4@ubuntu:~/p4-learning/vm/bin$ p4@ubuntu:~/p4-tools/p4c$ git checkout 1ab1c796677a3a2349df9619d82831a39a6e4437 p4@ubuntu:~/p4-tools/p4c/build$ cmake .. p4@ubuntu:~/p4-tools/p4c/build$ make -j8 **** DONE Need to upgrade RAM / c++ errors / killed **** DONE Compile error from 1ab1c79 [ 33%] Building CXX object frontends/CMakeFiles/frontend.dir/unified_frontend_sources_4.cpp.o [ 37%] Building CXX object frontends/CMakeFiles/frontend.dir/__/ir/ir-generated.cpp.o [ 35%] Building CXX object frontends/CMakeFiles/frontend.dir/unified_frontend_sources_2.cpp.o [ 43%] Built target midend [ 45%] Linking CXX static library libfrontend.a [ 56%] Built target frontend Scanning dependencies of target bmv2backend make[2]: *** No rule to make target '../control-plane/p4runtime/proto/p4/v1/p4data.proto', needed by 'control-plane/google/rpc/status.pb.cc'. Stop. CMakeFiles/Makefile2:1197: recipe for target 'control-plane/CMakeFiles/controlplane.dir/all' failed make[1]: *** [control-plane/CMakeFiles/controlplane.dir/all] Error 2 make[1]: *** Waiting for unfinished jobs.... [ 58%] Building CXX object backends/bmv2/CMakeFiles/bmv2backend.dir/unified_bmv2_backend_common_srcs_1.cpp.o [ 59%] Building CXX object backends/bmv2/CMakeFiles/bmv2backend.dir/unified_bmv2_backend_common_srcs_2.cpp.o [ 61%] Linking CXX static library libbmv2backend.a [ 61%] Built target bmv2backend Makefile:138: recipe for target 'all' failed make: *** [all] Error 2 p4@ubuntu:~/p4-tools/p4c/build$ cd .. p4@ubuntu:~/p4-tools/p4c$ git describe --always 1ab1c79 p4@ubuntu:~/p4-tools/p4c$ **** DONE Upgrading to latest master: 46609cd -> fails p4@ubuntu:~/p4-tools/p4c$ git describe --always 46609cd p4@ubuntu:~/p4-tools/p4c$ cd build/ p4@ubuntu:~/p4-tools/p4c/build$ make clean frontends/CMakeFiles/frontend.dir/build.make:93: warning: overriding recipe for target 'frontends/parsers/v1/v1parser.output' frontends/CMakeFiles/frontend.dir/build.make:74: warning: ignoring old recipe for target 'frontends/parsers/v1/v1parser.output' p4@ubuntu:~/p4-tools/p4c/build$ cmake .. && make -j8 [ 50%] Building CXX object frontends/CMakeFiles/frontend.dir/unified_frontend_sources_5.cpp.o [ 51%] Building CXX object frontends/CMakeFiles/frontend.dir/unified_frontend_sources_6.cpp.o [ 53%] Linking CXX static library libir.a [ 53%] Built target ir [ 54%] Building CXX object frontends/CMakeFiles/frontend.dir/unified_frontend_sources_7.cpp.o [ 56%] Linking CXX static library libfrontend.a [ 56%] Built target frontend make[2]: *** No rule to make target '../control-plane/p4runtime/proto/p4/v1/p4data.proto', needed by 'control-plane/google/rpc/status.pb.cc'. Stop. CMakeFiles/Makefile2:1197: recipe for target 'control-plane/CMakeFiles/controlplane.dir/all' failed make[1]: *** [control-plane/CMakeFiles/controlplane.dir/all] Error 2 make[1]: *** Waiting for unfinished jobs.... Scanning dependencies of target bmv2backend [ 58%] Building CXX object backends/bmv2/CMakeFiles/bmv2backend.dir/unified_bmv2_backend_common_srcs_2.cpp.o [ 59%] Building CXX object backends/bmv2/CMakeFiles/bmv2backend.dir/unified_bmv2_backend_common_srcs_1.cpp.o [ 61%] Linking CXX static library libbmv2backend.a [ 61%] Built target bmv2backend Makefile:138: recipe for target 'all' failed make: *** [all] Error 2 p4@ubuntu:~/p4-tools/p4c/build$ **** DONE Build on notebook succeeds 900557c5 [16:37] line:p4c% git describe --always 900557c5 **** DONE Build on VM with 900557c5 after removing build/: no, stay with old p4c CLOSED: [2019-07-21 Sun 13:57] ** DONE Get p4 VM / vagrant running: running on VM CLOSED: [2019-07-21 Sun 13:57] *** DONE install libvirtd-daemon *** DONE install ebtables *** DONE install dnsmasq ** DONE Get p4c & co. running eon the notebook: no, stay on VM CLOSED: [2019-07-21 Sun 13:58] *** DONE mininet via packages *** DONE p4c (virtualenv-with-site) [17:43] line:build% make install [ 0%] Built target update_includes [ 0%] Built target linkgraphs [ 0%] Built target linkbmv2 [ 0%] Built target linkp4cebpf [ 0%] Built target linkp4test [ 1%] Built target p4c_driver [ 4%] Built target p4ctoolkit [ 12%] Built target irgenerator [ 14%] Generating IR class files [ 14%] Built target genIR [ 18%] Built target ir [ 18%] Built target mkv1dirs [ 18%] Built target mkp4dirs [ 45%] Built target frontend [ 51%] Built target midend [ 51%] Built target mkP4configdir [ 64%] Built target controlplane [ 68%] Built target bmv2backend [ 75%] Built target p4c-bm2-psa [ 81%] Built target p4c-bm2-ss [ 84%] Built target p4c-ebpf [ 87%] Built target p4test [ 90%] Built target p4c-graphs [ 93%] Built target gtest [100%] Built target gtestp4c Install the project... -- Install configuration: "RELEASE" -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include/p4d2model.p4 -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include/v1model.p4 -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include/core.p4 -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include/psa.p4 -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4c -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/driver.py -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/util.py -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/config.py -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/__init__.py -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/main.py -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/p4c.bmv2.cfg -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4c_src/p4c.ebpf.cfg -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4c-bm2-ss -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4c-bm2-psa -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4c-ebpf -- Up-to-date: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/share/p4c/p4include/ebpf_model.p4 -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4test -- Installing: /home/nico/vcs/master-thesis/support/p4c-installation/bin/p4c-graphs (virtualenv-with-site) [0:42] line:build% ls /home/nico/vcs/master-thesis/support/p4c-installation/bin/ p4c p4c-bm2-psa p4c-bm2-ss p4c-ebpf p4c-graphs p4test (virtualenv-with-site) [0:42] line:build% *** DONE install behavioral-model CLOSED: [2019-07-13 Sat 21:49] *** DONE Debug / reread the virtualbox script from the lecture CLOSED: [2019-07-13 Sat 21:50] *** DONE Get p4c installed / running CLOSED: [2019-07-13 Sat 21:50] https://github.com/p4lang/p4c **** log [16:31] line:p4c% git submodule update --init --recursive root@line:~# apt install bison \ > build-essential \ > cmake \ > flex \ > g++ \ > libboost-dev \ > libboost-graph-dev \ > libboost-iostreams1.58-dev \ > libfl-dev \ > libgc-dev \ > libgmp-dev \ > pkg-config \ > python-ipaddr \ > python-pip \ > python-setuptools \ > tcpdump Reading package lists... Done Building dependency tree Reading state information... Done Package libboost-iostreams1.58-dev is not available, but is referred to by another package. This may mean that the package is missing, has been obsoleted, or is only available from another source E: Package 'libboost-iostreams1.58-dev' has no installation candidate root@line:~# apt install libpcap-dev libelf-dev llvm clang iproute2 net-tools [16:33] line:p4c% . ~/vcs/master-thesis/support/virtualenv2/bin/activate (virtualenv2) [16:35] line:p4c% pip install tenjin \ pyroute2 \ ply==3.8 \ scapy==2.4.0 **** Using newer version of libboost-iostreams1.58-dev **** buidling (virtualenv2) [16:36] line:p4c% mkdir build && \ cd build && \ cmake .. '-DCMAKE_CXX_FLAGS:STRING=-O3' **** missing protobuf (virtualenv2) [16:36] line:p4c% mkdir build && \ cd build && \ cmake .. '-DCMAKE_CXX_FLAGS:STRING=-O3' cd build && \ cmake .. '-DCMAKE_CXX_FLAGS:STRING=-O3'-- The C compiler identification is GNU 8.3.0 -- The CXX compiler identification is GNU 8.3.0 -- Check for working C compiler: /usr/bin/cc -- Check for working C compiler: /usr/bin/cc -- works -- Detecting C compiler ABI info -- Detecting C compiler ABI info - done -- Detecting C compile features -- Detecting C compile features - done -- Check for working CXX compiler: /usr/bin/c++ -- Check for working CXX compiler: /usr/bin/c++ -- works -- Detecting CXX compiler ABI info -- Detecting CXX compiler ABI info - done -- Detecting CXX compile features -- Detecting CXX compile features - done -- Found PythonInterp: /home/nico/vcs/master-thesis/support/virtualenv2/bin/python (found version "2.7.16") -- Found FLEX: /usr/bin/flex (found version "2.6.4") -- Found BISON: /usr/bin/bison (found suitable version "3.3.2", minimum required is "3.0.2") CMake Error at /usr/share/cmake-3.13/Modules/FindPackageHandleStandardArgs.cmake:137 (message): Could NOT find Protobuf (missing: Protobuf_INCLUDE_DIR) (Required is at least version "3.0.0") Call Stack (most recent call first): /usr/share/cmake-3.13/Modules/FindPackageHandleStandardArgs.cmake:378 (_FPHSA_FAILURE_MESSAGE) /usr/share/cmake-3.13/Modules/FindProtobuf.cmake:595 (FIND_PACKAGE_HANDLE_STANDARD_ARGS) CMakeLists.txt:81 (find_package) -- Configuring incomplete, errors occurred! See also "/home/nico/vcs/master-thesis/support/p4c/build/CMakeFiles/CMakeOutput.log". See also "/home/nico/vcs/master-thesis/support/p4c/build/CMakeFiles/CMakeError.log". (virtualenv2) [16:36] line:build% apt search protobuf (virtualenv2) [16:38] line:build% sudo apt install python-protobuf protobuf-compiler (virtualenv2) [16:38] line:build% cmake .. '-DCMAKE_CXX_FLAGS:STRING=-O3' -- Found Protobuf: /usr/lib/x86_64-linux-gnu/libprotobuf.a;-lpthread (found suitable version "3.6.1", minimum required is "3.0.0") -- Boost version: 1.67.0 -- Found the following Boost libraries: -- iostreams -- regex -- Found LibGc: /usr/lib/x86_64-linux-gnu/libgccpp.so (found suitable version "7.6.4", minimum required is "7.2.0") -- Found Threads: TRUE -- Found LibGmp: /usr/lib/x86_64-linux-gnu/libgmpxx.so -- Looking for clock_gettime in rt -- Looking for clock_gettime in rt - found -- Looking for execinfo.h -- Looking for execinfo.h - found -- Looking for ucontext.h -- Looking for ucontext.h - found -- Looking for C++ include cxxabi.h -- Looking for C++ include cxxabi.h - found -- Looking for memchr -- Looking for memchr - found -- Looking for pipe2 -- Looking for pipe2 - found -- Looking for GC_print_stats -- Looking for GC_print_stats - found -- Found PY_difflib: /usr/lib/python2.7/difflib.pyc -- Found PY_shutil: /usr/lib/python2.7/shutil.pyc -- Found PY_tempfile: /usr/lib/python2.7/tempfile.pyc -- Found PY_subprocess: /usr/lib/python2.7/subprocess.pyc -- Found PY_re: /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/re.pyc -- Could NOT find Doxygen (missing: DOXYGEN_EXECUTABLE) -- Program 'simple_switch_CLI' (https://github.com/p4lang/behavioral-model.git) not found; Searched . Will not run BMv2 tests. (missing: SIMPLE_SWITCH SIMPLE_SWITCH_CLI) -- Program 'psa_switch_CLI' (https://github.com/p4lang/behavioral-model.git) not found; Searched . Will not run PSA BMv2 tests. (missing: PSA_SWITCH PSA_SWITCH_CLI) -- Performing Test _HAVE_OPTION_Wall_ -- Performing Test _HAVE_OPTION_Wall_ - Success -- Performing Test _HAVE_OPTION_Wextra_ -- Performing Test _HAVE_OPTION_Wextra_ - Success -- Performing Test _HAVE_OPTION_Wnooverloadedvirtual_ -- Performing Test _HAVE_OPTION_Wnooverloadedvirtual_ - Success -- Performing Test _HAVE_OPTION_Wnodeprecated_ -- Performing Test _HAVE_OPTION_Wnodeprecated_ - Success -- Using the GNU gold linker. -- Available extensions CMake Warning at backends/bmv2/CMakeLists.txt:193 (MESSAGE): BMv2 simple switch is not available, not adding v1model BMv2 tests CMake Warning at backends/bmv2/CMakeLists.txt:199 (MESSAGE): BMv2 PSA switch is not available, not adding PSA BMv2 tests -- Found LLVM 7.0.1 -- Added 14 tests to 'ebpf-kernel' (0 xfails) -- Added 14 tests to 'ebpf-bcc' (0 xfails) -- Added 14 tests to 'ebpf' (0 xfails) -- Added 161 tests to 'p4' (0 xfails) -- Added 506 tests to 'p4' (4 xfails) -- Added 204 tests to 'p14_to_16' (0 xfails) -- CTest parallel: -j 8 -- Configuring done -- Generating done -- Build files have been written to: /home/nico/vcs/master-thesis/support/p4c/build **** testing in build directory: works /home/nico/vcs/master-thesis/support/p4c/build **** Changing install path CMAKE_INSTALL_PREFIX cmake .. '-DCMAKE_CXX_FLAGS:STRING=-O3' -DCMAKE_INSTALL_PREFIX=/home/nico/vcs/master-thesis/support/p4c-installation *** DONE Get p4utils running (?) CLOSED: [2019-07-13 Sat 21:50] *** log of python, p4app, p4c installation [16:16] line:support% virtualenv virtualenv2 Running virtualenv with interpreter /usr/bin/python2 New python executable in /home/nico/vcs/master-thesis/support/virtualenv2/bin/python2 Also creating executable in /home/nico/vcs/master-thesis/support/virtualenv2/bin/python Installing setuptools, pkg_resources, pip, wheel...done. [16:16] line:support% [16:18] line:p4-utils-nsg% . ~/vcs/master-thesis/support/virtualenv2/bin/activate (virtualenv2) [16:19] line:p4-utils-nsg% which pip /home/nico/vcs/master-thesis/support/virtualenv2/bin/pip (virtualenv2) [16:19] line:p4-utils-nsg% **** pip install -e . ***** Missing python development headers copying psutil/tests/test_memory_leaks.py -> build/lib.linux-x86_64-2.7/psutil/tests running build_ext building 'psutil._psutil_linux' extension creating build/temp.linux-x86_64-2.7 creating build/temp.linux-x86_64-2.7/psutil x86_64-linux-gnu-gcc -pthread -DNDEBUG -g -fwrapv -O2 -Wall -Wstrict-prototypes -fno-strict-aliasing -Wdate-time -D_FORTIFY_SOURCE=2 -g -fdebug-prefix-map=/build/python2.7-UboFgi/python2.7-2.7.16~rc1=. -fstack-protector-strong -Wformat -Werror=format-security -fPIC -DPSUTIL_POSIX=1 -DPSUTIL_VERSION=561 -DPSUTIL_LINUX=1 -I/usr/include/python2.7 -c psutil/_psutil_common.c -o build/temp.linux-x86_64-2.7/psutil/_psutil_common.o psutil/_psutil_common.c:9:10: fatal error: Python.h: No such file or directory #include ^~~~~~~~~~ compilation terminated. error: command 'x86_64-linux-gnu-gcc' failed with exit status 1 root@line:~# apt install python2-dev ***** installing, but missing mininet.net (virtualenv2) [16:21] line:p4-utils-nsg% pip install -e "." DEPRECATION: Python 2.7 will reach the end of its life on January 1st, 2020. Please upgrade your Python as Python 2.7 won't be maintained after that date. A future version of pip will drop support for Python 2.7. Obtaining file:///home/nico/vcs/master-thesis/support/p4-utils-nsg Requirement already satisfied: setuptools in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from p4utils==0.2) (40.8.0) Requirement already satisfied: networkx in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from p4utils==0.2) (2.2) Requirement already satisfied: ipaddress in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from p4utils==0.2) (1.0.22) Requirement already satisfied: scapy in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from p4utils==0.2) (2.4.2) Requirement already satisfied: psutil in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from p4utils==0.2) (5.6.1) Requirement already satisfied: decorator>=4.3.0 in /home/nico/vcs/master-thesis/support/virtualenv2/lib/python2.7/site-packages (from networkx->p4utils==0.2) (4.3.2) Installing collected packages: p4utils Found existing installation: p4utils 0.2 Not uninstalling p4utils at /home/nico/vcs/master-thesis/support/p4-utils-nsg, outside environment /home/nico/vcs/master-thesis/support/virtualenv2 Can't uninstall 'p4utils'. No files were found to uninstall. Running setup.py develop for p4utils Successfully installed p4utils (virtualenv2) [16:21] line:p4-utils-nsg% *** log Try2: using virtualenv that uses site packages for using mininet [17:13] line:support% virtualenv --system-site-packages virtualenv-with-site Running virtualenv with interpreter /usr/bin/python2 New python executable in /home/nico/vcs/master-thesis/support/virtualenv-with-site/bin/python2 Also creating executable in /home/nico/vcs/master-thesis/support/virtualenv-with-site/bin/python Installing setuptools, pkg_resources, pip, wheel...done. [17:23] line:support% . ./virtualenv-with-site/bin/activate (virtualenv-with-site) [17:23] line:support% (virtualenv-with-site) [17:23] line:p4-utils-nsg% pip install -e . (virtualenv-with-site) [17:23] line:p4-utils-nsg% pip install -e . DEPRECATION: Python 2.7 will reach the end of its life on January 1st, 2020. Please upgrade your Python as Python 2.7 won't be maintained after that date. A future version of pip will drop support for Python 2.7. Obtaining file:///home/nico/vcs/master-thesis/support/p4-utils-nsg Requirement already satisfied: setuptools in /home/nico/vcs/master-thesis/support/virtualenv-with-site/lib/python2.7/site-packages (from p4utils==0.2) (40.8.0) Collecting networkx (from p4utils==0.2) Requirement already satisfied: ipaddress in /usr/lib/python2.7/dist-packages (from p4utils==0.2) (1.0.17) Requirement already satisfied: scapy in /usr/lib/python2.7/dist-packages (from p4utils==0.2) (2.4.0) Collecting psutil (from p4utils==0.2) Collecting decorator>=4.3.0 (from networkx->p4utils==0.2) Using cached https://files.pythonhosted.org/packages/f1/cd/7c8240007e9716b14679bc217a1baefa4432aa30394f7e2ec40a52b1a708/decorator-4.3.2-py2.py3-none-any.whl Installing collected packages: decorator, networkx, psutil, p4utils Running setup.py develop for p4utils Successfully installed decorator-4.3.2 networkx-2.2 p4utils psutil-5.6.1 (virtualenv-with-site) [17:23] line:p4-utils-nsg% which p4run /home/nico/vcs/master-thesis/support/virtualenv-with-site/bin/p4run (virtualenv-with-site) [17:24] line:p4-utils-nsg% p4c --target bmv2 --arch v1model --std p4-16 "../p4src/static-mapping.p4" -o "/home/nico/vcs/master-thesis/p4src" ../p4src/static-mapping.p4(80): [--Wwarn=unused] warning: Table ndp_answer is not used; removing table ndp_answer { ^^^^^^^^^^ ../p4src/static-mapping.p4(96): [--Wwarn=unused] warning: Table port2mcast is not used; removing table port2mcast { ^^^^^^^^^^ ../p4src/static-mapping.p4(111): [--Wwarn=unused] warning: Table addr2mcast is not used; removing table addr2mcast { ^^^^^^^^^^ ../p4src/static-mapping.p4(128): [--Wwarn=unused] warning: Table ndp is not used; removing table ndp { ^^^ Switch port mapping: s1: 1:h1 2:h2 3:h3 4:h4 5:sw-cpu *** Trying local vagrant VM **** libvirtd missing user root@line:~# libvirtd 2019-03-12 16:39:14.556+0000: 20235: info : libvirt version: 5.0.0, package: 1 (Guido Günther Wed, 16 Jan 2019 10:31:33 +0100) 2019-03-12 16:39:14.556+0000: 20235: info : hostname: line 2019-03-12 16:39:14.556+0000: 20235: error : virGetUserID:1038 : invalid argument: Failed to parse user 'libvirt-qemu' 2019-03-12 16:39:14.556+0000: 20235: error : virStateInitialize:662 : Initialization of QEMU state driver failed: invalid argument: Failed to parse user 'libvirt-qemu' 2019-03-12 16:39:14.556+0000: 20235: error : daemonRunStateInit:799 : Driver state initialization failed root@line:~# useradd -m libvirt-qemu root@line:~# root@line:~# strace -fF -e open libvirtd strace: deprecated option -F ignored strace: Process 20602 attached strace: Process 20603 attached strace: Process 20604 attached strace: Process 20605 attached strace: Process 20606 attached strace: Process 20607 attached strace: Process 20608 attached strace: Process 20609 attached strace: Process 20610 attached strace: Process 20611 attached strace: Process 20612 attached strace: Process 20613 attached strace: Process 20614 attached strace: Process 20615 attached strace: Process 20616 attached strace: Process 20617 attached strace: Process 20618 attached [pid 20618] +++ exited with 0 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20618, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20619 attached [pid 20619] +++ exited with 0 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20619, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20620 attached strace: Process 20621 attached strace: Process 20622 attached [pid 20622] +++ exited with 0 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20622, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20623 attached [pid 20623] +++ exited with 0 +++ [pid 20621] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20623, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20624 attached [pid 20624] +++ exited with 0 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20624, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20625 attached [pid 20625] +++ exited with 0 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20625, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20626 attached [pid 20626] +++ exited with 0 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20626, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20627 attached [pid 20627] +++ exited with 0 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20627, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20628 attached [pid 20621] +++ exited with 0 +++ strace: Process 20629 attached strace: Process 20630 attached strace: Process 20631 attached strace: Process 20632 attached strace: Process 20633 attached [pid 20631] +++ exited with 0 +++ [pid 20633] +++ exited with 1 +++ [pid 20630] +++ exited with 0 +++ [pid 20628] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20630, si_uid=1001, si_status=0, si_utime=0, si_stime=0} --- [pid 20632] +++ exited with 1 +++ [pid 20629] +++ exited with 1 +++ [pid 20628] +++ exited with 1 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20628, si_uid=1001, si_status=1, si_utime=1, si_stime=0} --- 2019-03-12 16:40:53.098+0000: 20617: info : libvirt version: 5.0.0, package: 1 (Guido Günther Wed, 16 Jan 2019 10:31:33 +0100) 2019-03-12 16:40:53.098+0000: 20617: info : hostname: line 2019-03-12 16:40:53.098+0000: 20617: error : virQEMUCapsNewForBinaryInternal:4681 : internal error: Failed to probe QEMU binary with QMP: qemu-system-i386: cannot create PID file: Cannot open pid file: Permission denied 2019-03-12 16:40:53.098+0000: 20617: warning : virQEMUCapsLogProbeFailure:4628 : Failed to probe capabilities for /usr/bin/qemu-system-i386: internal error: Failed to probe QEMU binary with QMP: qemu-system-i386: cannot create PID file: Cannot open pid file: Permission denied strace: Process 20634 attached strace: Process 20635 attached strace: Process 20636 attached strace: Process 20637 attached strace: Process 20638 attached strace: Process 20639 attached [pid 20637] +++ exited with 0 +++ [pid 20639] +++ exited with 1 +++ [pid 20636] +++ exited with 0 +++ [pid 20634] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20636, si_uid=1001, si_status=0, si_utime=0, si_stime=0} --- [pid 20638] +++ exited with 1 +++ [pid 20635] +++ exited with 1 +++ [pid 20634] +++ exited with 1 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20634, si_uid=1001, si_status=1, si_utime=1, si_stime=0} --- 2019-03-12 16:40:53.145+0000: 20617: error : virQEMUCapsNewForBinaryInternal:4681 : internal error: Failed to probe QEMU binary with QMP: qemu-system-x86_64: cannot create PID file: Cannot open pid file: Permission denied 2019-03-12 16:40:53.145+0000: 20617: warning : virQEMUCapsLogProbeFailure:4628 : Failed to probe capabilities for /usr/bin/qemu-system-x86_64: internal error: Failed to probe QEMU binary with QMP: qemu-system-x86_64: cannot create PID file: Cannot open pid file: Permission denied strace: Process 20640 attached [pid 20640] +++ exited with 0 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20640, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20641 attached [pid 20641] +++ exited with 0 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20641, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- strace: Process 20642 attached [pid 20642] +++ exited with 2 +++ [pid 20601] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20642, si_uid=0, si_status=2, si_utime=0, si_stime=0} --- strace: Process 20643 attached [pid 20643] +++ exited with 0 +++ [pid 20617] --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=20643, si_uid=0, si_status=0, si_utime=0, si_stime=0} --- [pid 20617] +++ exited with 0 +++ [pid 20601] --- SIGWINCH {si_signo=SIGWINCH, si_code=SI_KERNEL} --- ^Cstrace: Process 20601 detached strace: Process 20602 detached strace: Process 20603 detached strace: Process 20604 detached strace: Process 20605 detached strace: Process 20606 detached strace: Process 20607 detached strace: Process 20608 detached strace: Process 20609 detached strace: Process 20610 detached strace: Process 20611 detached strace: Process 20612 detached strace: Process 20613 detached strace: Process 20614 detached strace: Process 20615 detached strace: Process 20616 detached strace: Process 20620 detached *** Creating network *** Adding hosts: h1 h2 h3 h4 *** Adding switches: Cannot find required executable simple_switch. Please make sure that it is installed and available in your $PATH: (/home/nico/vcs/master-thesis/support/virtualenv-with-site/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/home/nico/vcs/master-thesis/support/p4c/build/) (virtualenv-with-site) root@line:/home/nico/vcs/master-thesis/p4app# ** TODO Port to Hardware *** NetPFGA documentation **** Port mapping | 1 | nf0 | *** DONE Get access to tofino: no, NDA issues *** DONE Get NetFPGA running **** DONE Understand the simulations part -> not atm **** DONE Install vivado **** DONE Install SDNET **** DONE fix license issue make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' echo ok ok make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' sdnet ./src/switch_calc.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts Xilinx SDNet Compiler version 2018.2, build 2342300 Cannot obtain license make: *** [Makefile:67: compile_no_cpp_test] Error 1 nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ **** DONE Testing / compiling / uploading stuff to the NetPFGA -- CLOSED: [2019-07-21 Sun 13:56] https://github.com/NetFPGA/P4-NetFPGA-public/wiki/Tutorial-Assignments ***** DONE try 1 According to DO NOT USE THIS:: ==> https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/NetFPGA-SUME-Reference-Learning-Switch root@loch:~/projects/P4-NetFPGA/tools/scripts# ./nf_test.py hw --major learning --minor sw Please set the environment variable 'SUME_FOLDER' to point to the local NetFPGA source Traceback (most recent call last): File "./nf_test.py", line 632, in identifyWorkDir() File "./nf_test.py", line 418, in identifyWorkDir project = os.path.basename(os.path.abspath(os.environ['NF_DESIGN_DIR'])) File "/usr/lib/python2.7/UserDict.py", line 40, in __getitem__ raise KeyError(key) KeyError: 'NF_DESIGN_DIR' root@loch:~/projects/P4-NetFPGA/tools/scripts# Trying https://github.com/NetFPGA/P4-NetFPGA-public/wiki/Tutorial-Assignments root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# mv switch_calc.p4 switch_calc_orig.p4 root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# ln -s switch_calc_solution.p4 switch_calc.p4 root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src# root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc# make make -C src/ clean make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' rm -f *.sdnet *.tbl .sdnet_switch_info.dat make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' make -C testdata/ clean make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' rm -rf nf_sume_sdnet_ip/ rm -f rm -f sw/config_tables.c make -C src/ make[1]: Entering directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' p4c-sdnet -o .sdnet --sdnet_info .sdnet_switch_info.dat _solution.p4 make[1]: p4c-sdnet: Command not found make[1]: *** [Makefile:34: all] Error 127 make[1]: Leaving directory '/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' make: *** [Makefile:60: frontend] Error 2 root@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc# As nico: nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ make make -C src/ clean make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' rm -f *.sdnet *.tbl .sdnet_switch_info.dat make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' make -C testdata/ clean make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/testdata' rm -rf nf_sume_sdnet_ip/ rm -f rm -f sw/config_tables.c make -C src/ make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' p4c-sdnet -o switch_calc.sdnet --sdnet_info .sdnet_switch_info.dat switch_calc_solution.p4 cpp: error: switch_calc_solution.p4: No such file or directory cpp: warning: ‘-x c’ after last input file has no effect cpp: fatal error: no input files compilation terminated. error: Preprocessor returned exit code 256; aborting compilation error: 1 errors encountered, aborting compilation make[1]: *** [Makefile:34: all] Error 1 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src' make: *** [Makefile:60: frontend] Error 2 nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc$ nico@loch:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/src$ cp switch_calc.p4 switch_calc_solution.p4 $ cd $P4_PROJECT_DIR/nf_sume_sdnet_ip/SimpleSumeSwitch $ ./vivado_sim.bash. ***** DONE try 2: create an almost empty p4 project based on switch_calc ****** DONE frontend build: ok ****** DONE testdata: skipped ****** DONE compile_cpp_test: ok ****** DONE run_scripts: ok ****** DONE cpp_test: error CLOSED: [2019-07-21 Sun 13:59] # Fix introduced for SDNet 2017.4 sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash # Fix introduced for SDNet 2018.2 sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ cp: cannot stat 'src/*.tbl': No such file or directory make: *** [Makefile:23: cpp_test] Error 1 [23:12] loch:minip4% ******* DONE Removing cp of *tbl ******* DONE Removing pcap copy ******* DONE removing all cp's CLOSED: [2019-07-21 Sun 13:59] ***** DONE try 3: good until step 4; broken at the simulation ****** log 1 [15:26] rainbow:~% echo $P4_PROJECT_DIR /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 [15:26] rainbow:~% [15:26] rainbow:~% cd $P4_PROJECT_DIR && make Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... Compiling module work.S_SYNCER_for_S_SYNCER_for_TopDep... Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=2... Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=1... Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... Compiling module work.S_SYNCER_for_TopDeparser Compiling module work.xpm_memory_base(MEMORY_TYPE=1,ME... Compiling module work.xpm_fifo_base(FIFO_MEMORY_TYPE=2... Compiling module work.xpm_fifo_sync(FIFO_MEMORY_TYPE="... Compiling module work.xpm_fifo_base(COMMON_CLOCK=0,FIF... Compiling module work.xpm_fifo_async(FIFO_MEMORY_TYPE=... Compiling module work.S_SYNCER_for__OUT_ Compiling module work.S_CONTROLLER_SimpleSumeSwitch Compiling module work.SimpleSumeSwitch Compiling module work.TB_System_Stim Compiling module work.Check Compiling module work.SimpleSumeSwitch_tb Compiling module work.glbl ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... [15:29] rainbow:SimpleSumeSwitch% ./vivado_sim.bash ****** trying to find the error in the generated c code [15:29] rainbow:SimpleSumeSwitch% find . -name xsim_3.c ./xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c ****** error seems to occur in xelab ***** DONE try 4: vivado 2018.2 instead of 2018.3 Probably both ok - errors are the same ***** DONE new error: /usr/include/stdio.h:27:36: fatal error: bits/libc-header-start.h: No such file or directory apt-get install gcc-multilib g++-multilib ***** DONE same error Compiling module work.glbl ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... [17:47] rainbow:SimpleSumeSwitch% ***** DONE with verbosity / fixing ncurses dependency ICR Memory Usage: 5072KB, 18432KB /opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang -fPIC -c -std=gnu89 -nobuiltininc -nostdinc++ -w -Wl,--unres olved-symbols=ignore-in-object-files -fbracket-depth=1048576 -I/opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/../li b/clang/3.1/include -fPIC -m64 -I"/opt/Xilinx/Vivado/2018.2/data/xsim/include" "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/ob j/xsim_3.c" -O0 -sim -o "xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.lnx64.o" -DXILINX_SIMULATOR /opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang: error while loading shared libraries: libncurses.so.5: cannot open shared object file: No such file or directory ERROR: [XSIM 43-3409] Failed to compile generated C file xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/obj/xsim_3.c. ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... [20:00] rainbow:SimpleSumeSwitch% root@rainbow:~# apt install libncurses5-dev [20:02] rainbow:~% ldd /opt/Xilinx/Vivado/2018.2/data/../tps/llvm/3.1/lnx64.o/bin/clang linux-vdso.so.1 (0x00007ffda6bf6000) libz.so.1 => /lib/x86_64-linux-gnu/libz.so.1 (0x00007f8e23208000) libpthread.so.0 => /lib/x86_64-linux-gnu/libpthread.so.0 (0x00007f8e231e7000) libncurses.so.5 => not found librt.so.1 => /lib/x86_64-linux-gnu/librt.so.1 (0x00007f8e231dc000) libdl.so.2 => /lib/x86_64-linux-gnu/libdl.so.2 (0x00007f8e231d6000) libstdc++.so.6 => /lib/x86_64-linux-gnu/libstdc++.so.6 (0x00007f8e22ff5000) libm.so.6 => /lib/x86_64-linux-gnu/libm.so.6 (0x00007f8e22ea5000) libgcc_s.so.1 => /lib/x86_64-linux-gnu/libgcc_s.so.1 (0x00007f8e22e8b000) libc.so.6 => /lib/x86_64-linux-gnu/libc.so.6 (0x00007f8e22ca0000) /lib64/ld-linux-x86-64.so.2 (0x00007f8e2323f000) [20:02] rainbow:~% root@rainbow:~# apt install libncurses5 ***** DONE Run step 4: ok fully works now with switch_calc_headrs and gen_testdata ****** command cd $P4_PROJECT_DIR && make ****** DONE commented out the test data step to progress ****** DONE re-enable test data cp step => data required later CLOSED: [2019-07-21 Sun 13:57] all: clean frontend compile_no_cpp_test run_scripts cp src/*.tbl ${SDNET_OUT_DIR}/${P4_SWITCH}/ cp testdata/*.txt ${SDNET_OUT_DIR}/${P4_SWITCH}/ cp testdata/*.axi ${SDNET_OUT_DIR}/${P4_SWITCH}/ # Fix introduced for SDNet 2018.2 sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ cp: cannot stat 'testdata/*.txt': No such file or directory make: *** [Makefile:17: all] Error 1 [15:46] rainbow:minip4% In testdata/Makefile: all: echo ok all2: ./gen_testdata.py ${SUME_SDNET}/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap ${SUME_SDNET}/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap Changing back to all: make -C testdata/ make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' ./gen_testdata.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap Traceback (most recent call last): File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi", line 108, in write_to_file(args.file_pcap, args.output) File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi", line 88, in write_to_file for pkt in rdpcap(file_in): File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 728, in rdpcap with PcapReader(filename) as fdesc: File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 751, in __call__ filename, fdesc, magic = cls.open(filename) File "/usr/lib/python2.7/dist-packages/scapy/utils.py", line 778, in open fdesc = open(filename, "rb") IOError: [Errno 2] No such file or directory: 'src.pcap' make[1]: *** [Makefile:5: all] Error 1 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' make: *** [Makefile:32: frontend] Error 2 [15:47] rainbow:minip4% ****** DONE debug gen_testdata.py CLOSED: [2019-07-21 Sun 13:57] ***** DONE Run step 5: ok ****** command #+BEGIN_EXAMPLE cd $P4_PROJECT_DIR/nf_sume_sdnet_ip/SimpleSumeSwitch && ./vivado_sim.bash #+END_EXAMPLE ***** DONE Run step 6: ok => config_writes ****** command #+BEGIN_CENTER cd $P4_PROJECT_DIR && make config_writes #+END_CENTER ***** DONE Run step 7: ok - install sume library core ****** command #+BEGIN_CENTER cd $P4_PROJECT_DIR && make uninstall_sdnet && make install_sdnet #+END_CENTER ****** log # set_property value_format {long} [ipx::get_user_parameter SDNET_ADDR_WIDTH [ipx::current_core]] # ipx::add_subcore xilinx.com:ip:axis_data_fifo:1.1 [ipx::get_file_groups xilinx_anylanguagesynthesis -of_objects [ipx::current_core]] # ipx::add_subcore xilinx.com:ip:axis_data_fifo:1.1 [ipx::get_file_groups xilinx_anylanguagebehavioralsimulation -of_objects [ipx::current_core]] # ipx::add_bus_parameter FREQ_HZ [ipx::get_bus_interfaces m_axis -of_objects [ipx::current_core]] # ipx::add_bus_parameter FREQ_HZ [ipx::get_bus_interfaces s_axis -of_objects [ipx::current_core]] # update_ip_catalog -rebuild INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/lib/hw'. WARNING: [IP_Flow 19-3656] If you move the project, the path for repository '/home/nico/projects/P4-NetFPGA/lib/hw' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj'.) # ipx::infer_user_parameters [ipx::current_core] # ipx::check_integrity [ipx::current_core] INFO: [IP_Flow 19-861] XGUI layout file basename "xgui/nf_sume_sdnet_v1_0.tcl" does not have the current IP _v format. If the IP name or version was changed recently, recreate this file to update the file format. INFO: [IP_Flow 19-2181] Payment Required is not set for this core. INFO: [IP_Flow 19-2187] The Product Guide file is missing. INFO: [Ipptcl 7-1486] check_integrity: Integrity check passed. # ipx::save_core [ipx::current_core] # update_ip_catalog # close_project INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:18:13 2019... make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip' [15:18] rainbow:minip4% cd $P4_PROJECT_DIR && make uninstall_sdnet && make install_sdnet ***** DONE run step 8: just copies a python script ****** run command #+BEGIN_CENTER cd $NF_DESIGN_DIR/test/sim_switch_default && make #+END_CENTER ****** log [15:18] rainbow:minip4% cd $NF_DESIGN_DIR/test/sim_switch_default && make rm -f config_writes.py* rm -f *.pyc cp /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py ./ [15:18] rainbow:sim_switch_default% ***** DONE run step 9: ok sume simulation: fails with various errors, python and cp failures ****** DONE run command #+BEGIN_CENTER cd $SUME_FOLDER && ./tools/scripts/nf_test.py sim --major switch --minor default #+END_CENTER ****** DONE python indent bug # update_compile_order -fileset sim_1 update_compile_order: Time (s): cpu = 00:00:17 ; elapsed = 00:00:09 . Memory (MB): peak = 1995.594 ; gain = 0.016 ; free physic al = 21975 ; free virtual = 33161 loading libsume.. Traceback (most recent call last): File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de fault/run.py", line 42, in import config_writes File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_de fault/config_writes.py", line 7 ^ IndentationError: expected an indented block while executing "exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py" invoked from within "set output [exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py]" (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_s ume_switch_sim.tcl" line 177) INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:21:21 2019... -> inserting pass in def config_tables() ****** DONE post python cp error: different error after fixing python === Work directory is /tmp/nico/test/simple_sume_switch === Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.log': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_expect.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.axi': No such file or directory === Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] [15:21] rainbow:P4-NetFPGA% ****** DONE "add_wave failed" (post python fix) -> go back to step 4 # add_wave $nf_sume_sdnet_ip/out_src_port # add_wave $nf_sume_sdnet_ip/out_dst_port # set const_reg_ip /top_tb/top_sim/nf_datapath_0/nf_sume_sdnet_wrapper_1/inst/SimpleSumeSwitch_inst/const_reg_rw_0/ # add_wave_divider {const reg extern signals} # add_wave $const_reg_ip ERROR: [Wavedata 42-471] Note: Nothing was found for the following items: /top_tb/top_sim/nf_datapath_0/nf_sume_sdnet_wrapper_1/inst/SimpleSumeSwitch_inst/const_reg_rw_0/ ERROR: [Common 17-39] 'add_wave' failed due to earlier errors. while executing "add_wave $const_reg_ip " (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_sume_switch_sim.tcl" line 328) INFO: [Common 17-206] Exiting Vivado at Sat May 18 15:31:59 2019... make: *** [Makefile:121: sim] Error 1 make: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test' 512 === Work directory is /tmp/nico/test/simple_sume_switch === Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory === Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] [15:31] rainbow:P4-NetFPGA% ***** DONE run step 10: compiling the bitstream [takes hours] ****** command #+BEGIN_CENTER cd $NF_DESIGN_DIR && make # or cd $NF_DESIGN_DIR && make 2>&1 | tee compilelog #+END_CENTER ****** log Ignoring previous errors and continuing with this step => does not work, ends with: #+BEGIN_CENTER Opening simple_sume_switch XPR project # open_project project/$design.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% #+END_CENTER ****** DONE try 2: Run 'impl_1' has not been launched. Unable to open #+BEGIN_CENTER export simple_sume_switch project to SDK ****** Vivado v2018.2 (64-bit) **** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018 **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. source tcl/export_hardware.tcl # set design [lindex $argv 0] # puts "\nOpening $design XPR project\n" Opening simple_sume_switch XPR project # open_project project/$design.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% #+END_CENTER ****** DONE try3: debug the REAL failing command ******* command #+BEGIN_CENTER vivado -mode batch -source tcl/simple_sume_switch.tcl #+END_CENTER ******* log #+BEGIN_CENTER ERROR: [BD 41-171] The modes of the interface pins 'cfg_interrupt'(Slave) and 'pcie3_cfg_interrupt'(Slave) are incompatible. They cannot be connected. ERROR: [BD 5-3] Error: running connect_bd_intf_net. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. while executing "connect_bd_intf_net -intf_net nf_riffa_dma_1_pcie3_cfg_interrupt [get_bd_intf_pins nf_riffa_dma_1/cfg_interrupt] [get_bd_intf_pins pcie3_7x_1/pcie3_cf..." (procedure "create_hier_cell_dma_sub" line 141) invoked from within "create_hier_cell_dma_sub [current_bd_instance .] dma_sub" (procedure "create_root_design" line 68) invoked from within "create_root_design """ (file "./tcl/control_sub.tcl" line 729) while executing "source ./tcl/control_sub.tcl" (file "tcl/simple_sume_switch.tcl" line 89) .... after bugfixing: Creating bitmap... Creating bitstream... Bitstream compression saved 132634496 bits. Writing bitstream ../bitfiles/simple_sume_switch.bit... INFO: [Vivado 12-1842] Bitgen Completed Successfully. INFO: [Common 17-83] Releasing license: Implementation 100 Infos, 51 Warnings, 1 Critical Warnings and 0 Errors encountered. write_bitstream completed successfully write_bitstream: Time (s): cpu = 00:02:39 ; elapsed = 00:03:20 . Memory (MB): peak = 4301.938 ; gain = 944.953 ; free physical = 23157 ; free virtual = 31451 # exit INFO: [Common 17-206] Exiting Vivado at Mon May 20 13:07:53 2019... make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw' [13:07] rainbow:simple_sume_switch% #+END_CENTER ******* DONE clarifying "simple_sume_switch.tcl" CLOSED: [2019-07-21 Sun 13:59] ******** DONE What is it? Seems to be some kind of batch system for vivado ******** DONE Who or what created it? Seems to be manually / from the project / not generated ******** DONE What is it trying to do? Assuming connecting "things" on the "board". ******** DONE Why is it incompatible? ******** DONE Trying to resolve the error 1: commenting out line 538 # connect_bd_intf_net -intf_net nf_riffa_dma_1_pcie3_cfg_interrupt [get_bd_intf_pins nf_riffa_dma_1/cfg_interrupt] [get_bd_intf_pins pcie3_7x_1/pcie3_cfg_interrupt] ****** DONE try4 going back to step 10 -> fails #+BEGIN_CENTER ume_switch/hw/project/simple_sume_switch.runs/control_sub_m00_data_fifo_0_synth_1/runme.log control_sub_s00_data_fifo_0_synth_1: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_s00_data_fifo_0_synth_1/runme.log control_sub_auto_cc_0_synth_1: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_auto_cc_0_synth_1/runme.log synth_1: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/runme.log [Fri May 24 11:55:57 2019] Launched impl_1... Run output will be captured here: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/impl_1/runme.log launch_runs: Time (s): cpu = 00:00:34 ; elapsed = 00:01:10 . Memory (MB): peak = 2538.609 ; gain = 1199.879 ; free physical = 28377 ; free virtual = 34012 # wait_on_run impl_1 [Fri May 24 11:55:57 2019] Waiting for impl_1 to finish... [Fri May 24 12:39:07 2019] impl_1 finished wait_on_run: Time (s): cpu = 00:26:26 ; elapsed = 00:43:10 . Memory (MB): peak = 2538.609 ; gain = 0.000 ; free physical = 28208 ; free virtual = 34003 # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% q #+END_CENTER ****** DONE try5: error: No IP matching VLNV 'NetFPGA:NetFPGA:nf_sume_sdnet:*' was found #+BEGIN_CENTER [11:52] rainbow:hw% vivado -mode batch -source tcl/simple_sume_switch.tcl ... ### set NF_10G_INTERFACE3_BASEADDR $M07_BASEADDR ### set NF_10G_INTERFACE3_HIGHADDR $M07_HIGHADDR ### set NF_10G_INTERFACE3_SIZEADDR $M07_SIZEADDR ### set NF_RIFFA_DMA_BASEADDR $M08_BASEADDR ### set NF_RIFFA_DMA_HIGHADDR $M08_HIGHADDR ### set NF_RIFFA_DMA_SIZEADDR $M08_SIZEADDR Wrote : # create_ip -name nf_sume_sdnet -vendor NetFPGA -library NetFPGA -module_name nf_sume_sdnet_ip ERROR: [Coretcl 2-1134] No IP matching VLNV 'NetFPGA:NetFPGA:nf_sume_sdnet:*' was found. Please check your repository configuration. INFO: [Common 17-206] Exiting Vivado at Sat May 25 11:52:01 2019... #+END_CENTER ****** DONE try6: go back to clean netpfga-live, diff all sources #+BEGIN_CENTER [13:44] rainbow:~% diff -ru ~/P4-NetFPGA-live-clean/tools ~/projects/P4-NetFPGA/tools Only in /home/nico/projects/P4-NetFPGA/tools/scripts/NFTest: testcheck.pyc diff -ru /home/nico/P4-NetFPGA-live-clean/tools/settings.sh /home/nico/projects/P4-NetFPGA/tools/settings.sh --- /home/nico/P4-NetFPGA-live-clean/tools/settings.sh 2019-05-25 11:55:45.655636066 +0200 +++ /home/nico/projects/P4-NetFPGA/tools/settings.sh 2019-05-13 11:49:02.122265641 +0200 @@ -28,7 +28,8 @@ # @NETFPGA_LICENSE_HEADER_END@ # -export P4_PROJECT_NAME=switch_calc +export P4_PROJECT_NAME=switch_calc +export P4_PROJECT_NAME=minip4 export NF_PROJECT_NAME=simple_sume_switch export SUME_FOLDER=${HOME}/projects/P4-NetFPGA export SUME_SDNET=${SUME_FOLDER}/contrib-projects/sume-sdnet-switch @@ -47,4 +48,3 @@ export DRIVER_FOLDER=${SUME_FOLDER}/lib/sw/std/driver/${DRIVER_NAME} export APPS_FOLDER=${SUME_FOLDER}/lib/sw/std/apps/${DRIVER_NAME} export HWTESTLIB_FOLDER=${SUME_FOLDER}/lib/sw/std/hwtestlib - [13:44] rainbow:~% #+END_CENTER ****** DONE try7: restart from beginning in minip4 alongside try6 - steps 1...8 ok - step 9: fails to cp axi files - step 9: before that a python error ****** DONE try8: fix python error in config_writes.py: script is generated #+BEGIN_CENTER # set_property compxlib.xsim_compiled_library_dir {} [current_project] [0/1819] # set_property top_lib xil_defaultlib [get_filesets sim_1] # update_compile_order -fileset sim_1 update_compile_order: Time (s): cpu = 00:00:17 ; elapsed = 00:00:09 . Memory (MB): peak = 2003.578 ; gain = 8.004 ; free physical = 27661 ; free virtual = 33990 loading libsume.. Traceback (most recent call last): File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py", line 42, in import config_writes File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py", line 7 ^ IndentationError: expected an indented block while executing "exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py" invoked from within "set output [exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py]" (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_sume_switch_sim.tcl" line 177) INFO: [Common 17-206] Exiting Vivado at Sat May 25 13:45:13 2019... make: *** [Makefile:121: sim] Error 1 make: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test' 512 === Work directory is /tmp/nico/test/simple_sume_switch === Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default #+END_CENTER config_writes.py #+BEGIN_CENTER [13:50] rainbow:~% find ~/P4-NetFPGA-live-clean -name config_writes.py [13:50] rainbow:~% #+END_CENTER ******* File does not EXIST in original repo -> might be created in step6? "Generate the scripts that can be used in the NetFPGA SUME simulations to configure the table entries. $ cd $P4_PROJECT_DIR && make config_writes " #+BEGIN_CENTER! [13:50] rainbow:~% find ~/projects/P4-NetFPGA -name config_writes.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py [13:53] rainbow:~% [13:53] rainbow:~% grep -r config_writes.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/vivado.log: File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py", line 7 /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/Makefile: cp ${P4_PROJECT_DIR}/testdata/config_writes.py ./ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/Makefile: rm -f config_writes.py* /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_ctrlWrites/Makefile: cp ${P4_PROJECT_DIR}/testdata/config_writes.py ./ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_ctrlWrites/Makefile: rm -f config_writes.py* /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/Makefile: ${SUME_SDNET}/bin/gen_config_writes.py ${SDNET_OUT_DIR}/${P4_SWITCH}/config_writes.txt ${P4_SWITCH_BASE_ADDR} testdata [13:56] rainbow:~% #+END_CENTER Likely: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/Makefile: ${SUME_SDNET}/bin/gen_config_writes.py ${SDNET_OUT_DIR}/${P4_SWITCH}/config_writes.txt ${P4_SWITCH_BASE_ADDR} testdata /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch [14:01] rainbow:sume-sdnet-switch% ls bin conv_p414_cmds gen_P4_SWITCH_externs.py libtcam_templates.pyc nf_sim_tools.pyc extern_data.py gen_P4_SWITCH_regs.py make_config_tables.py p4_px_tables.py extern_data.pyc libcam_templates.py make_new_p4_proj.py pcap2axi gen_config_fsm_writes.py libcam_templates.pyc make_regs_addressable.py sss_sume_metadata.py gen_config_writes.py liblpm_templates.py modify_P4_SWITCH_tb.py sss_sume_metadata.pyc gen_P4_SWITCH_API.py liblpm_templates.pyc nf_sim_compare_axi_logs.py gen_P4_SWITCH_CLI.py libtcam_templates.py nf_sim_tools.py [14:01] rainbow:sume-sdnet-switch% sim_config = 'config_writes.py' hw_config = 'config_writes.sh' ****** DONE try9: debug the script that generates the script that generates the error #+BEGIN_CENTER [14:01] rainbow:sume-sdnet-switch% pwd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch [14:01] rainbow:sume-sdnet-switch% ls bin conv_p414_cmds gen_P4_SWITCH_externs.py libtcam_templates.pyc nf_sim_tools.pyc extern_data.py gen_P4_SWITCH_regs.py make_config_tables.py p4_px_tables.py extern_data.pyc libcam_templates.py make_new_p4_proj.py pcap2axi gen_config_fsm_writes.py libcam_templates.pyc make_regs_addressable.py sss_sume_metadata.py gen_config_writes.py liblpm_templates.py modify_P4_SWITCH_tb.py sss_sume_metadata.pyc gen_P4_SWITCH_API.py liblpm_templates.pyc nf_sim_compare_axi_logs.py gen_P4_SWITCH_CLI.py libtcam_templates.py nf_sim_tools.py #+END_CENTER Find the input file to find the script call directory #+BEGIN_CENTER [14:04] rainbow:sume-sdnet-switch% find ~/projects/P4-NetFPGA -name config_writes.txt /home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/ip_repo/contrib/cores/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt [14:08] rainbow:sume-sdnet-switch% #+END_CENTER Input data in nf_sume_sdnet_ip is: #+BEGIN_CENTER : (00000020, 00000001) : (00000020, 00000000) #+END_CENTER Original call in the Makefile: #+BEGIN_CENTER [14:10] rainbow:minip4% make config_writes /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata [14:10] rainbow:minip4% #+END_CENTER Understading gen_config_writes.py: #+BEGIN_CENTER def main(): parser = argparse.ArgumentParser() parser.add_argument('filename', type=str, help="the config_writes.txt file") parser.add_argument('baseaddr', type=str, help="the base address of the P4_SWITCH") parser.add_argument('outdir', type=str, help="the name of the output directory") args = parser.parse_args() dic = parse_config_writes(args.filename) new_dic = remove_init_addresses(dic) write_sim_config(new_dic, int(args.baseaddr, 0), args.outdir) write_hw_config(new_dic, int(args.baseaddr, 0), args.outdir) #+END_CENTER read arguments, create a dictionary by removing init addresses (why? which?), create the two output files, one of them being config_writes.py that does not have any lines. #+BEGIN_CENTER def parse_config_writes(filename): regex = r": \(([abcdefABCDEF\d]*), ([abcdefABCDEF\d]*)\)" dic = collections.OrderedDict() i = 0 with open(filename) as f: for line in f: searchObj = re.match(regex, line) if searchObj is not None: dic[i] = (searchObj.group(1), searchObj.group(2)) else: print >> sys.stderr, "ERROR: encountered unexpected line in file: \n", line sys.exit(1) i += 1 return dic #+END_CENTER Looks for all matching lines, errors out if wrong lines are in there. #+BEGIN_CENTER def remove_init_addresses(dic): result = collections.OrderedDict() for (index, tup) in dic.iteritems(): if tup[0][-2:] != "20": result[index] = tup return result #+END_CENTER Adding debug: #+BEGIN_CENTER def main(): parser = argparse.ArgumentParser() parser.add_argument('filename', type=str, help="the config_writes.txt file") parser.add_argument('baseaddr', type=str, help="the base address of the P4_SWITCH") parser.add_argument('outdir', type=str, help="the name of the output directory") args = parser.parse_args() dic = parse_config_writes(args.filename) print("orig dic: {}".format(dic)) new_dic = remove_init_addresses(dic) print("new dic: {}".format(new_dic)) write_sim_config(new_dic, int(args.baseaddr, 0), args.outdir) write_hw_config(new_dic, int(args.baseaddr, 0), args.outdir) #+END_CENTER Output: #+BEGIN_CENTER nfig_writes.txt 0x44020000 testdata [14:10] rainbow:minip4% make config_writes /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata orig dic: OrderedDict([(0, ('00000020', '00000001')), (1, ('00000020', '00000000'))]) new dic: OrderedDict() [14:15] rainbow:minip4% #+END_CENTER -> Problem seems to be that no addresses are left. Why? ****** DONE try10: find out, why nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt has too less content ******* DONE find out what generates config_writes.txt Seems to be step 5: #+BEGIN_CENTER [14:22] rainbow:SimpleSumeSwitch% pwd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch [14:23] rainbow:SimpleSumeSwitch% ls -lh config_writes.txt -rw-rw-r-- 1 nico nico 140 May 25 14:21 config_writes.txt [14:23] rainbow:SimpleSumeSwitch% date Sat 25 May 2019 02:23:41 PM CEST [14:23] rainbow:SimpleSumeSwitch% #+END_CENTER ******* DONE Debug vivado_sim.bash -> run w/ x11 output, also vivado_sim_waveform.bash Open GUI, pressing "play" button, getting different / new errors #+BEGIN_CENTER [SW] CAM_Init() - done [SW] CAM_EnableDevice() - start SV_write_control()- start SV_write_control()- done SV_read_control()- start SV_read_control()- done SV_write_control()- start SV_write_control()- done [SW] CAM_EnableDevice() - done [2420698] INFO: finished packet stimulus file [2735572] ERROR: tuple mismatch for packet 1 expected < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > actual < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000010000 > $finish called at time : 2735572 ps : File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" Line 120 #+END_CENTER Error message created in /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v Same error on shell only version: #+BEGIN_CENTER projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv [SW] CAM_Init() - start [SW] CAM_Init() - done [SW] CAM_EnableDevice() - start SV_write_control()- start SV_write_control()- done SV_read_control()- start SV_read_control()- done SV_write_control()- start SV_write_control()- done [SW] CAM_EnableDevice() - done [2420698] INFO: finished packet stimulus file [2735572] ERROR: tuple mismatch for packet 1 expected < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > actual < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000010000 > $finish called at time : 2735572 ps : File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" Line 120 exit INFO: [Common 17-206] Exiting xsim at Sat May 25 14:38:05 2019... [14:38] rainbow:SimpleSumeSwitch% echo $? 0 [14:38] rainbow:SimpleSumeSwitch% #+END_CENTER Analysing Makefile in testdata + scripts ******** get_testdata.py: generates some pcap with some packets Need to find out import sss_sdnet_tuples sss_sdnet_tuples.clear_tuple_files() Result of this script is src.pcap and dst.pcap. Is the lookup table related to the devices? NUM_KEYS = 4 lookup_table = { 0: 0x00000001, 1: 0x00000010, 2: 0x00000100, 3: 0x00001000 } Where are in/out ports?! Modifying / adjusting P4 code to mirror input packets ******** switch_calc_headers creates some headers some specific packet, uses bind_layers ****** DONE try11: fixing gen_testdata, adding p4 code for mirroring Failure again at step 5: #+BEGIN_CENTER me_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for__OUT_.lahsy4kevbbz5f1pl25cndeyi9crlj_812.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0 Time: 1 ps Iteration: 0 Process: /SimpleSumeSwitch_tb/SimpleSumeSwitch_i/S_SYNCER_for__OUT_/lahsy4kevbbz5f1pl25cndeyi9crlj_812/gnuram_async_fifo.xpm_fifo_base_inst/gen_sdpram.xpm_memory_base_inst/Initial270_1120 File: /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv [SW] CAM_Init() - start [SW] CAM_Init() - done [SW] CAM_EnableDevice() - start SV_write_control()- start SV_write_control()- done SV_read_control()- start SV_read_control()- done SV_write_control()- start SV_write_control()- done [SW] CAM_EnableDevice() - done [2260762] INFO: finished packet stimulus file [2735572] ERROR: tuple mismatch for packet 1 expected < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > actual < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000010000 > $finish called at time : 2735572 ps : File "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" Line 120 exit INFO: [Common 17-206] Exiting xsim at Sun May 26 11:09:04 2019... [11:09] rainbow:SimpleSumeSwitch% #+END_CENTER After setting egress port, vivado_sim.bash looks good #+BEGIN_CENTER SV_write_control()- start SV_write_control()- done SV_read_control()- start SV_read_control()- done SV_write_control()- start SV_write_control()- done [SW] CAM_EnableDevice() - done [2260762] INFO: finished packet stimulus file [2735572] INFO: packet 1 tuple OK < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > [2735572] INFO: packet 1 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000090082222222208081111111108) [2738904] INFO: packet 1 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [6074236] INFO: stopping simulation after 1000 idle cycles [6074236] INFO: all expected data successfully received [6074236] INFO: TEST PASSED $finish called at time : 6074236 ps : File "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv" Line 207 exit INFO: [Common 17-206] Exiting xsim at Sun May 26 11:14:34 2019... [11:14] rainbow:SimpleSumeSwitch% #+END_CENTER Started compiling the bitstream at around 1120 Ended at Sun 26 May 2019 01:09:05 PM CEST ***** run step 11: checking design -- skipped ***** DONE run step 12: ok ****** code #+BEGIN_CENTER cd $NF_DESIGN_DIR/bitfiles && \ mv simple_sume_switch.bit ${P4_PROJECT_NAME}.bit && \ cp $P4_PROJECT_DIR/testdata/config_writes.sh ./ #+END_CENTER ***** DONE run step 13: ****** command #+BEGIN_CENTER cd $NF_DESIGN_DIR/bitfiles/ && sudo bash ./program_switch.sh [13:18] rainbow:bitfiles% sudo bash root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# . ~nico/master-thesis/netpfga/bashinit root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# bash program_switch.sh #+END_CENTER ****** DONE try1: paths not setup for root [14:54] rainbow:bitfiles% cd $NF_DESIGN_DIR/bitfiles/ && sudo bash ./program_switch.sh ./program_switch.sh: line 34: /tools/program_switch.sh: No such file or directory [14:56] rainbow:bitfiles% ls config_writes.sh minip4.bit program_switch.sh README [14:56] rainbow:bitfiles% ****** DONE try2: setup paths as root: various other errors #+BEGIN_CENTER root@rainbow:~# cd $NF_DESIGN_DIR/bitfiles/ && bash ./program_switch.sh rmmod: ERROR: Module sume_riffa is not currently loaded rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. switch_calc.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 couldn't open "switch_calc.bit": no such file or directory invoked from within "::tcf::eval -progress ::xsdb::print_progress {::tcf::cache_enter tcfchan#0 {tcf_cache_eval {process_tcf_actions_cache_client ::tcfclient#0::arg}}}" (procedure "::tcf::cache_eval_with_progress" line 2) invoked from within "::tcf::cache_eval_with_progress [dict get $arg chan] [list process_tcf_actions_cache_client $argvar] $progress" (procedure "process_tcf_actions" line 1) invoked from within "process_tcf_actions $arg ::xsdb::print_progress" (procedure "fpga" line 430) invoked from within "fpga -f $bitimage" (file "/root/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl" line 33) Check programming FPGA or Reboot machine ! rmmod: ERROR: Module sume_riffa is not currently loaded nf0: ERROR while getting interface flags: No such device nf1: ERROR while getting interface flags: No such device nf2: ERROR while getting interface flags: No such device nf3: ERROR while getting interface flags: No such device #+END_CENTER ****** DONE try3: adjusting/analysing "./program_switch.sh" Calls another script #+BEGIN_CENTER # Program the switch with the bit file and then configure the tables ${SUME_SDNET}/tools/program_switch.sh switch_calc.bit config_writes.sh #+END_CENTER ****** DONE try4: analyse ANOTHER program_switch.sh #+BEGIN_CENTER root@rainbow:~/projects/P4-NetFPGA# find . -name program_switch.sh ./contrib-projects/sume-sdnet-switch/projects/int/simple_sume_switch/bitfiles/program_switch.sh ./contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles/program_switch.sh ./contrib-projects/sume-sdnet-switch/projects/switch_calc/simple_sume_switch/bitfiles/program_switch.sh ./contrib-projects/sume-sdnet-switch/projects/learning_switch/simple_sume_switch/bitfiles/program_switch.sh ./contrib-projects/sume-sdnet-switch/projects/tcp_monitor/simple_sume_switch/bitfiles/program_switch.sh ./contrib-projects/sume-sdnet-switch/tools/program_switch.sh ./contrib-projects/sume-sdnet-switch/templates/sss_p4_proj/simple_sume_switch/bitfiles/program_switch.sh root@rainbow:~/projects/P4-NetFPGA# #+END_CENTER Add set -x debugging, see real error #+BEGIN_CENTER #+END_CENTER ****** DONE try 5: reboot && retry #+BEGIN_CENTER [9:24] rainbow:~% sudo -i root@rainbow:~# lsmod | grep riffa root@rainbow:~# modprobe sume_riffa modprobe: FATAL: Module sume_riffa not found in directory /lib/modules/5.0.0-15-generic root@rainbow:~# #+END_CENTER -> not changing ******* DONE Going back to setup steps [10:11] rainbow:tcam_v1_1_0% cd $SUME_FOLDER/lib/hw/xilinx/cores/tcam_v1_1_0/ && make update && make cd $SUME_FOLDER/lib/hw/xilinx/cores/cam_v1_1_0/ && make update && make cd $SUME_SDNET/sw/sume && make cd $SUME_FOLDER && make -> all good so far cd $DRIVER_FOLDER make all sudo make install sudo modprobe sume_riffa #+BEGIN_CENTER [11:44] rainbow:sume_riffa_v1_0_0% sudo make install make -C /lib/modules/5.0.0-15-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-5.0.0-15-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-15-generic' install -o root -g root -m 0755 -d /lib/modules/5.0.0-15-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/5.0.0-15-generic/extra/sume_riffa/ depmod -a 5.0.0-15-generic [11:44] rainbow:sume_riffa_v1_0_0% [11:44] rainbow:sume_riffa_v1_0_0% lsmod | grep sume_riffa sume_riffa 28672 0 [11:45] rainbow:sume_riffa_v1_0_0% #+END_CENTER ****** DONE try 6: after successful compile, missing switch_calc.bitcoin #+BEGIN_CENTER root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# bash program_switch.sh ++ which vivado + xilinx_tool_path=/opt/Xilinx/Vivado/2018.2/bin/vivado + bitimage=switch_calc.bit + configWrites=config_writes.sh + '[' -z switch_calc.bit ']' + '[' -z config_writes.sh ']' + '[' /opt/Xilinx/Vivado/2018.2/bin/vivado == '' ']' + rmmod sume_riffa + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs switch_calc.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. switch_calc.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 couldn't open "switch_calc.bit": no such file or directory invoked from within "::tcf::eval -progress ::xsdb::print_progress {::tcf::cache_enter tcfchan#0 {tcf_cache_eval {process_tcf_actions_cache_client ::tcfclient#0::arg}}}" (procedure "::tcf::cache_eval_with_progress" line 2) invoked from within "::tcf::cache_eval_with_progress [dict get $arg chan] [list process_tcf_actions_cache_client $argvar] $progress" (procedure "process_tcf_actions" line 1) invoked from within "process_tcf_actions $arg ::xsdb::print_progress" (procedure "fpga" line 430) invoked from within "fpga -f $bitimage" (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl" line 33) + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Check programming FPGA or Reboot machine ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# #+END_CENTER Debugging why the bitfile is missing -> WRONG name! Analysing program_switch.sh #+BEGIN_CENTER [13:22] rainbow:bitfiles% ls config_writes.sh minip4.bit program_switch.sh README [13:24] rainbow:bitfiles% #+END_CENTER switch_calc.bit HARDCODED incorrectly in the script #+BEGIN_CENTER # Program the switch with the bit file and then configure the tables ${SUME_SDNET}/tools/program_switch.sh minip4.bit config_writes.sh #+END_CENTER Output of programming #+BEGIN_CENTER root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# bash program_switch.sh ++ which vivado + xilinx_tool_path=/opt/Xilinx/Vivado/2018.2/bin/vivado + bitimage=minip4.bit + configWrites=config_writes.sh + '[' -z minip4.bit ']' + '[' -z config_writes.sh ']' + '[' /opt/Xilinx/Vivado/2018.2/bin/vivado == '' ']' + rmmod sume_riffa + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs minip4.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. minip4.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 11MB 1.7MB/s 00:06 + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Check programming FPGA or Reboot machine ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# #+END_CENTER After reboot: #+BEGIN_CENTER [13:27] rainbow:~% lspci 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15d0 00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Device 15d1 00:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe Dummy Host Bridge 00:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 15d3 00:01.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 15d3 00:01.6 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 15d3 00:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe Dummy Host Bridge 00:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 15db 00:08.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 15dc 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 61) 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51) 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15e8 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15e9 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15ea 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15eb 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15ec 00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15ed 00:18.6 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15ee 00:18.7 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 15ef 10:00.0 Memory controller: Xilinx Corporation Device 7028 15:00.0 USB controller: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset USB 3.1 xHCI Controller (rev 02) 15:00.1 SATA controller: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset SATA Controller (rev 02) 15:00.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43b2 (rev 02) 1d:00.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 1d:01.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 1d:04.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 1d:05.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 1d:06.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 1d:07.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 24:00.0 Network controller: Intel Corporation Dual Band Wireless-AC 3168NGW [Stone Peak] (rev 10) 25:00.0 Ethernet controller: Intel Corporation I211 Gigabit Network Connection (rev 03) 38:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Raven Ridge [Radeon Vega Series / Radeon Vega Mobile Series] (rev c8) 38:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Device 15de 38:00.2 Encryption controller: Advanced Micro Devices, Inc. [AMD] Device 15df 38:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Device 15e0 38:00.4 USB controller: Advanced Micro Devices, Inc. [AMD] Device 15e1 38:00.6 Audio device: Advanced Micro Devices, Inc. [AMD] Device 15e3 39:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 61) [13:27] rainbow:~% root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# lsmod | grep sume_riffa sume_riffa 28672 0 root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# [ 187.401378] sume_riffa: loading out-of-tree module taints kernel. [ 187.401449] sume_riffa: module verification failed: signature and/or required key missing - tainting kernel [ 187.402281] NetFPGA SUME (RIFFA DMA) version $Revision: 1.34 $ [ 187.402341] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: enabling device (0000 -> 0002) [ 187.402563] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] # of channels: 2 [ 187.402565] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus interface width: 128 [ 187.402567] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus master enabled: 1 [ 187.402568] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated link width: 8 [ 187.402569] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated rate width: 2500 MTs [ 187.402571] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max downstream payload: 512 B [ 187.402572] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max upstream payload: 128 B [ 187.402599] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 0 Ethernet address 02:53:55:4d:45:00 [ 187.402604] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 1 Ethernet address 02:53:55:4d:45:01 [ 187.402609] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 2 Ethernet address 02:53:55:4d:45:02 [ 187.402613] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 3 Ethernet address 02:53:55:4d:45:03 [ 187.427036] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: renamed from nf0 [ 187.441436] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename7: renamed from nf3 [ 187.465095] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 nf1: up [ 187.465218] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename6: renamed from nf2 [ 187.493947] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: up [ 187.504797] amd_iommu_report_page_fault: 28 callbacks suppressed [ 187.504801] AMD-Vi: Event logged [IO_PAGE_FAULT device=10:00.7 domain=0x0000 address=0xffff4000 flags=0x0050] [ 188.421105] IPv6: ADDRCONF(NETDEV_CHANGE): nf1: link becomes ready root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# ip l 1: lo: mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 2: enp37s0: mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000 link/ether 70:85:c2:ad:62:79 brd ff:ff:ff:ff:ff:ff 3: wlp36s0: mtu 1500 qdisc mq state DOWN mode DORMANT group default qlen 1000 link/ether dc:8b:28:47:5c:f7 brd ff:ff:ff:ff:ff:ff 4: enp16s0: mtu 1500 qdisc fq_codel state UP mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff 5: nf1: mtu 1500 qdisc fq_codel state UP mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff 6: rename6: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 7: rename7: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# #+END_CENTER ***** DONE Step 14: test the card / switch ****** try1: adding ips, using tcpdump ******* testing enp16s0 #+BEGIN_CENTER root@rainbow:~# tcpdump -ni enp16s0 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on enp16s0, link-type EN10MB (Ethernet), capture size 262144 bytes 13:33:53.952947 IP6 fe80::53:55ff:fe4d:4500 > ff02::2: ICMP6, router solicitation, length 16 13:33:55.404587 LLDP, length 216: rainbow.place6.ungleich.ch 13:34:02.242610 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 13:34:03.263792 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 13:34:04.287910 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 13:34:07.429549 IP 0.0.0.0.68 > 255.255.255.255.67: BOOTP/DHCP, Request from 02:53:55:4d:45:00, length 288 13:34:25.415196 LLDP, length 216: rainbow.place6.ungleich.ch 13:34:55.418304 LLDP, length 216: rainbow.place6.ungleich.ch 13:35:12.381120 IP 0.0.0.0.68 > 255.255.255.255.67: BOOTP/DHCP, Request from 02:53:55:4d:45:00, length 288 13:35:25.420868 LLDP, length 216: rainbow.place6.ungleich.ch 13:35:55.423875 LLDP, length 216: rainbow.place6.ungleich.ch 13:36:17.384654 IP 0.0.0.0.68 > 255.255.255.255.67: BOOTP/DHCP, Request from 02:53:55:4d:45:00, length 288 13:36:25.427542 LLDP, length 216: rainbow.place6.ungleich.ch 13:36:55.431733 LLDP, length 216: rainbow.place6.ungleich.ch 13:37:20.483400 IP 0.0.0.0.68 > 255.255.255.255.67: BOOTP/DHCP, Request from 02:53:55:4d:45:00, length 288 13:37:25.435735 LLDP, length 216: rainbow.place6.ungleich.ch 13:37:54.556948 IP6 fe80::53:55ff:fe4d:4500 > ff02::2: ICMP6, router solicitation, length 16 13:37:55.438238 LLDP, length 216: rainbow.place6.ungleich.ch 13:38:25.384418 IP 0.0.0.0.68 > 255.255.255.255.67: BOOTP/DHCP, Request from 02:53:55:4d:45:00, length 288 13:38:25.442805 LLDP, length 216: rainbow.place6.ungleich.ch #+END_CENTER ******* Testing nf1 #+BEGIN_CENTER root@rainbow:/etc/network# ip addr add 2001:db8:1::1/64 dev nf1 root@rainbow:/etc/network# root@rainbow:~# tcpdump -ni nf1 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on nf1, link-type EN10MB (Ethernet), capture size 262144 bytes 13:39:11.947770 IP6 fe80::53:55ff:fe4d:4501 > ff02::16: HBH ICMP6, multicast listener report v2, 3 group record(s), length 68 13:39:12.011981 IP6 :: > ff02::1:ff00:1: ICMP6, neighbor solicitation, who has 2001:db8:1::1, length 32 13:39:12.799761 IP6 fe80::53:55ff:fe4d:4501 > ff02::16: HBH ICMP6, multicast listener report v2, 3 group record(s), length 68 13:39:14.064981 IP6 2001:db8:1::1.5353 > ff02::fb.5353: 0*- [0q] 2/0/0 (Cache flush) PTR rainbow.local., (Cache flush) AAAA 2001:db8:1::1 (139) 13:39:16.251534 IP6 2001:db8:1::1.5353 > ff02::fb.5353: 0*- [0q] 2/0/0 (Cache flush) PTR rainbow.local., (Cache flush) AAAA 2001:db8:1::1 (139) 13:39:25.449875 LLDP, length 212: rainbow.place6.ungleich.ch #+END_CENTER Rebooting again #+BEGIN_CENTER root@rainbow:~# modprobe sume_riffa root@rainbow:~# dmesg | tail -n 20 [ 88.460898] NetFPGA SUME (RIFFA DMA) version $Revision: 1.34 $ [ 88.461136] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] # of channels: 2 [ 88.461138] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus interface width: 128 [ 88.461140] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus master enabled: 1 [ 88.461141] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated link width: 8 [ 88.461143] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated rate width: 2500 MTs [ 88.461144] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max downstream payload: 512 B [ 88.461145] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max upstream payload: 128 B [ 88.461168] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 0 Ethernet address 02:53:55:4d:45:00 [ 88.461173] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 1 Ethernet address 02:53:55:4d:45:01 [ 88.461177] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 2 Ethernet address 02:53:55:4d:45:02 [ 88.461182] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 3 Ethernet address 02:53:55:4d:45:03 [ 88.481731] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: renamed from nf3 [ 88.502173] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename6: renamed from nf2 [ 88.526514] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename4: renamed from nf0 [ 88.542069] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: up [ 88.543090] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename5: renamed from nf1 [ 89.497027] IPv6: ADDRCONF(NETDEV_CHANGE): enp16s0: link becomes ready [ 89.497964] amd_iommu_report_page_fault: 28 callbacks suppressed [ 89.497967] AMD-Vi: Event logged [IO_PAGE_FAULT device=10:00.7 domain=0x0000 address=0xffff4000 flags=0x0050] root@rainbow:~# #+END_CENTER ***** 2019-05-26, netfpga integration #+BEGIN_CENTER [10:56] rainbow:projects% mv minip4 ~/master-thesis/netpfga/ [10:56] rainbow:projects% ln -s ~/master-thesis/netpfga/minip4 [10:56] rainbow:projects% root@rainbow:~# ip l s enp16s0 up root@rainbow:~# tcpdump -ni enp16s0 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on enp16s0, link-type EN10MB (Ethernet), capture size 262144 bytes [ 88.460460] sume_riffa: loading out-of-tree module taints kernel. [ 88.460534] sume_riffa: module verification failed: signature and/or required key missing - tainting kernel [ 88.460898] NetFPGA SUME (RIFFA DMA) version $Revision: 1.34 $ [ 88.461136] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] # of channels: 2 [ 88.461138] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus interface width: 128 [ 88.461140] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] bus master enabled: 1 [ 88.461141] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated link width: 8 [ 88.461143] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] negotiated rate width: 2500 MTs [ 88.461144] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max downstream payload: 512 B [ 88.461145] NetFPGA SUME (RIFFA DMA) 0000:10:00.0: [riffa] max upstream payload: 128 B [ 88.461168] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 0 Ethernet address 02:53:55:4d:45:00 [ 88.461173] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 1 Ethernet address 02:53:55:4d:45:01 [ 88.461177] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 2 Ethernet address 02:53:55:4d:45:02 [ 88.461182] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 (unnamed net_device) (uninitialized): Port 3 Ethernet address 02:53:55:4d:45:03 [ 88.481731] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: renamed from nf3 [ 88.502173] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename6: renamed from nf2 [ 88.526514] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename4: renamed from nf0 [ 88.542069] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 enp16s0: up [ 88.543090] NetFPGA SUME (RIFFA DMA) 0000:10:00.0 rename5: renamed from nf1 [ 89.497027] IPv6: ADDRCONF(NETDEV_CHANGE): enp16s0: link becomes ready [ 89.497964] amd_iommu_report_page_fault: 28 callbacks suppressed [ 89.497967] AMD-Vi: Event logged [IO_PAGE_FAULT device=10:00.7 domain=0x0000 address=0xffff4000 flags=0x0050] [ 124.875633] device enp16s0 entered promiscuous mode root@rainbow:~# root@rainbow:~# ip addr add 2001:db8::1/64 dev enp16s0 13:45:04.211832 IP6 :: > ff02::1:ff00:1: ICMP6, neighbor solicitation, who has 2001:db8::1, length 32 13:45:05.555657 IP6 2001:db8::1.5353 > ff02::fb.5353: 0*- [0q] 2/0/0 (Cache flush) PTR rainbow.local., (Cache flush) AAAA 2001:db8::1 (139) 13:45:07.718554 IP6 2001:db8::1.5353 > ff02::fb.5353: 0*- [0q] 2/0/0 (Cache flush) PTR rainbow.local., (Cache flush) AAAA 2001:db8::1 (139) 13:45:23.556081 LLDP, length 216: rainbow.place6.ungleich.ch #+END_CENTER -> no replies Testing with the supplied tool #+BEGIN_CENTER root@rainbow:~/master-thesis/netpfga/minip4/sw/hw_test_tool# python switch_calc_tester.py SIOCSIFADDR: No such device eth1: ERROR while getting interface flags: No such device SIOCSIFNETMASK: No such device tcpdump: eth1: No such device exists (SIOCGIFHWADDR: No such device) The HW testing tool for the switch_calc design type help to see all commands testing> #+END_CENTER Broken again. Debug manually. #+BEGIN_CENTER [13:49] rainbow:~% python Python 2.7.16 (default, Apr 6 2019, 01:42:57) [GCC 8.3.0] on linux2 Type "help", "copyright", "credits" or "license" for more information. >>> from scapy.all import * >>> MAC1 = "08:11:11:11:11:08" >>> MAC2 = "08:22:22:22:22:08" >>> pkt = Ether(dst=MAC2, src=MAC1) >>> srp1(pkt, iface="enp16s0") Traceback (most recent call last): File "", line 1, in File "/usr/lib/python2.7/dist-packages/scapy/sendrecv.py", line 434, in srp1 ans, _ = srp(*args, **kargs) File "/usr/lib/python2.7/dist-packages/scapy/sendrecv.py", line 416, in srp s = conf.L2socket(promisc=promisc, iface=iface, filter=filter, nofilter=nofilter, type=type) File "/usr/lib/python2.7/dist-packages/scapy/arch/linux.py", line 502, in __init__ self.ins = socket.socket(socket.AF_PACKET, socket.SOCK_RAW, socket.htons(type)) File "/usr/lib/python2.7/socket.py", line 191, in __init__ _sock = _realsocket(family, type, proto) socket.error: [Errno 1] Operation not permitted >>> #+END_CENTER Try padding to 64 bytes #+BEGIN_CENTER >>> len(pkt) 14 >>> 64-14 50 >>> RAW(50*"A") Traceback (most recent call last): File "", line 1, in NameError: name 'RAW' is not defined >>> Raw(50*"A") >>> pkg2 = pkt / Raw(50*"A") >>> >>> pkg2 = pkt / Raw(50*"A") >>> srp1(pkg2, iface="enp16s0") Begin emission: Finished sending 1 packets. tcpdump: #+END_CENTER **** DONE Understand a bit of xilinx/netfpga/vivado ~ somewhat - https://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_4/ug900-vivado-logic-simulation.pdf The xvhdl and xvlog commands parse VHDL and Verilog files, respectively. Descriptions for each option are available in Table 5-2, page 102. This command parses the VHDL source file(s) and stores the parsed dump into a HDL library on disk. ***** xelab xelab The xelab command, for given top-level units, does the following: • Loads children design units using language binding rules or the –L command line specified HDL libraries • Performs a static elaboration of the design (sets parameters, generics, puts generate statements into effect, and so forth) • Generates executable code • Links the generated executable code with the simulation kernel library to create an executable simulation snapshot You then use the produced executable simulation snapshot name as an option to the xsim command along with other options to effect HDL simulation ***** Summary of xilinx toolchain VHDL->[via xvhdl]-> HDL Verilog->[via xvlog]->HDL ***** Understand SimpleSumeSwitch SimpleSumeSwitch( TopParser(), TopPipe(), TopDeparser() ) main; **** Understand the different switch models (?) *** DONE Find out whether delta based checksumming is feasible [in P4] CLOSED: [2019-07-21 Sun 13:53] **** DONE Analysing scapy CLOSED: [2019-06-23 Sun 14:18] #+BEGIN_CENTER [13:51] line:~% dpkg -L python3-scapy | grep inet /usr/lib/python3/dist-packages/scapy/layers/inet.py /usr/lib/python3/dist-packages/scapy/layers/inet6.py if self.chksum is None: ck = checksum(p) p = p[:10]+chb(ck>>8)+chb(ck&0xff)+p[12:] return p+pay [13:55] line:~% grep checksum -r /usr/lib/python3/dist-packages/scapy/ | grep def /usr/lib/python3/dist-packages/scapy/contrib/isis.py: def checksum_info(self, hdrlen): /usr/lib/python3/dist-packages/scapy/contrib/isis.py: def checksum_info(self, hdrlen): /usr/lib/python3/dist-packages/scapy/contrib/ospf.py:def ospf_lsa_checksum(lsa): /usr/lib/python3/dist-packages/scapy/utils.py: def checksum(pkt): /usr/lib/python3/dist-packages/scapy/utils.py: def checksum(pkt): /usr/lib/python3/dist-packages/scapy/utils.py:def fletcher16_checksum(binbuf): /usr/lib/python3/dist-packages/scapy/layers/sctp.py:def sctp_checksum(buf): [13:55] line:~% if struct.pack("H",1) == b"\x00\x01": # big endian def checksum(pkt): if len(pkt) % 2 == 1: pkt += b"\0" s = sum(array.array("H", pkt)) s = (s >> 16) + (s & 0xffff) s += s >> 16 s = ~s return s & 0xffff else: def checksum(pkt): if len(pkt) % 2 == 1: pkt += b"\0" s = sum(array.array("H", pkt)) s = (s >> 16) + (s & 0xffff) s += s >> 16 s = ~s return (((s>>8)&0xff)|s<<8) & 0xffff #+END_CENTER **** DONE Trying to create a delta diff: AAAA vs. BBAA CLOSED: [2019-07-21 Sun 13:53] #+BEGIN_CENTER [14:17] line:bin% python3 checksum_from_scapy.py AAAA b'AAAA' 32125 [14:18] line:bin% python3 checksum_from_scapy.py BBAA b'BBAA' 31868 [14:18] line:bin% python3 checksum_from_scapy.py AA b'AA' 48830 [14:20] line:bin% python3 checksum_from_scapy.py BB b'BB' 48573 >>> bin(48830) '0b1011111010111110' >>> bin(48573) '0b1011110110111101' >>> >>> array.array("H", "AAAA".encode("utf-8")) array('H', [16705, 16705]) >>> array.array("H", "AA".encode("utf-8")) array('H', [16705]) -> bit concat on 16: AA: >>> 0b100000101000001 16705 Order in 16 bit tuples does not matter: [14:24] line:bin% python3 checksum_from_scapy.py AABB b'AABB' sum=33667 31868 [14:28] line:bin% python3 checksum_from_scapy.py BBAA b'BBAA' sum=33667 31868 [14:28] line:bin% python3 checksum_from_scapy.py BBCCAA b'BBCCAA' sum=50886 14649 [14:28] line:bin% python3 checksum_from_scapy.py BBAACC b'BBAACC' sum=50886 14649 Sum on shorts does not stay in short area: >>> sum(array.array("H", [48830, 48573])) 97403 >>> sum(array.array("H", "AAAA".encode("utf-8"))) 33410 >>> sum(array.array("H", "AABB".encode("utf-8"))) 33667 >>> sum(array.array("H", "AABBCC".encode("utf-8"))) 50886 >>> sum(array.array("H", "AABBCCDD".encode("utf-8"))) 68362 Adding with overflow control works: >>> s = 97403 >>> s = (s >> 16) + (s & 0xffff) >>> s 31868 >>> s += s >> 16 >>> s 31868 [14:29] line:bin% python3 checksum_from_scapy.py AABB b'AABB' sum=33667 31868 #+END_CENTER *** DONE Get ANY p4 program to successfully run on netpfga CLOSED: [2019-07-21 Sun 14:00] **** DONE mirroring ethernet CLOSED: [2019-07-21 Sun 14:00] ***** no packets seen on source interface **** DONE sending data to switch port 1 CLOSED: [2019-07-21 Sun 14:00] ***** DONE figuring out which is port 1: nf0 expected actual applyPkt(pkt, 'nf0', pktCnt) expPkt(pkt, 'nf2') # 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > # 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000010010000 > applyPkt(pkt, 'nf0', pktCnt) expPkt(pkt, 'nf3') < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000040010000 > < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > ***** DONE Testing packets: does not arrive on nf0 with ping6 4: nf0: mtu 1500 qdisc fq_codel state UP group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff inet6 fe80::53:55ff:fe4d:4500/64 scope link valid_lft forever preferred_lft forever 5: nf1: mtu 1500 qdisc fq_codel state UP group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff inet6 2001:db8::1/64 scope global valid_lft forever preferred_lft forever inet6 fe80::53:55ff:fe4d:4501/64 scope link valid_lft forever preferred_lft forever 6: nf2: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 7: nf3: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff root@rainbow:~# tcpdump -ni nf0 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on nf0, link-type EN10MB (Ethernet), capture size 262144 bytes [19:27] rainbow:~% sudo -i root@rainbow:~# tcpdump -ni nf1 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on nf1, link-type EN10MB (Ethernet), capture size 262144 bytes 19:28:36.720431 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 19:28:37.725181 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 19:28:38.749195 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 ***** DONE Testing packets with send_packet.py: nothing arrives: broken card problem CLOSED: [2019-07-21 Sun 13:54] root@rainbow:/home/nico/master-thesis/bin# python send_packet.py nf1 . Sent 1 packets. root@rainbow:/home/nico/master-thesis/bin# python send_packet.py nf0 . Sent 1 packets. root@rainbow:/home/nico/master-thesis/bin# -> only shows up on the interface that we send, not on nf0 if sending on nf1 ***** DONE Trying to add explicit table entry: broken card problem CLOSED: [2019-07-21 Sun 13:54] #+BEGIN_CENTER >> table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff => CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xffffffff WROTE 0x44020054 = 0xffff WROTE 0x44020080 = 0x0003 python: ioctl: Unknown error 512 [20:27] rainbow:CLI% #+END_CENTER ***** DONE Trying to read a table entry: broken card problem CLOSED: [2019-07-21 Sun 13:54] #+BEGIN_CENTER >> table_cam_read_entry lookup_table 0 CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0x0000 WROTE 0x44020054 = 0x0000 python: ioctl: Unknown error 512 [20:31] rainbow:CLI% python P4_SWITCH_CLI.py loading libsume.. loading libsume.. loading libcam.. The SimpleSumeSwitch interactive command line tool type help to see all commands >> table_cam_read_entry lookup_table 1 CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0x0001 WROTE 0x44020054 = 0x0000 python: ioctl: Unknown error 512 [20:31] rainbow:CLI% python P4_SWITCH_CLI.py loading libsume.. loading libsume.. loading libcam.. The SimpleSumeSwitch interactive command line tool type help to see all commands >> table_cam_read_entry lookup_table p.ethernet.dstAddr ERROR: failed to convert p.ethernet.dstAddr of type to an integer #+END_CENTER *** DONE Create either HDL or PX for supporting payload checksum: no, not doing payload CLOSED: [2019-07-21 Sun 13:54] https://github.com/NetFPGA/P4-NetFPGA-public/issues/13 https://github.com/NetFPGA/P4-NetFPGA-public/issues/13#issuecomment-490431016 **** DONE Explore HDL: no, not needed CLOSED: [2019-07-21 Sun 13:54] **** DONE Explore PX: no, not needed CLOSED: [2019-07-21 Sun 13:54] *** Integrate nat64 code into netfpga: continue further down **** DONE figure out how to do ANY checksums CLOSED: [2019-07-21 Sun 13:55] ** DONE Diff / Delta based checksums CLOSED: [2019-07-21 Sun 13:55] *** DONE create test case / test theory CLOSED: [2019-07-13 Sat 21:50] *** Understand the complement implementation in P4/C **** P4 - Fixed-width signed integers represented using two's complement int<> - • Bitwise “complement” of a single bit-string, denoted by ~ . **** RFC 791/IPv4 The checksum field is the 16-bit one's complement of the one's complement sum of all 16-bit words in the header. For purposes of computing the checksum, the value of the checksum field is zero. "The result of summing the entire IP header, including checksum, should be zero if there is no corruption." 2x carry bit ! The result of summing the entire IP header, including checksum, should be zero if there is no corruption. https://en.wikipedia.org/wiki/IPv4_header_checksum **** DONE try first v6/v6 CLOSED: [2019-07-21 Sun 14:00] **** using python/struct ***** find right byte orders **** using python/scapy #+BEGIN_CENTER #+END_CENTER **** using p4 **** using p4/netpfga ** DONE NAT64/NAT46 Features in jool and tayga CLOSED: [2019-07-21 Sun 14:02] *** DONE Static 1:1 NAT46: translate from IPv4 to IPv6 with a table CLOSED: [2019-07-21 Sun 13:55] **** DONE TCP CLOSED: [2019-07-21 Sun 13:55] **** DONE UDP CLOSED: [2019-07-21 Sun 13:55] **** DONE ICMP <-> ICMPv6 CLOSED: [2019-07-21 Sun 13:55] *** DONE Stateless Prefix based NAT64: IPv6 to IPv4 translation prefix based CLOSED: [2019-07-21 Sun 13:55] **** Allows IPv6 hosts to reach the IPv4 Internet *** See time table above ** DONE Additional features queue (to be discussed) CLOSED: [2019-07-21 Sun 14:01] *** DONE Offset based translation (v4->v6) -> same as range (?) CLOSED: [2019-07-21 Sun 14:00] *** DONE IP address learning (v6/v4) for real life switch? How do hosts find it? CLOSED: [2019-07-21 Sun 14:00] ** DONE Netpfga cabling CLOSED: [2019-07-21 Sun 14:01] | eth2 <--> nf0 | | eth1 <--> nf3 | ** Compile log - VERSIONS | 5.1. - 5.5 | failure due to variable renaming | | 5.6 | subparser: compiled: OK | | 5.7 | subcontrol: [nsg]: OK | | 5.8 | nat64 actions/table: OK | | 5.9 | nat64+headers [esprimo]: OK | | 6.1 | ARP: mixed matches in table: ABORT | | 6.2 | No arp, Vivado Simulator kernel has encounted an exception: ABORT | | 6.3 | Fixed lpm bug: ABORT | | 6.4 | table size = 64, [nsg]: | | 6.5 | udp in ipv6 integrated with ugly define [esprimo]: | ** TODO Benchmark/comparison *** TODO Setup / Benchmark Jool *** TODO Setup / Benchmark tayga * Thesis documentation ** Introduction *** Related work **** RFC6052 - Defining well known prefix 64:ff9b::/96 - Defining embedding depending on prefix: /32../104 in 8 bit steps - Longer than /96: suffix support ** Motivation TBD ** Translation mechanisms - v4 to v6 / vice versa - Stateful / stateless - static / dynamic *** Explicit Address Mappings Table (EAMT) Range based mapping tables See https://www.jool.mx/en/eamt.html, https://tools.ietf.org/html/rfc7757 *** Stateful NAT46 - Not needed - IP address based translation is enough ** Current state of the art tayga/jool TBD *** Tayga - Single threaded - Multi threaded work started due to initiative of ungleich / Chrisrock [IPv6.chat] *** Jool - EAMT bidirectional only (!) IPtables interaction ``` user@T:~# # Create a Jool iptables instance named "example." user@T:~# # Also, establish that the IPv6 representation of any IPv4 address should be user@T:~# # `2001:db8::`. (See sections below for examples.) user@T:~# jool_siit instance add "example" --iptables --pool6 2001:db8::/96 user@T:~# user@T:~# # Tell iptables which traffic should be handled by our newly-created instance: user@T:~# user@T:~# # IPv6: only packets from 2001:db8::198.51.100.8/125 to 2001:db8::192.0.2 user@T:~# ip6tables -t mangle -A PREROUTING \ > -s 2001:db8::198.51.100.8/125 -d 2001:db8::192.0.2.0/120 \ > -j JOOL_SIIT --instance "example" user@T:~# # IPv4: Only packets from 192.0.2 to 198.51.100.8/29 user@T:~# iptables -t mangle -A PREROUTING \ > -s 192.0.2.0/24 -d 198.51.100.8/29 \ > -j JOOL_SIIT --instance "example" ``` 5656 *** Cisco (?) ** DONE P4 based implementation CLOSED: [2019-07-21 Sun 13:55] *** General - IPv6 subnet 2001:db8::/32 - IPv6 hosts are in 2001:db8:6::/64 - IPv6 default router (::/0) is 2001:db8:6::42/64 - IPv4 mapped Internet "NAT64 prefix" 2001:db8:4444::/96 (should go into a table) - IPv4 hosts are in 10.0.4.0/24 - IPv6 in IPv4 mapped hosts are in 10.0.6.0/24 - IPv4 default router = 10.0.0.42 *** DONE IPv4 embedding CLOSED: [2019-07-21 Sun 13:55] RFC6052 #+BEGIN_SRC +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |PL| 0-------------32--40--48--56--64--72--80--88--96--104---------| +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |32| prefix |v4(32) | u | suffix | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |40| prefix |v4(24) | u |(8)| suffix | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |48| prefix |v4(16) | u | (16) | suffix | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |56| prefix |(8)| u | v4(24) | suffix | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |64| prefix | u | v4(32) | suffix | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |96| prefix | v4(32) | +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ #+END_SRC Bits 64..71 have to be 0 -- ref rfc4291 - host identifier - why? Section 2.5.1 of rfc4291 "required to be unique within a subnet prefix" Modified EUI-64 format. Compare EUI-64: first 8 bits of mac address inverting u bit from rfc 4291 #+BEGIN_QUOTE the "u" bit is set to one (1) to indicate universal scope, and it is set to zero (0) to indicate local scope. #+END_QUOTE #+BEGIN_SRC 0 0 0 1 1 2 |0 7 8 5 6 3| +----+----+----+----+----+----+ |cccc|ccug|cccc|cccc|cccc|cccc| +----+----+----+----+----+----+ #+END_SRC *** Neighbor discover protocol **** Initial log - Matching on prefix & ingress port, setting multicast Being forwarded: p4@ubuntu:~/master-thesis$ mx h1 tcpdump -ni h1-eth0 sudo: unable to resolve host ubuntu tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes ^C14:59:22.871803 IP6 2001:db8:62::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8:62::2, length 32 14:59:23.863913 IP6 2001:db8:62::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8:62::2, length 32 14:59:24.864033 IP6 2001:db8:62::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8:62::2, length 32 3 packets captured 3 packets received by filter 0 packets dropped by kernel But no answer yet! root@ubuntu:~/master-thesis/p4app# ip a 1: lo: mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 inet 127.0.0.1/8 scope host lo valid_lft forever preferred_lft forever inet6 ::1/128 scope host valid_lft forever preferred_lft forever 2: h1-eth0@if123: mtu 9500 qdisc netem state UP group default qlen 1000 link/ether 00:00:0a:00:00:01 brd ff:ff:ff:ff:ff:ff link-netnsid 0 inet6 2001:db8:62::2/64 scope global valid_lft forever preferred_lft forever inet6 2001:db8:61::1/64 scope global valid_lft forever preferred_lft forever inet6 fe80::200:aff:fe00:1/64 scope link valid_lft forever preferred_lft forever root@ubuntu:~/master-thesis/p4app# Link local communication does not work: root@ubuntu:~/master-thesis/p4app# ping6 -c1 fe80::200:aff:fe00:2%h1-eth0 PING fe80::200:aff:fe00:2%h1-eth0(fe80::200:aff:fe00:2) 56 data bytes From fe80::200:aff:fe00:1 icmp_seq=1 Destination unreachable: Address unreachable --- fe80::200:aff:fe00:2%h1-eth0 ping statistics --- 1 packets transmitted, 0 received, +1 errors, 100% packet loss, time 0ms root@ubuntu:~/master-thesis/p4app# Packet is received on the other host, but not answered. Why? Real trace from my network: 18:48:17.008524 IP6 2a0a:e5c1:111:111:eb7:ffdb:e245:f712 > ff02::1:ffb7:e225: ICMP6, neighbor solicitation, who has 2a0a:e5c1:111:111:1016:3c5a:38b7:e225, length 32 18:48:18.015016 IP6 2a0a:e5c1:111:111:eb7:ffdb:e245:f712 > ff02::1:ffb7:e225: ICMP6, neighbor solicitation, who has 2a0a:e5c1:111:111:1016:3c5a:38b7:e225, length 32 18:48:18.031165 IP6 2a0a:e5c1:111:111:1016:3c5a:38b7:e225 > 2a0a:e5c1:111:111:eb7:ffdb:e245:f712: ICMP6, neighbor advertisement, tgt is 2a0a:e5c1:111:111:1016:3c5a:38b7:e225, length 32 18:48:18.031236 IP6 2a0a:e5c1:111:111:eb7:ffdb:e245:f712 > 2a0a:e5c1:111:111:1016:3c5a:38b7:e225: ICMP6, echo request, seq 1, length 64 18:48:18.031267 IP6 2a0a:e5c1:111:111:eb7:ffdb:e245:f712 > 2a0a:e5c1:111:111:1016:3c5a:38b7:e225: ICMP6, echo request, seq 2, length 64 18:48:18.131709 IP6 2a0a:e5c1:111:111:1016:3c5a:38b7:e225 > 2a0a:e5c1:111:111:eb7:ffdb:e245:f712: ICMP6, echo reply, seq 1, length 64 18:48:18.131732 IP6 2a0a:e5c1:111:111:1016:3c5a:38b7:e225 > 2a0a:e5c1:111:111:eb7:ffdb:e245:f712: ICMP6, echo reply, seq 2, length 64 root@ubuntu:~/master-thesis/p4app# cat /proc/sys/net/ipv6/conf/*/disable_ipv6 1 1 0 0 root@ubuntu:~/master-thesis/p4app# root@ubuntu:~/master-thesis/p4app# ls -1 /proc/sys/net/ipv6/conf/*/disable_ipv6 /proc/sys/net/ipv6/conf/all/disable_ipv6 /proc/sys/net/ipv6/conf/default/disable_ipv6 /proc/sys/net/ipv6/conf/h1-eth0/disable_ipv6 /proc/sys/net/ipv6/conf/lo/disable_ipv6 root@ubuntu:~/master-thesis/p4app# Works on mininet mininet> h2 bash root@line:~# ip a 1: lo: mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 inet 127.0.0.1/8 scope host lo valid_lft forever preferred_lft forever inet6 ::1/128 scope host valid_lft forever preferred_lft forever 2: h2-eth0@if93: mtu 1500 qdisc noqueue state UP group default qlen 1000 link/ether 32:0e:1e:bf:3c:4b brd ff:ff:ff:ff:ff:ff link-netnsid 0 inet 10.0.0.2/8 brd 10.255.255.255 scope global h2-eth0 valid_lft forever preferred_lft forever inet6 fe80::300e:1eff:febf:3c4b/64 scope link valid_lft forever preferred_lft forever root@line:~# ip addr add 2001:db8:61::42/64 dev h2-eth0 root@line:~# ^Dexit mininet> h1 bash root@line:~# ip addr add 2001:db8:61::42/64^[[D^[[D^?^?^?^?^?^?^?^?^?^?^?^C^C root@line:~# ^Dexit mininet> h1 ip addr add 2001:db8:61::2/64 dev h1-eth0 mininet> h2 ping6 -c2 2001:db8:61::2 PING 2001:db8:61::2(2001:db8:61::2) 56 data bytes 64 bytes from 2001:db8:61::2: icmp_seq=1 ttl=64 time=0.230 ms 64 bytes from 2001:db8:61::2: icmp_seq=2 ttl=64 time=0.138 ms --- 2001:db8:61::2 ping statistics --- 2 packets transmitted, 2 received, 0% packet loss, time 1018ms rtt min/avg/max/mdev = 0.138/0.184/0.230/0.046 ms mininet> mininet on VM also works mininet> h1 ip addr add 2001:db8:61::1/64 dev h1-eth0 mininet> h2 ip addr add 2001:db8:61::2/64 dev h2-eth0 mininet> h2 ping6 -c2 2001:db8:61::2 PING 2001:db8:61::2(2001:db8:61::2) 56 data bytes 64 bytes from 2001:db8:61::2: icmp_seq=1 ttl=64 time=0.053 ms 64 bytes from 2001:db8:61::2: icmp_seq=2 ttl=64 time=0.082 ms --- 2001:db8:61::2 ping statistics --- 2 packets transmitted, 2 received, 0% packet loss, time 999ms rtt min/avg/max/mdev = 0.053/0.067/0.082/0.016 ms mininet> WORKING trace on mininet on the VM 19:38:49.852088 IP6 2001:db8:61::2 > ff02::1:ff00:1: ICMP6, neighbor solicitation, who has 2001:db8:61::1, length 32 19:38:49.852144 IP6 2001:db8:61::1 > 2001:db8:61::2: ICMP6, neighbor advertisement, tgt is 2001:db8:61::1, length 32 19:38:49.852163 IP6 2001:db8:61::2 > 2001:db8:61::1: ICMP6, echo request, seq 1, length 64 19:38:49.852176 IP6 2001:db8:61::1 > 2001:db8:61::2: ICMP6, echo reply, seq 1, length 64 checking ipv6 in p4-utils p4@ubuntu:~/p4-utils$ grep -ri ipv6 . ./p4utils/mininetlib/p4_mininet.py: # disable IPv6 ./p4utils/mininetlib/p4_mininet.py: self.cmd("sysctl -w net.ipv6.conf.all.disable_ipv6=1") ./p4utils/mininetlib/p4_mininet.py: self.cmd("sysctl -w net.ipv6.conf.default.disable_ipv6=1") ./p4utils/mininetlib/p4_mininet.py: self.cmd("sysctl -w net.ipv6.conf.lo.disable_ipv6=1") ./p4utils/mininetlib/p4net.py: #remove Ipv6 for all the interfaces ./p4utils/mininetlib/p4net.py: cmd2 = "sysctl net.ipv6.conf.{0}.disable_ipv6=1" ./p4utils/mininetlib/p4net.py: #remove ipv6 Binary file ./p4utils/mininetlib/p4_mininet.pyc matches Binary file ./p4utils/mininetlib/p4net.pyc matches Binary file ./p4utils/utils/runtime_API.pyc matches ./p4utils/utils/runtime_API.py:class UIn_BadIPv6Error(UIn_Error): ./p4utils/utils/runtime_API.py:def ipv6Addr_to_bytes(addr): ./p4utils/utils/runtime_API.py: from ipaddr import IPv6Address ./p4utils/utils/runtime_API.py: ip = IPv6Address(addr) ./p4utils/utils/runtime_API.py: raise UIn_BadIPv6Error() ./p4utils/utils/runtime_API.py: raise UIn_BadIPv6Error() ./p4utils/utils/runtime_API.py: return ipv6Addr_to_bytes(input_str) ./p4utils/utils/runtime_API.py: except UIn_BadIPv6Error: ./p4utils/utils/runtime_API.py: raise UIn_BadParamError("Invalid IPv6 address") p4@ubuntu:~/p4-utils$ Messages we see in the controller on startup DEBUG:main:INCOMING: , ] |>] |>>>> DEBUG:main:INCOMING: , ] |] |>>>> DEBUG:main:INCOMING: , ] |] |>>>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: , ] |>] |>>>> DEBUG:main:INCOMING: , ] |] |>>>> DEBUG:main:INCOMING: , ] |>] |>>>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: , ] |>] |>>>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: >>> **** Ignored ICMPv6 packets We are not using router advertisements, so we ignore RS packets DEBUG:main:INCOMING: >>> **** Double table entries due to collision - NDP: last 24 bit - Switch has same ending address in different networks -> equal last 24 bit - results in trying to add multicast address multiple times Adding entry to exact match table v6_addresses match key: EXACT-ff:02:00:00:00:00:00:00:00:00:00:01:ff:00:00:42 action: controller_reply runtime data: 00:01 Invalid table operation (DUPLICATE_ENTRY) Adding entry to exact match table v6_addresses match key: EXACT-ff:02:00:00:00:00:00:00:00:00:00:01:ff:00:00:43 action: controller_reply runtime data: 00:01 Invalid table operation (DUPLICATE_ENTRY) Adding entry to exact match table v6_addresses match key: EXACT-20:01:0d:b8:00:00:00:01:00:00:00:00:00:00:00:43 action: icmp6_echo_reply runtime data: Entry has been added with handle 5 **** General approach - Need to react on our multicast group - But also need to forward to other ports that subscribed to that multicast group! *** Static mappings - likely need table(s) - need tcp & udp translation *** ICMPv6 **** General / Intro Different lengths possible [20:35] line:~% ping -6 -s 20 ::1 PING ::1(::1) 20 data bytes 28 bytes from ::1: icmp_seq=1 ttl=64 time=0.045 ms 28 bytes from ::1: icmp_seq=2 ttl=64 time=0.064 ms ^C --- ::1 ping statistics --- 2 packets transmitted, 2 received, 0% packet loss, time 1018ms rtt min/avg/max/mdev = 0.045/0.054/0.064/0.012 ms [20:36] line:~% ping -6 -s 80 ::1 PING ::1(::1) 80 data bytes 88 bytes from ::1: icmp_seq=1 ttl=64 time=0.053 ms 88 bytes from ::1: icmp_seq=2 ttl=64 time=0.095 ms ^C --- ::1 ping statistics --- 2 packets transmitted, 2 received, 0% packet loss, time 1001ms rtt min/avg/max/mdev = 0.053/0.074/0.095/0.021 ms [20:36] line:~% Different checksum in most packets. root@ubuntu:~/master-thesis# ip -6 neigh show root@ubuntu:~/master-thesis# ip -6 neigh add 2001:db8:61::42 dev h1-eth0 lladdr 00:00:0a:00:00:42 root@ubuntu:~/master-thesis# ip -6 neigh show 2001:db8:61::42 dev h1-eth0 lladdr 00:00:0a:00:00:42 PERMANENT root@ubuntu:~/master-thesis# root@ubuntu:~/master-thesis# tcpdump -ni h1-eth0 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on h1-eth0, link-type EN10MB (Ethernet), capture size 262144 bytes ^C20:22:43.944152 IP6 2001:db8:61::1 > 2001:db8:61::42: ICMP6, echo request, seq 1, length 64 20:22:43.945992 IP6 2001:db8:61::1 > 2001:db8:61::42: ICMP6, echo request, seq 1, length 64 20:22:44.952453 IP6 2001:db8:61::1 > 2001:db8:61::42: ICMP6, echo request, seq 2, length 64 20:22:44.953995 IP6 2001:db8:61::1 > 2001:db8:61::42: ICMP6, echo request, seq 2, length 64 4 packets captured 4 packets received by filter 0 packets dropped by kernel root@ubuntu:~/master-thesis# **** When pinging we see DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: >>> DEBUG:main:INCOMING: >>> **** Hosts ***** Left side: IPv6 ***** Right side: IPv4 **** Included in the header **** DONE Supported feature: NDP NA/NS - For resolving mac address - Initially controller - Ported into switch **** DONE Supported feature: icmp6 echo reply p4@ubuntu:~/master-thesis/p4app$ python test.py --method ping6_switch PING 2001:db8::42(2001:db8::42) 56 data bytes 64 bytes from 2001:db8::42: icmp_seq=1 ttl=64 time=3.05 ms --- 2001:db8::42 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 3.055/3.055/3.055/0.000 ms p4@ubuntu:~/master-thesis/p4app$ *** Requirements *** Static NAT64 Asymmetric maps: v6->v4 can match whole IPv4 Internet (/96) But v4->v6 can only map sub range! Using /24s (for convience) in IPv4 *** Development mode/loop Code - commit - push - pull - restart switch - check whether all tables are present (missing .apply()) restart controller - check whether tables are applied correctly (type conversion problems) - start tcpdump - start test program - stop tcpdump - add pcap to git repo - git add-commit-push - git pull - start wireshark - debug packets - analyse code - goto 1 *** Setting up a system for working on P4 on devuan **** Scripts in the wild https://github.com/nsg-ethz/p4-learning/blob/master/vm/bin/update-p4c.sh https://github.com/jafingerhut/p4-guide/blob/master/bin/install-p4dev-p4runtime.sh https://github.com/nsg-ethz/p4-learning/tree/master/vm/bin **** mininet **** bmv2 [21:24] line:~% sudo apt install libthrift-dev [21:26] line:~% sudo apt install thrift-compiler libnanomsg-dev libjudy-dev *** DONE Session / dynamice mappings CLOSED: [2019-07-21 Sun 13:56] **** General - Have 1..n session IPv4 addresses - Handle outgoing IPv6: create new session - Handle in ***** TODO Case IPv6 initiator - Mapping whole IPv4 Internet in /96 prefix - Session information for mapping reply - Timeout handling in controller ****** TODO IPv6 udp -> IPv4 - Got 4-5 tuple ([proto], src ip, src port, dst ip, dst port) - Does not / never signal end - Needs timeout for cleaning up ****** TODO IPv6 tcp -> IPv4 - Similar to udp - react on FIN/RST (?) -- could be an addition ****** TODO IPv6 icmp6 -> IPv4 - usual protocol specific changes - Session?? - src ip, dst ip, code ? ***** TODO Case IPv4 initiator - Needs upper level protol **** DONE General network matching CLOSED: [2019-07-21 Sun 13:56] ***** DONE Create table(s) ***** DONE Fill it up from the controller: general network ***** DONE Create controller session handler CLOSED: [2019-07-21 Sun 13:55] ****** Controller Logic - controller selects "outgoing" IPv4 address range => base for sessions - IPv4 addresses can be "random" (in our test case), but need to be unique - switch does not need to know about the "range", only about sessions - on session create, controller selects "random" ip (ring?) - on session create, controller selects "random port" (next in range?) - on session create controller adds choice into 2 tables: incoming, outgoing ***** DONE Feed back to controller: implemented in switch ***** DONE Create ipv6 session in the controller ***** Create ipv4 session in the controller ***** DONE Ensure translation code works CLOSED: [2019-07-21 Sun 13:55] >>> ipaddress.IPv6Network("2001:db8:100::/96")[int(ipaddress.IPv4Address("10.0.0.1"))] IPv6Address('2001:db8:100::a00:1') ****** DONE Status: syn sent, neighbor solicitation working, nothing received on other side INFO:main:unhandled reassambled=>>> from table TABLE_NAT64_SESSION INFO:main:unhandled reassambled=>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>> from table TABLE_V6_NETWORKS INFO:main:unhandled reassambled=>> from table TABLE_V6_NETWORKS ****** DONE action nat64_tcp_session_create is called **** DONE tcp session CLOSED: [2019-07-21 Sun 13:55] **** DONE udp session CLOSED: [2019-07-21 Sun 13:55] **** DONE tcp session CLOSED: [2019-07-21 Sun 13:55] ** TODO Hardware port *** Installation issues Installing vivado would stall/sleep/hang forverer due to missing system library, no error output. *** Build process - Very fragile, many pieces, unclear which step is required for creating what. - Fails at every step - Dependencies in over 80k lines of code (Makefile, python, shell) - Unclear error messages Some step did something and another step fails due do something that was generated by a step that is not clear what it is supposed to do - one step huge output, hundreds to thousands of lines, errors somewher in between => exceeding tmux buffers - some steps take VERY long correctly - some steps stopped in an infinite loop => hard to distinguish - non fatal/fatal errors cannot be distinguished grep: ../../../RELEASE_NOTES: No such file or directory ** TODO Comparison with existing tools (Performance, Features) *** Features | What? | Description | State in P4 | References | |---------------------+------------------------------------------+-------------------+---------------------------------------------------------------------------------| | Jool EAMT | Mapping with tables, multiple entries | Supported | https://www.jool.mx/en/eamt.html, https://www.jool.mx/en/run-eam.html, RFC 7757 | | Jool SIIT | Mapping IPv6 to range of IPv4, one entry | Supported by EAMT | | | Jool Stateful NAT64 | | | https://www.jool.mx/en/intro-xlat.html#stateful-nat64 | | | | | https://www.jool.mx/en/run-nat64.html | | | | | | ** P4 Possible Improvements / Current Challenges / Limitations *** DONE cannot read key from table **** log Key and mask for matching destination is in table. We need this information in the action. However this information is not exposed, so we need to specify another parameter with the same information as in the key(s). Log from slack: (2019-03-14) nico [1:55 PM] If I use LPM for matching, can I easily get the network address from P4 or do I have to use a bitmask myself? In the latter case it is not exactly clear how to get the mask from the table Nate Foster [1:58 PM] You want to retrieve the address in the packet? In a table? And do you want to do the retrieving from the data plane or the control plane? (edited) nico [2:00 PM] If I have a match in a table that matches on LPM, it can be any IP address in a network For calculating the NAT64/NAT46 translation, I will need the base address, i.e. network address to do subtractions/additions So it is fully data plane, what I would like to do I'll commit sample code to show the use case more clearly https://gitlab.ethz.ch/nicosc/master-thesis/blob/master/p4src/static-mapping.p4#L73 GitLab p4src/static-mapping.p4 · master · nicosc / master-thesis gitlab.ethz.ch So the action nat64_static() is used in the table v6_networks. In v6_networks I use a match on `hdr.ipv6.dst_addr: lpm;` What I would like to be able is to get the network address ; I can do that manually, if I have the mask I can also re-inject this parameter by another action argument, but I'd assume that I can somewhere read this out from the table / match Nate Foster [2:15 PM] To make sure I understand, in the data plane, you want to retrieve the address in the lpm pattern? (edited) nico [2:16 PM] I want to retrieve the key Nate Foster [2:16 PM] Wait. The value `hdr.ipv6.dst_addr` is the thing used in the match. So you have that. What you don’t have is the IPv6 address and mask put into the table by the control plane. I assume you want the latter, right? nico [2:17 PM] For example, if my matching key is 2001:db8::/32 and the real address is 2001:db8::f00, then I would like to retrieve 2001:db8:: and 32 from the table exactly :slightly_smiling_face: I can "fix" this by adding another argument, but it feels somewhat wrong to do that Because the table already knows this information Nate Foster [2:26 PM] I can’t think of a way other than the action parameter hack. nico [2:26 PM] Oh, ok Is it because the information is "lost in hardware"? Nate Foster [2:31 PM] No you’re right that most implementations have the value in memory. And one can imagine a different table API that allowed one to retrieve it in the data plane. But unless I am missing something obvious, P4 hides it… **** Result Need to duplicate information *** DONE ICMP6: checksum over payload - variable length, up to 65k Exists! *** DONE Synchronisation with the controller - Double data type definition -> might differ - TYPE_CPU for ethernet - Port ingress offset (9 vs. 16 bit) *** p4c expression bug 2019-03-30 Hit in master-thesis 0.4-28-g881643e #+BEGIN_SRC Warning: you requested the nanomsg event logger, but bmv2 was compiled without -DBMELOG, and the event logger cannot be activated Calling target program-options parser [14:01:44.334] [bmv2] [D] [thread 23356] Set default default entry for table 'MyIngress.icmp6': MyIngress.controller_debug_table_id - 2, [14:01:44.341] [bmv2] [D] [thread 23356] Set default default entry for table 'MyIngress.nat64': MyIngress.controller_debug_table_id - 1, [14:01:44.344] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_act': act - [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_act_0': act_0 - [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_nat64_icmp6_generic': MyIngress.nat64_icmp6_generic - [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_act_1': act_1 - [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_act_2': act_2 - [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'MyIngress.v4_networks': MyIngress.controller_debug_table_id - 5, [14:01:44.345] [bmv2] [D] [thread 23356] Set default default entry for table 'MyIngress.v6_networks': MyIngress.controller_debug_table_id - 3, [14:01:44.346] [bmv2] [D] [thread 23356] Set default default entry for table 'tbl_act_3': act_3 - Invalid entry type 'expression' in field list bad json: { "type" : "expression", "value" : { "type" : "expression", "value" : { "left" : null, "op" : "d2b", "right" : { "type" : "field", "value" : [ "scalars", "metadata.chk_icmp6_na_ns" ] } } } } #+END_SRC *** DONE Only one LPM key supported in tables (2019-03-23) Priority support in ternary possible. Means rewriting for developers. Could possibly be supported by switching to ternary mode internally. #+BEGIN_SRC ../p4src/static-mapping.p4(121): error: MyIngress.nat64, Multiple LPM keys in table table nat64 { ^^^^^ Compilation Error #+END_SRC Code: #+BEGIN_SRC table nat64 { key = { hdr.ipv6.src_addr: lpm; hdr.ipv6.dst_addr: lpm; } actions = { controller_debug; nat64_static; NoAction; } size = NAT64_TABLE_SIZE; default_action = controller_debug; } #+END_SRC *** No table meta information for default actions (asked 2019-03-25) Is there any meta information for "from which table was the action called" available? My use case is having a debug action that sends packets to the controller and I use it as a default_action in various tables; however know I don't know anymore from which table the action was called. Is there any kind of meta information which table called me available? I could work around this by using if(! .. .hit) { my_action(table_id) }, but it would not work with using default_action = ... *** DONE No switch in actions, No conditional execution in actions **** 3 possible solutions - multi table (state as of 2019-03-28) - switch/if in actions: with shadow tables - switch/if in apply block **** log Imho, compiler should be able to unroll these to some degree. #+BEGIN_SRC ../p4src/static-mapping.p4(60): error: SwitchStatement: switch statements not allowed in actions switch(hdr.icmp6.type) { ^^^^^^ #+END_SRC #+BEGIN_SRC ../p4src/static-mapping.p4(57): error: MethodCallStatement: Conditional execution in actions is not supported on this target hdr.icmp.setValid(); ^^^^^^^^^^^^^^^^^^^ ../p4src/static-mapping.p4(70): error: MethodCallStatement: Conditional execution in actions is not supported on this target hdr.icmp6.setInvalid(); ^^^^^^^^^^^^^^^^^^^^^^ ../p4src/static-mapping.p4(73): error: MethodCallStatement: Conditional execution in actions is not supported on this target hdr.icmp6_na_ns.setInvalid(); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ../p4src/static-mapping.p4(74): error: MethodCallStatement: Conditional execution in actions is not supported on this target hdr.icmp6_option_link_layer_addr.setInvalid(); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Compilation Error p4@ubuntu:~/master-thesis/p4app$ #+END_SRC Code: #+BEGIN_SRC if(hdr.ipv6.next_header == PROTO_ICMP6) { nat64_icmp6(); } #+END_SRC *** TODO Modules, OS Not addressed so far: how to create re-usable code fragments that can be plugged in easily. There could be a hypothetical "P4OS" that manages code fragments. This might include, but not limited to downloading (signed?) source code, managing dependencies similar to Linux package management, handling updates, etc. *** TODO Code sharing (controller, switch) Many constants double defined. Easy to make errors. *** Checksum handling: v6->v4 adding, not checking Currently checksums are NOT checked. For translation v6->v4 this means we add a checksum without ever checking v4 checksum before. ** Implementation description and limitations *** Implementation description [move todos here] **** TODO Support (non-) fragmentation - if DF bit is not set in ipv4 **** TODO Supporting [different] MTUs - sizes of headers are different - packet might not fit into same mtu anymore - send back "ICMP Packet Too Big messages to the sender." RFC7915 **** TODO pmtud support - mss change #+BEGIN_QUOTE translator MUST send a Packet Too Big error message or fragment the packet when the packet size exceeds the MTU of the next-hop interface. #+END_QUOTE https://tools.ietf.org/html/rfc7915 *** Limitations **** IPv4 embedding (RFC6052, RFC4291) Supported is similar to the "IPv4-Compatible IPv6 Address" as defined by rfc4291 section 2.5.5.1. Longer prefixes can be specified, but effectively last part used. Not ensuring 16 0 bits. Deprecated according to RFC4291. Also section 2.5.5.2 "IPv4-Mapped IPv6 Address" - Only correctly support /96 prefix - Other modes also embed in last 32 bits - However supports any prefix length >= 96 Mac addresses: bit 0 = unicast (0)/multicast(1), bit 1 = local (1)/global (0) - site wiki/mac U/L bit is universal/local, bit 2; inverting: local = 0, global = 1 **** No fragmentation support (yet) In line with RFC7915 #+BEGIN_QUOTE Fragmented ICMP/ICMPv6 packets will not be translated by IP/ICMP translators. #+END_QUOTE **** No session handling (yet) 1:1 mappings. No (automatic) session. **** IPv4 / IPv6 embedding Currently offset based - probably not following the RFC! **** No DNS64 has already been solved in a different domain - could even do transparent / in network modification **** Incomplete NDP Very limited option support **** NAT64 mappings not source network dependent Only the destination network is matched for deciding on NAT64, as priority based double LPM is not supported. This limits a prefix to be used only in one network. **** TODO No resolution of hardware addresses - hardcoded ip --> mac addresses Correct version: Resolve mac address in controller, buffer packet, replay packet / handle packet. Only has to be set, when packets originate from the switch/controller. **** TODO No support of IPv4 options - header is assumed to be always 20 octets **** TODO Security issue: not checking checksums before - Could be implemented ** TODO Log various *** 2019-06-06 No device seen after loading modules after reboot - netfpga. Trying to reprogram #+BEGIN_CENTER + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs minip4.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. minip4.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 11MB 1.7MB/s 00:06 + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Check programming FPGA or Reboot machine ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh root@rainbow:~/master-thesis/netpfga/minip4/simple_sume_switch/bitfiles# #+END_CENTER Full run, messages are the same: #+BEGIN_CENTER + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs minip4.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. minip4.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 10MB 1.7MB/s 00:06 + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Check programming FPGA or Reboot machine ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh [0:33] rainbow:minip4% sudo reboot #+END_CENTER *** 2019-06-07: exec format error Trying to load kernel module now gives an error: #+BEGIN_CENTER [7:05] rainbow:netpfga% . ./bashinit [7:05] rainbow:netpfga% bash build-load-drivers.sh + cd /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 + make all make -C /lib/modules/5.0.0-16-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-5.0.0-16-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-16-generic' + sudo make install make -C /lib/modules/5.0.0-16-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-5.0.0-16-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-16-generic' install -o root -g root -m 0755 -d /lib/modules/5.0.0-16-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/5.0.0-16-generic/extra/sume_riffa/ depmod -a 5.0.0-16-generic + sudo modprobe sume_riffa modprobe: ERROR: could not insert 'sume_riffa': Exec format error [7:06] rainbow:netpfga% #+END_CENTER dmesg: #+BEGIN_CENTER [ 257.356321] sume_riffa: version magic '5.0.0-15-generic SMP mod_unload ' should be '5.0.0-16-generic SMP mod_unload ' #+END_CENTER Rebuilding module: #+BEGIN_CENTER [7:08] rainbow:sume_riffa_v1_0_0% make clean make -C /lib/modules/5.0.0-16-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 clean make[1]: Entering directory '/usr/src/linux-headers-5.0.0-16-generic' CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/.tmp_versions CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/Module.symvers make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-16-generic' [7:08] rainbow:sume_riffa_v1_0_0% make all make -C /lib/modules/5.0.0-16-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-5.0.0-16-generic' CC [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.o Building modules, stage 2. MODPOST 1 modules CC /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.mod.o LD [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.ko make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-16-generic' [7:08] rainbow:sume_riffa_v1_0_0% sudo make install sudo modprobe sume_riffa make -C /lib/modules/5.0.0-16-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-5.0.0-16-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-5.0.0-16-generic' install -o root -g root -m 0755 -d /lib/modules/5.0.0-16-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/5.0.0-16-generic/extra/sume_riffa/ depmod -a 5.0.0-16-generic [7:08] rainbow:sume_riffa_v1_0_0% #+END_CENTER The devices are back: #+BEGIN_CENTER [7:08] rainbow:sume_riffa_v1_0_0% ip l 1: lo: mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 2: eth0: mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000 link/ether 70:85:c2:ad:62:79 brd ff:ff:ff:ff:ff:ff 3: wlan0: mtu 1500 qdisc mq state DOWN mode DORMANT group default qlen 1000 link/ether dc:8b:28:47:5c:f7 brd ff:ff:ff:ff:ff:ff 4: nf0: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff 5: nf1: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff 6: nf2: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 7: nf3: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff [7:09] rainbow:sume_riffa_v1_0_0% #+END_CENTER *** 2019-06-08: adding table entries mac = 02:53:55:42:45:01 (from send_packet.py) #+BEGIN_CENTER >> list_cam_tables ------------ lookup_table : ------------ {u'action_ids': {u'TopPipe.do_nothing': 2, u'TopPipe.send_to_port1': 3, u'TopPipe.swap_eth_addresses': 1}, u'annotations': {u'Xilinx_ExternallyConnected': [u'0'], u'Xilinx_LookupEngineType': [u'EM'], u'name': [u'TopPipe.lookup_table']}, u'match_type': u'EM', u'p4_name': u'lookup_table', u'px_class': u'LookupEngine', u'px_name': u'lookup_table', u'px_type_name': u'lookup_table_t', u'request_fields': [{u'p4_name': u'p.ethernet.dstAddr', u'px_name': u'lookup_request_key', u'size': 48, u'type': u'bits'}], u'response_fields': [{u'px_name': u'hit', u'size': 1, u'type': u'bits'}, {u'px_name': u'action_run', u'size': 2, u'type': u'bits'}]} >> root@rainbow:~# ip l s nf0 up >> table_cam_add_entry ERROR: table_cam_add_entry => DESCRIPTION: Add an entry to the specified table PARAMS: : name of the table to add an entry to : name of the action to use in the entry (must be listed in the table's actions list) : space separated list of keys to use as the entry key (must correspond to table's keys in the order defined in the P4 program) : space separated list of values to provide as input to the action [''] >> table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff ERROR: table_cam_add_entry => DESCRIPTION: Add an entry to the specified table PARAMS: : name of the table to add an entry to : name of the action to use in the entry (must be listed in the table's actions list) : space separated list of keys to use as the entry key (must correspond to table's keys in the order defined in the P4 program) : space separated list of values to provide as input to the action ['lookup_table send_to_port1 ff:ff:ff:ff:ff:ff'] [20:09] rainbow:CLI% python P4_SWITCH_CLI.py loading libsume.. loading libsume.. loading libcam.. The SimpleSumeSwitch interactive command line tool type help to see all commands >> table_cam_add_entry lookup_table send_to_port1 => ff:ff:ff:ff:ff:ff ERROR: table_cam_add_entry => DESCRIPTION: Add an entry to the specified table PARAMS: : name of the table to add an entry to : name of the action to use in the entry (must be listed in the table's actions list) : space separated list of keys to use as the entry key (must correspond to table's keys in the order defined in the P4 program) : space separated list of values to provide as input to the action [20:10] rainbow:CLI% table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff => "" >> table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff => CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xffffffff WROTE 0x44020054 = 0xffff WROTE 0x44020080 = 0x0003 python: ioctl: Unknown error 512 [20:27] rainbow:CLI% #+END_CENTER *** 2019-06-10: testing with INT (hint from Hendrik) **** 15:54 compile & upload done **** 16:36 ...testing ***** replaced ethX with nfX #+BEGIN_CENTER root@rainbow:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/int/sw/hw_test_tool# ./rcv_int.py root@rainbow:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/int/sw/hw_test_tool# ./int_tester.py tcpdump: listening on nf1, link-type EN10MB (Ethernet), capture size 262144 bytes The HW testing tool for the INT design type help to see all commands testing> help Documented commands (type help ): ======================================== help run_test Undocumented commands: ====================== EOF exit testing> run_test 0b11001 . Sent 1 packets. Sent pkt: ------------------------------------------------------------------------------------------ | ETHERNET | ins_cnt:3 max_hop:10 total_hop:0 bitmask:11001 | ------------------------------------------------------------------------------------------ testing> #+END_CENTER ***** DONE Receiver does not see any packet CLOSED: [2019-06-10 Mon 16:37] ***** DONE testing with tcpdump and ETH_DST = "ff:ff:ff:ff:ff:ff" CLOSED: [2019-06-10 Mon 17:34] Sending on nf1, listenng on nf3, all interfaces up #+BEGIN_CENTER root@rainbow:~# tcpdump -ni nf3 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on nf3, link-type EN10MB (Ethernet), capture size 262144 bytes root@rainbow:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/int/sw/hw_test_tool# ./int_tester.py tcpdump: listening on nf1, link-type EN10MB (Ethernet), capture size 262144 bytes The HW testing tool for the INT design type help to see all commands testing> run_test 0b11001 . Sent 1 packets. Sent pkt: ------------------------------------------------------------------------------------------ | ETHERNET | ins_cnt:3 max_hop:10 total_hop:0 bitmask:11001 | ------------------------------------------------------------------------------------------ testing> run_test 0b11001 . Sent 1 packets. Sent pkt: ------------------------------------------------------------------------------------------ | ETHERNET | ins_cnt:3 max_hop:10 total_hop:0 bitmask:11001 | ------------------------------------------------------------------------------------------ testing> #+END_CENTER -> no packet received on nf3, even though commands.txt contains mapping *** 2019-06-10: trying to output on all ports -> unclear test data Test data in gen_testdata.py expects order. If we output to 0b1010101 (=85), then the packet should arrive on all ports. Order unknown. *** 2019-06-11: rebooted -> card is missing from lspci reprogramming. why is it missing? #+BEGIN_CENTER [18:25] rainbow:bitfiles% sudo bash -c ". $HOME/master-thesis/netpfga/bashinit && $(pwd -P)/program_switch.sh" ++ which vivado + xilinx_tool_path=/opt/Xilinx/Vivado/2018.2/bin/vivado + bitimage=int.bit + configWrites=config_writes.sh + '[' -z int.bit ']' + '[' -z config_writes.sh ']' + '[' /opt/Xilinx/Vivado/2018.2/bin/vivado == '' ']' + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs int.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. int.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 13MB 1.7MB/s 00:08 + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Check programming FPGA or Reboot machine ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device rwaxi: ioctl: No such device #+END_CENTER After reprogram AND reboot: 10:00.0 Memory controller: Xilinx Corporation Device 7028 *** 2019-06-12: try broadcasting #+BEGIN_CENTER [SW] CAM_EnableDevice() - done [2274090] INFO: finished packet stimulus file [2735572] ERROR: tuple mismatch for packet 1 expected < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001040000 > actual < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000055040000 > $finish called at time : 2735572 ps : File "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" Line 120 exit #+END_CENTER -> mismatch when using expPkt on all ports -> trying to use bcast fails due to programming errors -> using bcast in the map -> breaks config_writes.py Using bcast, following output : #+BEGIN_CENTER SV_write_control()- done [SW] CAM_EnableDevice() - done [2274090] INFO: finished packet stimulus file [2735572] INFO: packet 1 tuple OK < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000055040000 > [2735572] INFO: packet 1 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000090012222222208022222222208) [2738904] INFO: packet 1 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [2745568] INFO: packet 2 tuple OK < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000055100000 > [2745568] INFO: packet 2 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000090012222222208022222222208) [2748900] INFO: packet 2 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [2755564] INFO: packet 3 tuple OK < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000055400000 > [2755564] INFO: packet 3 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000090012222222208022222222208) [2758896] INFO: packet 3 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [6094228] INFO: stopping simulation after 1000 idle cycles [6094228] INFO: all expected data successfully received [6094228] INFO: TEST PASSED $finish called at time : 6094228 ps : File "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv" Line 207 exit #+END_CENTER -> nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt isn't generated correctly *** 2019-06-13: try downgrading kernel: requires outdated libssl that is not there in 18.x #+BEGIN_CENTER root@rainbow:/home/nico# mkdir ubuntu root@rainbow:/home/nico# mv linux-* ubuntu/ root@rainbow:/home/nico# cd ubuntu/ root@rainbow:/home/nico/ubuntu# ls linux-headers-4.10.0-32-generic_4.10.0-32.36~16.04.1_amd64.deb linux-image-4.10.0-32-generic_4.10.0-32.36~16.04.1_amd64.deb root@rainbow:/home/nico/ubuntu# .. run-parts: executing /etc/kernel/postinst.d/zz-update-grub 4.10.0-32-generic /boot/vmlinuz-4.10.0-32-generic Sourcing file `/etc/default/grub' Sourcing file `/etc/default/grub.d/50-curtin-settings.cfg' Sourcing file `/etc/default/grub.d/init-select.cfg' Generating grub configuration file ... Found linux image: /boot/vmlinuz-5.0.0-16-generic Found initrd image: /boot/initrd.img-5.0.0-16-generic Found linux image: /boot/vmlinuz-5.0.0-15-generic Found initrd image: /boot/initrd.img-5.0.0-15-generic Found linux image: /boot/vmlinuz-4.10.0-32-generic Found initrd image: /boot/initrd.img-4.10.0-32-generic done Errors were encountered while processing: linux-headers-4.10.0-32-generic root@rainbow:/home/nico/ubuntu# #+END_CENTER *** 2019-06-13: reminder: no ubuntu 16.04 originally due to broken packages *** 2019-06-13: re-installing ubuntu 16.04 fails w/ disk detection issues - trying 2 different computers - trying 2 different disks - erased partition table Only worked after creating a sample partition *** 2019-06-13: reinstall sdnet: next button doesn't work on ubuntu 16.04 java traceback when trying to install sdnet #+BEGIN_CENTER Exception in thread "AWT-EventQueue-0" java.lang.IllegalArgumentException: Window must not be zero at java.desktop/sun.awt.X11.XAtom.checkWindow(Unknown Source) at java.desktop/sun.awt.X11.XAtom.getAtomData(Unknown Source) at java.desktop/sun.awt.X11.XToolkit.getWorkArea(Unknown Source) at java.desktop/sun.awt.X11.XToolkit.getInsets(Unknown Source) at java.desktop/sun.awt.X11.XToolkit.getScreenInsets(Unknown Source) at java.desktop/java.awt.Window.init(Unknown Source) at java.desktop/java.awt.Window.(Unknown Source) at java.desktop/java.awt.Window.(Unknown Source) at java.desktop/java.awt.Dialog.(Unknown Source) at java.desktop/java.awt.Dialog.(Unknown Source) at java.desktop/javax.swing.JDialog.(Unknown Source) at java.desktop/javax.swing.JOptionPane.createDialog(Unknown Source) at java.desktop/javax.swing.JOptionPane.createDialog(Unknown Source) at j.a.c(Unknown Source) at j.a.a(Unknown Source) at j.a.a(Unknown Source) at j.a.c(Unknown Source) at com.xilinx.installer.gui.panel.destination.b.a(Unknown Source) at com.xilinx.installer.gui.panel.destination.DestinationPanel.z(Unknown Source) at com.xilinx.installer.gui.E.a(Unknown Source) at com.xilinx.installer.gui.InstallerGUI.l(Unknown Source) at com.xilinx.installer.gui.i.actionPerformed(Unknown Source) at java.desktop/javax.swing.AbstractButton.fireActionPerformed(Unknown Source) at java.desktop/javax.swing.AbstractButton$Handler.actionPerformed(Unknown Source) at java.desktop/javax.swing.DefaultButtonModel.fireActionPerformed(Unknown Source) at java.desktop/javax.swing.DefaultButtonModel.setPressed(Unknown Source) at java.desktop/javax.swing.plaf.basic.BasicButtonListener.mouseReleased(Unknown Source) at java.desktop/java.awt.Component.processMouseEvent(Unknown Source) at java.desktop/javax.swing.JComponent.processMouseEvent(Unknown Source) at java.desktop/java.awt.Component.processEvent(Unknown Source) at java.desktop/java.awt.Container.processEvent(Unknown Source) at java.desktop/java.awt.Component.dispatchEventImpl(Unknown Source) at java.desktop/java.awt.Container.dispatchEventImpl(Unknown Source) at java.desktop/java.awt.Component.dispatchEvent(Unknown Source) at java.desktop/java.awt.LightweightDispatcher.retargetMouseEvent(Unknown Source) at java.desktop/java.awt.LightweightDispatcher.processMouseEvent(Unknown Source) at java.desktop/java.awt.LightweightDispatcher.dispatchEvent(Unknown Source) at java.desktop/java.awt.Container.dispatchEventImpl(Unknown Source) at java.desktop/java.awt.Window.dispatchEventImpl(Unknown Source) at java.desktop/java.awt.Component.dispatchEvent(Unknown Source) at java.desktop/java.awt.EventQueue.dispatchEventImpl(Unknown Source) at java.desktop/java.awt.EventQueue.access$500(Unknown Source) at java.desktop/java.awt.EventQueue$3.run(Unknown Source) at java.desktop/java.awt.EventQueue$3.run(Unknown Source) at java.base/java.security.AccessController.doPrivileged(Native Method) at java.base/java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(Unknown Source) at java.base/java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(Unknown Source) at java.desktop/java.awt.EventQueue$4.run(Unknown Source) at java.desktop/java.awt.EventQueue$4.run(Unknown Source) at java.base/java.security.AccessController.doPrivileged(Native Method) at java.base/java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(Unknown Source) at java.desktop/java.awt.EventQueue.dispatchEvent(Unknown Source) at java.desktop/java.awt.EventDispatchThread.pumpOneEventForFilters(Unknown Source) at java.desktop/java.awt.EventDispatchThread.pumpEventsForFilter(Unknown Source) at java.desktop/java.awt.EventDispatchThread.pumpEventsForHierarchy(Unknown Source) at java.desktop/java.awt.EventDispatchThread.pumpEvents(Unknown Source) at java.desktop/java.awt.EventDispatchThread.pumpEvents(Unknown Source) at java.desktop/java.awt.EventDispatchThread.run(Unknown Source) #+END_CENTER Reason was a hidden window. *** 2019-06-13: try using external card for packets *** 2019-06-14: test adding table entry with ubuntu 16.04, kernel 4.15.0-51-generic #+BEGIN_CENTER [12:05] rainbow16:CLI% ./P4_SWITCH_CLI.py loading libsume.. loading libsume.. loading libcam.. The SimpleSumeSwitch interactive command line tool type help to see all commands >> table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff => CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xffffffff WROTE 0x44020054 = 0xffff WROTE 0x44020080 = 0x0003 python: ioctl: Unknown error 512 [12:05] rainbow16:CLI% #+END_CENTER *** 2019-06-14: try finding pre compiled bitfiles that can be tested *** 2019-06-14: re-verify hardware Using https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Acceptance-Test-Project #+BEGIN_CENTER [13:33] rainbow16:acceptance_test% make cores for lib in ./std/cores/nf_sume_10g_interface_shared_logic ./std/cores/nf_axis_gen_chk ./std/cores/nf_sume_10g_interface ./digilent/cores/d_clkfreq_detector ./digilent/cores/nf_sume_gpio_test ./digilent/cores/d_sdctrl ; do\ make -C ip_repo/$lib clean; \ make -C ip_repo/$lib; \ done; make[1]: Entering directory '/home/nico/NetFPGA-SUME-live/projects/acceptance_test/ip_repo/std/cores/nf_sume_10g_interface_shared_logic' rm -rf generated_ip for i in nf_sume_10g_pcs_pma_ff_synchronizer_rst2.v nf_sume_10g_pcs_pma_gt_common.v; do \ rm hdl/$i -fv; \ done; rm -rf vivado* rm -rf .Xil rm -rf nf_sume_10g_interface_shared_logic_project rm -rf component.xml rm -rf xgui make[1]: Leaving directory '/home/nico/NetFPGA-SUME-live/projects/acceptance_test/ip_repo/std/cores/nf_sume_10g_interface_shared_logic' make[1]: Entering directory '/home/nico/NetFPGA-SUME-live/projects/acceptance_test/ip_repo/std/cores/nf_sume_10g_interface_shared_logic' WARNING: Ignoring invalid XILINX_PATH location /opt/Xilinx/Vivado/2016.4. Resolution: An invalid XILINX_PATH location has been detected. To resolve this issue: 1. Verify the value of XILINX_PATH is accurate by viewing the value the variable via 'set XILINX_PATH' for Windows or 'echo $XILINX_PATH' for Linux, and update it as needed. 2. To unset the variable using on Windows using 'set XILINX_PATH=' or remove it from Advanced System Settings\Environment Variables. On Linux 'unsetenv XILINX_PATH' ****** Vivado v2018.2 (64-bit) **** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018 **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. WARNING: [Common 17-1271] The MYVIVADO environment variable specifies an invalid location '/opt/Xilinx/Vivado/2016.4' source ../tcl/nf_sume_pcs_pma_compile.tcl # set ip_name {nf_sume_10g_pcs_pma} # create_project -in_memory -part xc7vx690tffg1761-3 # create_ip -name ten_gig_eth_pcs_pma -vendor xilinx.com -library ip -module_name ${ip_name} INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified #+END_CENTER #+BEGIN_CENTER [14:39] rainbow16:acceptance_test% make test python sw/host/script/NfSumeTest.py Traceback (most recent call last): File "sw/host/script/NfSumeTest.py", line 45, in import wx ImportError: No module named wx Makefile:55: recipe for target 'test' failed make: *** [test] Error 1 [14:40] rainbow16:acceptance_test% ... [14:39] rainbow16:acceptance_test% make test python sw/host/script/NfSumeTest.py Traceback (most recent call last): File "sw/host/script/NfSumeTest.py", line 45, in import wx ImportError: No module named wx Makefile:55: recipe for target 'test' failed make: *** [test] Error 1 [14:40] rainbow16:acceptance_test% [14:40] rainbow16:acceptance_test% make test python sw/host/script/NfSumeTest.py Traceback (most recent call last): File "sw/host/script/NfSumeTest.py", line 52, in import serial ImportError: No module named serial Makefile:55: recipe for target 'test' failed make: *** [test] Error 1 [14:41] rainbow16:acceptance_test% root@rainbow16:~# apt install python-serial #+END_CENTER Trying to run make test -> various path erros -> trying sudo bash #+BEGIN_CENTER root@rainbow16:~/NetFPGA-SUME-live/projects/acceptance_test# . ~nico/master-thesis/netpfga/bashinit #+END_CENTER *** 2019-06-15: downloading / uploading reference switch - http://www.cl.cam.ac.uk/research/srg/netos/projects/netfpga/bitfiles/NetFPGA-SUME-live/1.3.0/reference_switch/reference_switch.bit - https://www.cl.cam.ac.uk/research/srg/netos/projects/netfpga/bitfiles/NetFPGA-SUME-live/1.3.0/ *** 2019-06-15: Testing with external host: seems like my minip4 switch actually works! #+BEGIN_CENTER 22:18:39.824461 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 22:18:40.848171 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 22:18:40.848292 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 22:18:41.872171 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 22:18:41.872286 IP6 2001:db8::1 > ff02::1:ff00:2: ICMP6, neighbor solicitation, who has 2001:db8::2, length 32 22:18:58.848012 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) 22:18:58.848058 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) 22:20:02.849843 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) 22:20:02.849894 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) 22:22:10.850831 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) 22:22:10.850950 IP6 2001:db8::1.5353 > ff02::fb.5353: 0 [2q] PTR (QM)? _ipps._tcp.local. PTR (QM)? _ipp._tcp.local. (45) #+END_CENTER Problem: - So basically riffa_sume doesn't do the right thing[tm] Message from myself: #+BEGIN_CENTER It seems I was really mistaken for the last weeks If I am not totally mistaken, the following is happening with the netpfga: I was testing sending and receiving packets on the same computer; so I sent a packet on nfX and expected an answer on nf0, which is how I wanted to verify that the card works So I ran tcpdump on nf0, send a packet with ping6 and scapy on nf{0,1,2,3} (edited) I have never seen the switch emitting ANY packet back with tcpdump Now with the card connected to another host, sending neighbor solicitation, I see duplicated packets on the other host - so it seems that it might have worked all the time, just that tcpdump on nfX on the host which contains the card does not show the packets #+END_CENTER The testscript now generates 2 packets: #+BEGIN_CENTER root@naked:~# cat foo.py #!/usr/bin/python3 import sys from scapy.all import * if __name__ == '__main__': iface = sys.argv[1] e = Ether(src="02:53:55:42:45:01", dst='ff:ff:ff:ff:ff:ff') i = IPv6(src = "2001:db8:42::1", dst = "2001:db8::2") t = TCP(dport=80, sport=random.randint(49152,65535)) d = "A" pkg = e / i / t / d sendp(pkg, iface=iface, verbose=True) root@naked:~# 22:27:34.542877 IP6 2001:db8:42::1.63186 > 2001:db8::2.80: Flags [S], seq 0:1, win 8192, length 1: HTTP 22:27:34.542982 IP6 2001:db8:42::1.63186 > 2001:db8::2.80: Flags [S], seq 0:1, win 8192, length 1: HTTP #+END_CENTER *** 2019-06-17: Testing hardware: test tool seems not to work - Compiling tests -> ok - Select test -> ok - Run test -> nothing happens, tests gets unchecked #+BEGIN_CENTER --------------------------------------------- [ddr3B]: Running Auto Test --------------------------------------------- Traceback (most recent call last): File "/usr/lib/python2.7/dist-packages/wx-3.0-gtk2/wx/_core.py", line 16765, in lambda event: event.callable(*event.args, **event.kw) ) File "sw/host/script/NfSumeTest.py", line 848, in UpdateProgress self.progressDlg.Update(self.curProgress, str(localLine)) File "/usr/lib/python2.7/dist-packages/wx-3.0-gtk2/wx/_core.py", line 16710, in __getattr__ raise PyDeadObjectError(self.attrStr % self._name) wx._core.PyDeadObjectError: The C++ part of the NfSumeProgress object has been deleted, attribute access no longer allowed. Exception in thread Thread-18: Traceback (most recent call last): File "/usr/lib/python2.7/threading.py", line 801, in __bootstrap_inner self.run() File "sw/host/script/NfSumeTest.py", line 947, in run self.target(*self.data) File "sw/host/script/NfSumeTest.py", line 355, in StartAutoTest self.TestInterface(testName) File "sw/host/script/NfSumeTest.py", line 465, in TestInterface self.ProgramFpga('../../../bitfiles/' + self.nfSumeTestConfiguration[testName]['bitstream']) File "sw/host/script/NfSumeTest.py", line 586, in ProgramFpga self.getFpgaIndex() File "sw/host/script/NfSumeTest.py", line 574, in getFpgaIndex p = Popen(['djtgcfg', 'init', '-d', 'NetSUME'], stdout=PIPE, bufsize = 1) File "/usr/lib/python2.7/subprocess.py", line 711, in __init__ errread, errwrite) File "/usr/lib/python2.7/subprocess.py", line 1343, in _execute_child raise child_exception OSError: [Errno 2] No such file or directory #+END_CENTER Might come from: #+BEGIN_CENTER zsh: command not found: djtgcfg [10:32] rainbow16:~% find /opt -name djtgcfg #+END_CENTER -> does not exist anywhere #+BEGIN_CENTER [10:34] rainbow16:NetFPGA-SUME-live% grep -r djtgcfg . ./projects/acceptance_test/sw/host/script/NfSumeTest.py: p = Popen(['djtgcfg', 'init', '-d', 'NetSUME'], stdout=PIPE, bufsize = 1) ./projects/acceptance_test/sw/host/script/NfSumeTest.py: #p = Popen(['djtgcfg', 'prog', '-d', 'NetSUME', '-i', self.fpgaIndex, '-f', ./tools/scripts/load_bitfile.py: p = Popen(['djtgcfg', 'init', '-d', 'NetSUME'], stdout=PIPE, bufsize = 1) #+END_CENTER Likely requires "Installation of Digilent Adept Tools" https://reference.digilentinc.com/reference/software/adept/start (website does not load as of 2019-06-17, 10:39)! Install deb that supports the hardware test: #+BEGIN_CENTER 10-ipv6-privacy.conf Desktop digilent.adept.runtime_2.19.2-amd64.deb root@rainbow16:~# dpkg -i digilent.adept.runtime_2.19.2-amd64.deb Selecting previously unselected package digilent.adept.runtime. (Reading database ... 275077 files and directories currently installed.) Preparing to unpack digilent.adept.runtime_2.19.2-amd64.deb ... Unpacking digilent.adept.runtime (2.19.2) ... Setting up digilent.adept.runtime (2.19.2) ... Processing triggers for libc-bin (2.23-0ubuntu11) ... root@rainbow16:~# #+END_CENTER The required tool does not seem to be included in the adept runtime: #+BEGIN_CENTER root@rainbow16:~# dpkg -l | grep digilent ii digilent.adept.runtime 2.19.2 amd64 Digilent Adept Runtime root@rainbow16:~# dpkg -L digilent.adept.runtime | grep djtgcfg root@rainbow16:~# #+END_CENTER Trying -tools as well #+BEGIN_CENTER [12:55] line:Downloads% scp digilent.adept.utilities_2.2.1-amd64.deb root@rainbow16.place6.ungleich.ch: digilent.adept.utilities_2.2.1-amd64.deb 100% 465KB 1.2MB/s 00:00 [12:56] line:Downloads% root@rainbow16:~# ls 10-ipv6-privacy.conf Desktop digilent.adept.runtime_2.19.2-amd64.deb digilent.adept.utilities_2.2.1-amd64.deb root@rainbow16:~# dpkg -i digilent.adept.utilities_2.2.1-amd64.deb Selecting previously unselected package digilent.adept.utilities. (Reading database ... 275201 files and directories currently installed.) Preparing to unpack digilent.adept.utilities_2.2.1-amd64.deb ... Unpacking digilent.adept.utilities (2.2.1) ... Setting up digilent.adept.utilities (2.2.1) ... Processing triggers for man-db (2.7.5-1) ... root@rainbow16:~# which djtgcfg /usr/bin/djtgcfg root@rainbow16:~# #+END_CENTER New error from the hardware test: #+BEGIN_CENTER --------------------------------------------- [pcie]: Running Auto Test --------------------------------------------- Traceback (most recent call last): File "/usr/lib/python2.7/dist-packages/wx-3.0-gtk2/wx/_core.py", line 16765, in lambda event: event.callable(*event.args, **event.kw) ) File "sw/host/script/NfSumeTest.py", line 848, in UpdateProgress self.progressDlg.Update(self.curProgress, str(localLine)) File "/usr/lib/python2.7/dist-packages/wx-3.0-gtk2/wx/_core.py", line 16710, in __getattr__ raise PyDeadObjectError(self.attrStr % self._name) wx._core.PyDeadObjectError: The C++ part of the NfSumeProgress object has been deleted, attribute access no longer allowed. Exception in thread Thread-21: Traceback (most recent call last): File "/usr/lib/python2.7/threading.py", line 801, in __bootstrap_inner self.run() File "sw/host/script/NfSumeTest.py", line 947, in run self.target(*self.data) File "sw/host/script/NfSumeTest.py", line 466, in TestInterface self.serialCon.readlines() File "/usr/lib/python2.7/dist-packages/serial/serialposix.py", line 495, in read raise SerialException('device reports readiness to read but returned no data (device disconnected or multiple access on port?)') SerialException: device reports readiness to read but returned no data (device disconnected or multiple access on port?) #+END_CENTER *** 2019-06-17: checksum delta / diff approach **** crc / checksum operation "The checksum field is the 16 bit one's complement of the one's complement sum of all 16-bit words in the header and text." https://en.wikipedia.org/wiki/Transmission_Control_Protocol#Checksum_computation *** 2019-06-21: create table entries on new card #+BEGIN_CENTER >> table_cam_add_entry lookup_table send_to_port1 ff:ff:ff:ff:ff:ff => CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xffffffff WROTE 0x44020054 = 0xffff WROTE 0x44020080 = 0x0003 READ 0x44020044 = 0x0001 WROTE 0x44020040 = 0x0001 READ 0x44020044 = 0x0001 READ 0x44020044 = 0x0001 success >> #+END_CENTER *** 2019-06-24: meeting laurent *** 2019-06-24: begin porting original code to netpfga: packet mismatch - why?? #+BEGIN_CENTER + actual_line=actual (tlast, tkeep, tdata) = (0, ffffffff, 000000000000000080fe403b0a0000000060dd86012222222208022222222208) + [ expected (tlast, tkeep, tdata) = (0, ffffffff, 000000000000000080fe403b0a0000000060dd86022222222208012222222208) != actual (tlast, tkeep, tdata) = (0, ffffffff, 000000000000000080fe403b0a0000000060dd86012222222208022222222208) ] + echo packet mismatch packet mismatch #+END_CENTER v2: #+BEGIN_CENTER + sed -e s/.*= replace script with port1 *** 2019-07-01: verify checksumming #+BEGIN_CENTER if struct.pack("H",1) == b"\x00\x01": # big endian def checksum(pkt): if len(pkt) % 2 == 1: pkt += b"\0" s = sum(array.array("H", pkt)) s = (s >> 16) + (s & 0xffff) s += s >> 16 s = ~s return s & 0xffff else: def checksum(pkt): if len(pkt) % 2 == 1: pkt += b"\0" s = sum(array.array("H", pkt)) s = (s >> 16) + (s & 0xffff) s += s >> 16 s = ~s return (((s>>8)&0xff)|s<<8) & 0xffff #+END_CENTER *** 2019-07-01: 128 bit ipv6 struct -> no conversion! - https://docs.python.org/2.7/library/struct.html - .packed of ipaddress works *** 2019-07-01: finish sum, use scapy checksum *** 2019-07-01: meeting Laurent *** 2019-07-06: test bmv2 / delta Story: - Static mapping / no controller - IPv4 packet goes in - Translated to IPv6 - IPv6 packet goes in - Translated to IPv4 - Checksums match, but we only update it using HashAlgorithm.csum16 *** 2019-07-10: hacking To be finished today: - delta on bmv2 - general compile on netpfga [no license server] Using #+BEGIN_CENTER def test_v4_udp_to_v6(self): print('mx h3 "echo V4-OK | socat - UDP:10.1.1.1:2342"') print('mx h1 "echo V6-OK | socat - UDP-LISTEN:2342"') return #+END_CENTER --> gateway not reachable! -> need to verify neighbor discovery *** 2019-07-11: again silent errors End of log file #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ less $P4_PROJECT_DIR/nf_sume_sdnet_ip/SimpleSumeSwitch/LOG [2830534] INFO: finished packet stimulus file [4301612] INFO: packet 1 tuple OK < tuple_out_digest_data, tuple_out_standard_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > [4301612] INFO: packet 1 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000000081111111108082222222208) [4304944] INFO: packet 1 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [7640276] INFO: stopping simulation after 1000 idle cycles [7640276] INFO: all expected data successfully received [7640276] INFO: TEST PASSED $finish called at time : 7640276 ps : File "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv" Line 207 exit INFO: [Common 17-206] Exiting xsim at Thu Jul 11 08:52:29 2019... #+END_CENTER BUT #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ grep -i error $P4_PROJECT_DIR/nf_sume_sdnet_ip/SimpleSumeSwitch/LOG ERROR: [VRFC 10-1491] unexpected EOF [/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp:37] INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_0_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_1_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_2_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_3_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_4_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_5_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_6_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_7_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_8_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_9_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_10_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_11_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_12_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_0_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_1_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_2_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_3_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_4_ErrorCheck Compiling module work.TopParser_t_EngineStage_0_ErrorC... Compiling module work.TopParser_t_EngineStage_1_ErrorC... Compiling module work.TopParser_t_EngineStage_2_ErrorC... Compiling module work.TopParser_t_EngineStage_3_ErrorC... Compiling module work.TopParser_t_EngineStage_4_ErrorC... nico@nsg-System:~/master-thesis/netpfga$ #+END_CENTER Another generated file problem: #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ ls -alh /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp -rw-rw-r-- 1 nico nico 5.6K Jul 11 08:51 /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp nico@nsg-System:~/master-thesis/netpfga$ date Don Jul 11 10:54:22 CEST 2019 #+END_CENTER *** 2019-07-11: repair icmp6 in bmv2 - correctly re-imported checksumming *** 2019-07-13: get small netpfga working again **** current error #+BEGIN_CENTER cp /home/nico/projects/P4-NetFPGA/tools/scripts/format_coe.py . && python format_coe.py && rm -f format_coe.py 16 mv -f id_rom16x32.coe ../hw/create_ip/ mv -f rom_data.txt ../hw/create_ip/ if test -d project; then\ echo "export simple_sume_switch project to SDK"; \ vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch;\ else \ echo "Project simple_sume_switch does not exist.";\ echo "Please run \"make project\" to create and build the project first";\ fi;\ export simple_sume_switch project to SDK ****** Vivado v2018.2 (64-bit) **** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018 **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. source tcl/export_hardware.tcl # set design [lindex $argv 0] # puts "\nOpening $design XPR project\n" Opening simple_sume_switch XPR project # open_project project/$design.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-24530-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue. WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-24530-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue. open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 1364.332 ; gain = 187.594 ; free physical = 10415 ; free virtual = 15693 # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% Vivado% Vivado% quit #+END_CENTER **** might be missing .runs/synth_1 (impl_1 respectively) **** DONE Grep'ing for errors gives one unexpected EOF, but continues CLOSED: [2019-07-21 Sun 12:13] #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ grep -i error MAINLOG cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API ERROR: [VRFC 10-1491] unexpected EOF [/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp:37] INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_0_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_1_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_2_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_3_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_4_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_5_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_6_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_7_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_8_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_9_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_10_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_11_ErrorCheck INFO: [VRFC 10-311] analyzing module TopDeparser_t_EngineStage_12_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_0_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_1_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_2_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_3_ErrorCheck INFO: [VRFC 10-311] analyzing module TopParser_t_EngineStage_4_ErrorCheck Compiling module work.TopParser_t_EngineStage_0_ErrorC... Compiling module work.TopParser_t_EngineStage_1_ErrorC... Compiling module work.TopParser_t_EngineStage_2_ErrorC... Compiling module work.TopParser_t_EngineStage_3_ErrorC... Compiling module work.TopParser_t_EngineStage_4_ErrorC... #+END_CENTER **** DONE gen_testdata only shows one packet -> no receiving? CLOSED: [2019-07-21 Sun 12:13] #+BEGIN_CENTER ./gen_testdata.py nf0_applied times: [1] nf1_applied times: [] nf2_applied times: [] nf3_applied times: [] #+END_CENTER *** 2019-07-13: changing/fix testdata Still impl_1 error: #+BEGIN_CENTER export simple_sume_switch project to SDK ****** Vivado v2018.2 (64-bit) **** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018 **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. source tcl/export_hardware.tcl # set design [lindex $argv 0] # puts "\nOpening $design XPR project\n" Opening simple_sume_switch XPR project # open_project project/$design.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue. WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue. open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1364.328 ; gain = 187.594 ; free physical = 10371 ; free virtual = 15665 # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% ───────────────────────────────────────────────────────────────────────── #+END_CENTER Command generating *THIS* error: #+BEGIN_CENTER nico 25855 0.0 0.0 4508 1680 pts/10 S+ 17:28 0:00 | \_ /bin/sh ./do-all-steps.sh nico 29005 0.0 0.0 9988 2516 pts/10 S+ 17:32 0:00 | | \_ make nico 6363 0.0 0.0 9988 2536 pts/10 S+ 18:24 0:00 | | \_ make -C hw export_to_sdk nico 6399 0.0 0.0 4508 708 pts/10 S+ 18:24 0:00 | | \_ /bin/sh -c if test -d project; then\ ?echo "export simple_sume_switch project to SDK"; \ ?vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch;\ e lse \ ?echo "Project simple_sume_switch does not exist.";\ ?echo "Please run \"make project\" to create and build the project first";\ fi;\ nico 6400 0.0 0.0 12948 3368 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch nico 6424 0.0 0.0 12944 3132 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/loader -exec vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch nico 6440 0.4 4.0 1397068 643640 pts/10 Sl+ 18:24 0:11 | | \_ /opt/Xilinx/Vivado/2018.2/bin/unwrapped/lnx64.o/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch #+END_CENTER Check whether symlink is a problem: #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ rm ~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 nico@nsg-System:~/master-thesis/netpfga$ mkdir ~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 nico@nsg-System:~/master-thesis/netpfga$ sudo mount --bind ~nico/master-thesis/netpfga/minip4/ ~nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 nico@nsg-System:~/master-thesis/netpfga$ nico@nsg-System:~/master-thesis/netpfga$ rm /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src nico@nsg-System:~/master-thesis/netpfga$ mkdir /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src nico@nsg-System:~/master-thesis/netpfga$ sudo mount --bind ~nico/master-thesis/p4src/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src #+END_CENTER likely this is the cause for the main error: + ./tools/scripts/nf_test.py sim --major switch --minor default **** go through all steps again and try to understand why it (silently) fails later *** 2019-07-13: fix overflow error *** 2019-07-15: fix off-by-one-sometimes - scapy shift code / return does not work **** scapy code results Using meta.v6sum = (bit<16>) ((((tmp>>8) & 0xff)|tmp<<8) & 0xffff) ; we get on the wire: sum 0x324a (incorrect -> 0x5429), Using /* filtering code copied from scapy */ tmp = (tmp >> 16) + (tmp & 0xffff); tmp = tmp + (tmp >> 16); tmp = ~tmp; meta.v6sum = (bit<16>) ((((tmp>>8) & 0xff)|tmp<<8) & 0xffff) ; we get sum 0x48ad (incorrect -> 0x85eb) Still using scapy + adjusted diff: /* here is also a possible overflow in both directions */ hdr.tcp.checksum = hdr.tcp.checksum + meta.v6sum - meta.v4sum; gets sum 0xc5f2 (incorrect -> 0xe7cf) *** 2019-07-16: pcap for debugging tcp pcap/tcp-udp-delta-2019-07-15-1454-h3.pcap pcap/tcp-udp-delta-2019-07-15-1454-h1.pcap *** 2019-07-16: pcap for debugging udp pcap/tcp-udp-delta-2019-07-16-0856-h3.pcap pcap/tcp-udp-delta-2019-07-16-0856-h1.pcap *** DONE 2019-07-16: testing with udp CLOSED: [2019-07-21 Sun 14:08] - suspicion: missing some cases in tcp6 #+BEGIN_CENTER p4@ubuntu:~$ mx h1 "echo V6-OK | socat - UDP6-LISTEN:2342" p4@ubuntu:~/master-thesis/bin$ mx h3 "echo V4-OK | socat - UDP:10.1.1.1:2342" #+END_CENTER 08:57:19.998299 IP6 (hlim 64, next-header UDP (17) payload length: 14) 2001:db8:1::a00:1.59997 > 2001:db8::1.2342: [bad udp cksum 0xd84c -> 0xd84b!] UDP, length 6 **** DONE Result: arp (partly?) missing? CLOSED: [2019-07-16 Tue 11:00] **** Result: udp checksum wrong - should be: 0xd84b - is: 0xd84c My code is +1 too high *** DONE 2019-07-17: continuing on wrap around issue CLOSED: [2019-07-21 Sun 14:08] *** DONE 2019-07-17: connect new intel card: cable problem CLOSED: [2019-07-21 Sun 14:08] #+BEGIN_CENTER [ 37.557095] ixgbe 0000:02:00.0: failed to initialize because an unsupported SFP+ module type was detected. [ 37.557098] ixgbe 0000:02:00.0: Reload the driver after installing a supported module. [ 37.557336] ixgbe 0000:02:00.0: removed PHC on enp2s0f0 [ 59.424009] ixgbe 0000:02:00.1 enp2s0f1: detected SFP+: 8 [ 59.491323] ixgbe 0000:02:00.1 enp2s0f1: NIC Link is Up 10 Gbps, Flow Control: RX/TX [ 59.491337] IPv6: ADDRCONF(NETDEV_CHANGE): enp2s0f1: link becomes ready [ 145.635032] ixgbe 0000:02:00.1 enp2s0f1: NIC Link is Down [ 150.041118] IPv6: ADDRCONF(NETDEV_UP): enp2s0f1: link is not ready [ 155.583358] ixgbe 0000:02:00.1: failed to initialize because an unsupported SFP+ module type was detected. [ 155.583367] ixgbe 0000:02:00.1: Reload the driver after installing a supported module. [ 155.583615] ixgbe 0000:02:00.1: removed PHC on enp2s0f1 root@ESPRIMO-P956:~# modprobe -r ixgbe root@ESPRIMO-P956:~# modprobe ixgbe root@ESPRIMO-P956:~# dmesg [ 414.079745] ixgbe 0000:02:00.1: complete [ 414.080294] ixgbe 0000:02:00.0: complete [ 418.986686] dca service started, version 1.12.1 [ 418.999017] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 5.1.0-k [ 418.999018] ixgbe: Copyright (c) 1999-2016 Intel Corporation. [ 420.175483] ixgbe 0000:02:00.0: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 [ 420.175601] ixgbe 0000:02:00.0: PCI Express bandwidth of 16GT/s available [ 420.175602] ixgbe 0000:02:00.0: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) [ 420.175603] ixgbe 0000:02:00.0: This is not sufficient for optimal performance of this card. [ 420.175604] ixgbe 0000:02:00.0: For optimal performance, at least 20GT/s of bandwidth is required. [ 420.175605] ixgbe 0000:02:00.0: A slot with more lanes and/or higher speed is suggested. [ 420.175906] ixgbe 0000:02:00.0: MAC: 2, PHY: 1, PBA No: G63082-007 [ 420.175907] ixgbe 0000:02:00.0: f8:f2:1e:09:62:d0 [ 420.177427] ixgbe 0000:02:00.0: Intel(R) 10 Gigabit Network Connection [ 420.177431] ixgbe 0000:02:00.0 enp2s0f0: renamed from eth0 [ 420.240323] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 420.276463] ixgbe 0000:02:00.0: registered PHC device on enp2s0f0 [ 420.385392] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 420.393319] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 420.406500] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 421.355467] ixgbe 0000:02:00.1: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 [ 421.355586] ixgbe 0000:02:00.1: PCI Express bandwidth of 16GT/s available [ 421.355587] ixgbe 0000:02:00.1: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) [ 421.355588] ixgbe 0000:02:00.1: This is not sufficient for optimal performance of this card. [ 421.355589] ixgbe 0000:02:00.1: For optimal performance, at least 20GT/s of bandwidth is required. [ 421.355590] ixgbe 0000:02:00.1: A slot with more lanes and/or higher speed is suggested. [ 421.355892] ixgbe 0000:02:00.1: MAC: 2, PHY: 1, PBA No: G63082-007 [ 421.355893] ixgbe 0000:02:00.1: f8:f2:1e:09:62:d1 [ 421.357537] ixgbe 0000:02:00.1 enp2s0f1: renamed from eth0 [ 421.388627] ixgbe 0000:02:00.1: Intel(R) 10 Gigabit Network Connection [ 421.395520] IPv6: ADDRCONF(NETDEV_UP): enp2s0f1: link is not ready [ 421.432277] ixgbe 0000:02:00.1: registered PHC device on enp2s0f1 [ 421.541402] IPv6: ADDRCONF(NETDEV_UP): enp2s0f1: link is not ready root@ESPRIMO-P956:~# [ 466.049782] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 466.057111] IPv6: ADDRCONF(NETDEV_UP): enp2s0f0: link is not ready [ 488.265148] ixgbe 0000:02:00.0: failed to initialize because an unsupported SFP+ module type was detected. [ 488.265157] ixgbe 0000:02:00.0: Reload the driver after installing a supported module. [ 488.265605] ixgbe 0000:02:00.0: removed PHC on enp2s0f0 #+END_CENTER *** DONE 2019-07-16: understood scapy code CLOSED: [2019-07-16 Tue 11:25] meta.v6sum = (bit<16>) ((((tmp>>8) & 0xff)|tmp<<8) & 0xffff) ; This is used to correct endianness! -> not needed in our case *** DONE 2019-07-16: Wraptest in P4 CLOSED: [2019-07-16 Tue 12:09] #+BEGIN_CENTER mx h3 arp -s 10.0.0.2 00:00:0a:00:00:02 echo V4-OK | socat - TCP:10.0.0.2:2342 #+END_CENTER Result on the wire of the wraptest: #+BEGIN_CENTER 10.0.0.3.60106 > 10.0.0.2.2342: Flags [S], cksum 0x0001 (incorrect -> 0xc7f9), seq 3677403557, win 28380, options [mss 9460 ,sackOK,TS val 2328087128 ecr 0,nop,wscale 9], length 0 #+END_CENTER 0xffff + 2 = 1 -> as expected Thus carryover is already implemented. Try to use 16 bit ints *** DONE 2019-07-16: naive approach CLOSED: [2019-07-17 Wed 17:29] Gives off-by-one in udp, sometimes! 10:08:52.626713 IP6 (hlim 64, next-header UDP (17) payload length: 14) 2001:db8:1::a00:1.51345 > 2001:db8::1.2342: [bad udp cks *** DONE 2019-07-16: get values from P4: v6sum, v4sum and co. CLOSED: [2019-07-16 Tue 13:15] - v6sum = 0x9a6b - v4sum = 0xeadd - 0x4a8a + 0x9a6b = 0xe4f5 (same as python) (code: hdr.udp.checksum = 0x4a8a + 0x9a6b) - hdr.udp.checksum = 0x4a8a + 0x9a6b - 0xeadd; ../p4src/actions_delta_checksum.p4(58): warning: -1512: negative value with unsigned type hdr.udp.checksum = 0x4a8a + 0x9a6b - 0xeadd; Result: 0xfa18! *** DONE 2019-07-16: debug v3.3: even positive wrap around fails!! CLOSED: [2019-07-17 Wed 17:29] - hdr.udp.checksum = 0x91ef + 0x9a6b; ../p4src/actions_delta_checksum.p4(66): warning: 76890: value does not fit in 16 bits hdr.udp.checksum = 0x91ef + 0x9a6b; 11:52:13.177826 IP6 (hlim 64, next-header UDP (17) payload length: 14) 2001:db8:1::a00:1.50705 > 2001:db8::1.2342: [bad udp cksum 0x2c5a -> 0xfc97!] UDP, length 6 *** DONE 2019-07-17: pci-e link speed not enough for 10gbit/s cards: seems ok CLOSED: [2019-07-17 Wed 17:29] eth.nico: #+BEGIN_CENTER ⚡ root  root grep ixgbe dmesg [ 0.000000] Command line: BOOT_IMAGE=/vmlinuz-4.15.0-52-generic root=/dev/mapper/ubuntu--vg-root ro net.ifnames=0 biosdevname=0 ixgbe.allow_unsupported_sfp=1 quiet splash vt.handoff=7 [ 0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-4.15.0-52-generic root=/dev/mapper/ubuntu--vg-root ro net.ifnames=0 biosdevname=0 ixgbe.allow_unsupported_sfp=1 quiet splash vt.handoff=7 [ 0.846649] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 5.1.0-k [ 0.846650] ixgbe: Copyright (c) 1999-2016 Intel Corporation. [ 1.010910] ixgbe 0000:04:00.0: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 [ 1.011030] ixgbe 0000:04:00.0: PCI Express bandwidth of 16GT/s available [ 1.011031] ixgbe 0000:04:00.0: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) [ 1.011031] ixgbe 0000:04:00.0: This is not sufficient for optimal performance of this card. [ 1.011032] ixgbe 0000:04:00.0: For optimal performance, at least 20GT/s of bandwidth is required. [ 1.011033] ixgbe 0000:04:00.0: A slot with more lanes and/or higher speed is suggested. [ 1.011110] ixgbe 0000:04:00.0: MAC: 2, PHY: 15, SFP+: 7, PBA No: E68793-009 [ 1.011111] ixgbe 0000:04:00.0: f8:f2:1e:41:44:9c [ 1.012491] ixgbe 0000:04:00.0: Intel(R) 10 Gigabit Network Connection [ 1.162887] ixgbe 0000:04:00.1: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 [ 1.163007] ixgbe 0000:04:00.1: PCI Express bandwidth of 16GT/s available [ 1.163008] ixgbe 0000:04:00.1: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) [ 1.163008] ixgbe 0000:04:00.1: This is not sufficient for optimal performance of this card. [ 1.163009] ixgbe 0000:04:00.1: For optimal performance, at least 20GT/s of bandwidth is required. [ 1.163010] ixgbe 0000:04:00.1: A slot with more lanes and/or higher speed is suggested. [ 1.163086] ixgbe 0000:04:00.1: MAC: 2, PHY: 15, SFP+: 8, PBA No: E68793-009 [ 1.163087] ixgbe 0000:04:00.1: f8:f2:1e:41:44:9d [ 1.164565] ixgbe 0000:04:00.1: Intel(R) 10 Gigabit Network Connection #+END_CENTER eth2.nico: #+BEGIN_CENTER dmesg3:[ 573.684999] ixgbe 0000:02:00.0: removed PHC on enp2s0f0 dmesg3:[ 574.024541] ixgbe 0000:02:00.0: complete dmesg3:[ 576.638199] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 5.1.0-k dmesg3:[ 576.638200] ixgbe: Copyright (c) 1999-2016 Intel Corporation. dmesg3:[ 577.815631] ixgbe 0000:02:00.0: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 dmesg3:[ 577.815750] ixgbe 0000:02:00.0: PCI Express bandwidth of 16GT/s available dmesg3:[ 577.815752] ixgbe 0000:02:00.0: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) dmesg3:[ 577.815753] ixgbe 0000:02:00.0: This is not sufficient for optimal performance of this card. dmesg3:[ 577.815754] ixgbe 0000:02:00.0: For optimal performance, at least 20GT/s of bandwidth is required. dmesg3:[ 577.815755] ixgbe 0000:02:00.0: A slot with more lanes and/or higher speed is suggested. dmesg3:[ 577.816056] ixgbe 0000:02:00.0: MAC: 2, PHY: 1, PBA No: G63082-007 dmesg3:[ 577.816057] ixgbe 0000:02:00.0: f8:f2:1e:09:62:d0 dmesg3:[ 577.817719] ixgbe 0000:02:00.0: Intel(R) 10 Gigabit Network Connection dmesg3:[ 577.817722] ixgbe 0000:02:00.0 enp2s0f0: renamed from eth0 dmesg3:[ 577.882377] ixgbe 0000:02:00.0: registered PHC device on enp2s0f0 dmesg3:[ 578.995638] ixgbe 0000:02:00.1: Multiqueue Enabled: Rx Queue count = 8, Tx Queue count = 8 XDP Queue count = 0 dmesg3:[ 578.995757] ixgbe 0000:02:00.1: PCI Express bandwidth of 16GT/s available dmesg3:[ 578.995758] ixgbe 0000:02:00.1: (Speed:5.0GT/s, Width: x4, Encoding Loss:20%) dmesg3:[ 578.995759] ixgbe 0000:02:00.1: This is not sufficient for optimal performance of this card. dmesg3:[ 578.995760] ixgbe 0000:02:00.1: For optimal performance, at least 20GT/s of bandwidth is required. dmesg3:[ 578.995761] ixgbe 0000:02:00.1: A slot with more lanes and/or higher speed is suggested. dmesg3:[ 578.996063] ixgbe 0000:02:00.1: MAC: 2, PHY: 1, PBA No: G63082-007 dmesg3:[ 578.996064] ixgbe 0000:02:00.1: f8:f2:1e:09:62:d1 dmesg3:[ 578.997411] ixgbe 0000:02:00.1: Intel(R) 10 Gigabit Network Connection dmesg3:[ 578.998196] ixgbe 0000:02:00.1 enp2s0f1: renamed from eth0 dmesg3:[ 579.058295] ixgbe 0000:02:00.1: registered PHC device on enp2s0f1 dmesg3:[ 587.785222] ixgbe 0000:02:00.1 enp2s0f1: detected SFP+: 8 root@ESPRIMO-P956:~# #+END_CENTER Testing using iperf3: #+BEGIN_CENTER Time: Wed, 17 Jul 2019 15:07:45 GMT Connecting to host 2001:db8:42::43, port 5201 Cookie: ESPRIMO-P956.1563376065.223736.3cd5b TCP MSS: 1428 (default) [ 4] local 2001:db8:42::42 port 44996 connected to 2001:db8:42::43 port 5201 Starting Test: protocol: TCP, 1 streams, 131072 byte blocks, omitting 0 seconds, 10 second test [ ID] Interval Transfer Bandwidth Retr Cwnd [ 4] 0.00-1.00 sec 1.08 GBytes 9.31 Gbits/sec 7 662 KBytes [ 4] 1.00-2.00 sec 1.08 GBytes 9.28 Gbits/sec 0 672 KBytes [ 4] 2.00-3.00 sec 1.08 GBytes 9.28 Gbits/sec 0 678 KBytes [ 4] 3.00-4.00 sec 1.08 GBytes 9.29 Gbits/sec 0 682 KBytes [ 4] 4.00-5.00 sec 1.08 GBytes 9.28 Gbits/sec 0 703 KBytes [ 4] 5.00-6.00 sec 1.08 GBytes 9.29 Gbits/sec 0 703 KBytes [ 4] 6.00-7.00 sec 1.08 GBytes 9.28 Gbits/sec 0 853 KBytes [ 4] 7.00-8.00 sec 1.08 GBytes 9.29 Gbits/sec 0 853 KBytes [ 4] 8.00-9.00 sec 1.08 GBytes 9.28 Gbits/sec 0 853 KBytes [ 4] 9.00-10.00 sec 1.08 GBytes 9.29 Gbits/sec 0 853 KBytes - - - - - - - - - - - - - - - - - - - - - - - - - Test Complete. Summary Results: [ ID] Interval Transfer Bandwidth Retr [ 4] 0.00-10.00 sec 10.8 GBytes 9.29 Gbits/sec 7 sender [ 4] 0.00-10.00 sec 10.8 GBytes 9.28 Gbits/sec receiver CPU Utilization: local/sender 32.7% (1.2%u/31.5%s), remote/receiver 31.4% (2.7%u/28.8%s) iperf Done. root@ESPRIMO-P956:~# #+END_CENTER server side (netpfga host) #+BEGIN_CENTER ✘ ⚡ root  root  iperf3 -V -s iperf 3.0.11 Linux nsg-System 4.15.0-52-generic #56~16.04.1-Ubuntu SMP Thu Jun 6 12:03:31 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Time: Wed, 17 Jul 2019 15:07:45 GMT Accepted connection from 2001:db8:42::42, port 44994 Cookie: ESPRIMO-P956.1563376065.223736.3cd5b TCP MSS: 1428 (default) [ 5] local 2001:db8:42::43 port 5201 connected to 2001:db8:42::42 port 44996 Starting Test: protocol: TCP, 1 streams, 131072 byte blocks, omitting 0 seconds, 10 second test [ ID] Interval Transfer Bandwidth [ 5] 0.00-1.00 sec 1.04 GBytes 8.92 Gbits/sec [ 5] 1.00-2.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 2.00-3.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 3.00-4.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 4.00-5.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 5.00-6.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 6.00-7.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 7.00-8.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 8.00-9.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 9.00-10.00 sec 1.08 GBytes 9.28 Gbits/sec [ 5] 10.00-10.04 sec 43.9 MBytes 9.28 Gbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - Test Complete. Summary Results: [ ID] Interval Transfer Bandwidth Retr [ 5] 0.00-10.04 sec 10.8 GBytes 9.25 Gbits/sec 7 sender [ 5] 0.00-10.04 sec 10.8 GBytes 9.25 Gbits/sec receiver CPU Utilization: local/receiver 31.4% (2.7%u/28.8%s), remote/sender 32.7% (1.2%u/31.5%s) #+END_CENTER *** DONE 2019-07-17: compiler bug when using a function CLOSED: [2019-07-17 Wed 17:30] #+BEGIN_CENTER ```p4c --target bmv2 --arch v1model --std p4-16 "../p4src/checksum_diff.p4" -o "/home/p4/master-thesis/p4src" In file: /home/p4/p4-tools/p4c/backends/bmv2/common/expression.cpp:168 Compiler Bug: ../p4src/actions_delta_checksum.p4(60): ones_complement_sum(hdr.udp.checksum, tmp);: unhandled case tmp = ones_complement_sum(hdr.udp.checksum, meta.v6sum); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Compilation Error``` Using the following code: ```/* copied from https://p4.org/p4-spec/docs/PSA-v1.1.0.html#appendix-internetchecksum-implementation */ bit<16> ones_complement_sum(in bit<16> x, in bit<16> y) { bit<17> ret = (bit<17>) x + (bit<17>) y; if (ret[16:16] == 1) { ret = ret + 1; } return ret[15:0]; }``` And p4c version: ```p4@ubuntu:~/master-thesis/p4app$ p4c --version p4c 0.5 (SHA: 5ae30ee)``` #+END_CENTER *** DONE 2019-07-17: netpfga compiler also does not support function syntax CLOSED: [2019-07-17 Wed 17:40] #+BEGIN_CENTER make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 headers.p4(246):syntax error, unexpected IDENTIFIER, expecting ( bit<16> ones_complement_sum ^^^^^^^^^^^^^^^^^^^ error: 1 errors encountered, aborting compilation Makefile:34: recipe for target 'all' failed make[1]: *** [all] Error 1 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' Makefile:31: recipe for target 'frontend' failed make: *** [frontend] Error 2 nico@nsg-System:~/master-thesis/netpfga$ nico@nsg-System:~/master-thesis/netpfga$ p4c-sdnet --version /opt/Xilinx/SDNet/2018.2/bin/unwrapped/lnx64.o/p4c-fpga Version 0.0.1 #+END_CENTER Code: #+BEGIN_CENTER /* copied from https://p4.org/p4-spec/docs/PSA-v1.1.0.html#appendix-internetchecksum-implementation */ bit<16> ones_complement_sum(in bit<16> x, in bit<16> y) { bit<17> ret = (bit<17>) x + (bit<17>) y; if (ret[16:16] == 1) { ret = ret + 1; } return ret[15:0]; } #+END_CENTER *** DONE 2019-07-17: use 17 bits for addition -> totally off!x CLOSED: [2019-07-17 Wed 18:03] *** DONE 2019-07-17: retest checksumming: of tcp/udp to V6: ok! CLOSED: [2019-07-17 Wed 18:03] PCAP files to prove it works: #+BEGIN_CENTER create mode 100644 pcap/tcp-udp-delta-2019-07-17-1555-h1.pcap create mode 100644 pcap/tcp-udp-delta-2019-07-17-1555-h3.pcap create mode 100644 pcap/tcp-udp-delta-2019-07-17-1557-h1.pcap create mode 100644 pcap/tcp-udp-delta-2019-07-17-1558-h3.pcap #+END_CENTER *** DONE 2019-07-21: fix "compilation error" on minip4 / netpfga CLOSED: [2019-07-21 Sun 12:29] #+BEGIN_CENTER source tcl/export_hardware.tcl # set design [lindex $argv 0] # puts "\nOpening $design XPR project\n" Opening simple_sume_switch XPR project # open_project project/$design.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-10327-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue. WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-10327-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue. open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1365.707 ; gain = 188.977 ; free physical = 10151 ; free virtual = 15581 # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% Vivado% #+END_CENTER *** TODO 2019-07-21: whether or not to handle icmp(6) checksums *** DONE 2019-07-21: implement v6->v4 delta based CLOSED: [2019-07-21 Sun 12:30] #+BEGIN_CENTER while true; do mx h3 "echo V4-OK | socat - TCP-LISTEN:2343"; sleep 2; done while true; do mx h1 "echo V6-OK | socat - TCP6:[2001:db8:1::a00:1]:2343"; sleep 2; done mx h1 "echo V6-OK | socat - TCP6:[2001:db8:1::a00:1]:2343" #+END_CENTER Result: no reply, but translated packets seen on h3; wrong IPv4 checksum; tcp checksum is ok -> doing manual calculation to see where diff comes from *** DONE 2019-07-21: Shifting / compile errors CLOSED: [2019-07-21 Sun 10:55] v1: wrong parenthesis #+BEGIN_CENTER p4c --target bmv2 --arch v1model --std p4-16 "../p4src/checksum_diff.p4" -o "/home/p4/master-thesis/p4src" ../p4src/actions_delta_checksum.p4(135): warning: <<: Shifting 16-bit value with 17 shift_tmp = ((bit<16>) hdr.ipv4.version) << 12 + ^ ../p4src/actions_delta_checksum.p4(135): warning: 524288: value does not fit in 16 bits shift_tmp = ((bit<16>) hdr.ipv4.version) << 12 + ^ ../p4src/actions_delta_checksum.p4(158): error: <<: shift amount limited to 8 bits on this target shift_tmp = ((bit<16>) hdr.ipv4.ttl) << 8 + ^ Compilation Error #+END_CENTER v2: wrong bit width #+BEGIN_CENTER p4c --target bmv2 --arch v1model --std p4-16 "../p4src/checksum_diff.p4" -o "/home/p4/master-thesis/p4src" ../p4src/actions_delta_checksum.p4(135): warning: <<: shifting value with 4 bits by 12 shift_tmp = (bit<16>) (hdr.ipv4.version << 12) + ^^^^^^^^^^^^^^^^^^^^^^ ../p4src/actions_delta_checksum.p4(136): warning: <<: shifting value with 4 bits by 8 (bit<16>) (hdr.ipv4.ihl << 8) + ^^^^^^^^^^^^^^^^^ ../p4src/actions_delta_checksum.p4(135): warning: <<: shifting value with 4 bits by 12 shift_tmp = (bit<16>) (hdr.ipv4.version << 12) + ^^^^^^^^^^^^^^^^^^^^^^ ../p4src/actions_delta_checksum.p4(136): warning: <<: shifting value with 4 bits by 8 (bit<16>) (hdr.ipv4.ihl << 8) + ^^^^^^^^^^^^^^^^^ #+END_CENTER *** DONE 2019-07-21: Proof of v6->v4 working delta based CLOSED: [2019-07-21 Sun 12:30] #+BEGIN_CENTER pcap/tcp-udp-delta-from-v6-2019-07-21-0853-h1.pcap | Bin 0 -> 4252 bytes pcap/tcp-udp-delta-from-v6-2019-07-21-0853-h3.pcap | Bin 0 -> 2544 bytes #+END_CENTER *** DONE 2019-07-21: Porting to netfpga: found relevant EMPTY FILE CHECK / config writes CLOSED: [2019-07-22 Mon 22:28] **** DONE try1: Initial log CLOSED: [2019-07-21 Sun 14:03] If ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles/config_writes.sh is empty -> compile will fail This files is used by simple_sume_switch/bitfiles/program_switch.sh:${SUME_SDNET}/tools/program_switch.sh minip4.bit config_writes.sh in nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ grep config_writes.sh -r * None of the previous compile runs has touched that file: #+BEGIN_CENTER nico@nsg-System:~$ cat ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles/config_writes.sh nico@nsg-System:~$ ls -alh ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles /config_writes.sh -rw-rw-r-- 1 nico nico 13 Jun 24 15:40 ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles/config_writes.sh #+END_CENTER Traversing back the tree again: #+BEGIN_CENTER nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ make config_writes echo /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata #/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ #+END_CENTER Seems like output is really different from previous installation (?) or previous compiles (?): #+BEGIN_CENTER [2260762] INFO: finished packet stimulus file [3728508] INFO: packet 1 tuple OK < tuple_out_digest_data, tuple_out_standard_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > [3728508] INFO: packet 1 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000000081111111108082222222208) [3731840] INFO: packet 1 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000) [7067172] INFO: stopping simulation after 1000 idle cycles [7067172] INFO: all expected data successfully received [7067172] INFO: TEST PASSED #+END_CENTER vs before: #+BEGIN_CENTER projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv [SW] CAM_Init() - start [SW] CAM_Init() - done [SW] CAM_EnableDevice() - start SV_write_control()- start SV_write_control()- done SV_read_control()- start SV_read_control()- done SV_write_control()- start SV_write_control()- done [SW] CAM_EnableDevice() - done [2420698] INFO: finished packet stimulus file [2735572] ERROR: tuple mismatch for packet 1 expected < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 > actual < tuple_out_digest_data, tuple_out_sume_metadata > = < 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000010000 > $finish called at time : 2735572 ps : File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" Line 120 exit INFO: [Common 17-206] Exiting xsim at Sat May 25 14:38:05 2019... [14:38] rainbow:SimpleSumeSwitch% echo $? 0 [14:38] rainbow:SimpleSumeSwitch% #+END_CENTER As suspected, config_writes output is again "too less" #+BEGIN_CENTER + make config_writes /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata orig dic: OrderedDict([(0, ('00000020', '00000001')), (1, ('00000020', '00000000'))]) new dic: OrderedDict() #+END_CENTER **** DONE try2: finding out how/where/why the config_writes.py matters CLOSED: [2019-07-21 Sun 14:07] ***** answer: step8 references the file, but it does not exist #+BEGIN_CENTER nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default$ cd $NF_DESIGN_DIR/test/sim_switch_default && make 2>&1 | tee ~/master-thesis/netpfga/log/step8-$(date +%F-%H%M%S) rm -f config_writes.py* rm -f *.pyc cp /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py ./ cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py': No such file or directory Makefile:36: recipe for target 'all' failed make: *** [all] Error 1 nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default$ nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ ls ~/master-thesis/netpfga/log/ compile-20190713-1906-failure compile-20190713-2208-failure step4-2019-07-21-120937 step4-2019-07-21-122139 step5-2019-07-21-134905 step8-2019-07-21-140436 compile-20190713-1935-failure compile-2019-07-21-122852 step4-2019-07-21-121529 step4-2019-07-21-122730 step6-2019-07-21-135059 step8-2019-07-21-140549 nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ #+END_CENTER **** DONE try3: find out again, what generates config_writes.py: likely step6 CLOSED: [2019-07-21 Sun 14:11] ***** Solution: Commented out code by me for debugging #+BEGIN_CENTER nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ cd $P4_PROJECT_DIR && make config_writes /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata orig dic: OrderedDict([(0, ('00000020', '00000001')), (1, ('00000020', '00000000'))]) new dic: OrderedDict() nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ #+END_CENTER **** TODO try4: find out why empty "new dic: OrderedDict()" is a problem - unclear **** TODO try5: use older version of gen_testdata Previous output and new output of tuple expect: #+BEGIN_CENTER nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ cat testdata/Tuple_expect.txt 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4$ cat testdata/Tuple_expect.txt 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001010000 0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001040000 #+END_CENTER **** TODO try6: debug the compile process further / find out gen_testdata use #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga/minip4$ grep gen_testdata -r . ./testdata/Makefile: ./gen_testdata.py ./src/minip4_solution-mirror.p4:// default_action = swap_eth_addresses; // test_mirror(): in gen_testdata.py nico@nsg-System:~/master-thesis/netpfga/minip4$ nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ ./gen_testdata.py apply packet on nf0 at 1: > exppkt packet on nf0: > apply packet on nf1 at 3: > exppkt packet on nf0: > nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ #+END_CENTER So why did the above compile output say 3/3? like this: #+BEGIN_CENTER ./gen_testdata.py nf0_applied times: [3] nf1_applied times: [3] nf2_applied times: [] nf3_applied times: [] #+END_CENTER Should that not be [1] and then [3]? --------> same packet / object!!!!!!!!!! **** DONE try7: compile run output after ca. 1.5h CLOSED: [2019-07-21 Sun 16:38] #+BEGIN_CENTER Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-26302-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue. WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-26302-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue. open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1365.715 ; gain = 188.977 ; free physical = 9396 ; free virtual = 15104 # puts "\nOpening $design Implementation design\n" Opening simple_sume_switch Implementation design # open_run impl_1 ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open Vivado% #+END_CENTER **** DONE try8: use new script generating different sequences/objects in gen_testdata CLOSED: [2019-07-21 Sun 19:00] output around gen_testdata: #+BEGIN_CENTER ./gen_testdata.py Applying pkt on nf0 at 1: Applying pkt on nf1 at 2: Applying pkt on nf2 at 3: Applying pkt on nf3 at 4: nf0_applied times: [1] nf1_applied times: [2] nf2_applied times: [3] nf3_applied times: [4] nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ cat /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt : (00000020, 00000001) : (00000020, 00000000) nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ ls -alh /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt -rw-rw-r-- 1 nico nico 70 Jul 21 16:44 /home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ date Son Jul 21 16:48:08 CEST 2019 #+END_CENTER **** TODO try9: generated files missing #+BEGIN_CENTER INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'. WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-14144-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue. WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-14144-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue. #+END_CENTER One (maybe critical) error message on the way #+BEGIN_CENTER ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details #+END_CENTER #+BEGIN_CENTER WARNING: [Synth 8-689] width (12) of port connection 'control_S_AXI_ARADDR' does not match port width (8) of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:199] ERROR: [Synth 8-448] named port connection 'tuple_out_sume_metadata_VALID' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:218] ERROR: [Synth 8-448] named port connection 'tuple_out_sume_metadata_DATA' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:219] ERROR: [Synth 8-6156] failed synthesizing module 'nf_sume_sdnet' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:44] ERROR: [Synth 8-6156] failed synthesizing module 'nf_sume_sdnet_ip' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/synth/nf_sume_sdnet_ip.v:57] ERROR: [Synth 8-6156] failed synthesizing module 'nf_datapath' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/hdl/nf_datapath.v:44] ERROR: [Synth 8-6156] failed synthesizing module 'top' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/hdl/top.v:43] #+END_CENTER Finding all errors/warnings: #+BEGIN_CENTER [19:05] line:log% grep -i -e error -e warn compile-2019-07-21-164256 | wc -l 328 [19:05] line:log% grep -i -e error compile-2019-07-21-164256 | wc -l 68 #+END_CENTER Log from beginning to end #+BEGIN_CENTER /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_config_writes.py nf_sume_sdnet_ip/SimpleSumeSwitch/config_writes.txt 0x44020000 testdata orig dic: OrderedDict([(0, ('00000020', '00000001')), (1, ('00000020', '00000000'))]) new dic: OrderedDict() WARNING: [IP_Flow 19-3656] If you move the project, the path for repository '/home/nico/projects/P4-NetFPGA/lib/hw' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj'.) WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/wrapper/changeEndian.v'. WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/SimpleSumeSwitch.h'. WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.vp'. INFO: [IP_Flow 19-2181] Payment Required is not set for this core. INFO: [IP_Flow 19-2187] The Product Guide file is missing. WARNING: command 'get_user_parameter' will be removed in the 2015.3 release, use 'get_user_parameters' instead echo 16028002 >> rom_data.txt echo `/home/nico/projects/P4-NetFPGA/run_tag.sh` >> rom_data.txt grep: ../../../RELEASE_NOTES: No such file or directory echo 00000204 >> rom_data.txt ## create_root_design "" CRITICAL WARNING: [BD 41-737] Cannot set the parameter TRANSLATION_MODE on /axi_interconnect_0. It is read-only. ### set MICROBLAZE_AXI_IIC_BASEADDR 0x40800000 update_compile_order: Time (s): cpu = 00:00:21 ; elapsed = 00:00:11 . Memory (MB): peak = 2029.402 ; gain = 8.012 ; free physical = 9120 ; free virtual = 14551 loading libsume.. Traceback (most recent call last): File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py", line 42, in import config_writes File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py", line 7 ^ IndentationError: expected an indented block while executing "exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py" invoked from within "set output [exec python $::env(NF_DESIGN_DIR)/test/${test_name}/run.py]" (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_sume_switch_sim.tcl" line 177) INFO: [Common 17-206] Exiting Vivado at Sun Jul 21 16:46:22 2019... Makefile:120: recipe for target 'sim' failed make: *** [sim] Error 1 make: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test' #+END_CENTER #+BEGIN_CENTER nico@nsg-System:~$ cat ~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py from NFTest import * NUM_WRITES = 0 def config_tables(): #+END_CENTER **** fact9: generated python script has a syntax error #+BEGIN_CENTER ~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py #+END_CENTER *** DONE 2019-07-22: trying to "fix" the config_writes.py CLOSED: [2019-07-24 Wed 22:44] #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default$ cat config_writes.py from NFTest import * NUM_WRITES = 0 def config_tables(): nico@nsg-System:~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default$ echo " pass" >> config_writes.py nico@nsg-System:~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default$ cat config_writes.py from NFTest import * NUM_WRITES = 0 def config_tables(): pass nico@nsg-System:~/master-thesis/netpfga/minip4/simple_sume_switch/test/sim_switch_default$ #+END_CENTER *** DONE 2019-07-23: check: switch_calc compiles CLOSED: [2019-07-23 Tue 08:59] *** DONE Reset project to plain send-to-port1 code, no includes CLOSED: [2019-07-24 Wed 12:21] *** DONE 2019-07-23: merge/migrate code into switch calc until it breaks CLOSED: [2019-07-24 Wed 12:21] *** TODO 2019-07-23: install xilinx & co. to eth2.nico.ungleich.cloud -> 2nd compiler [MANUAL] **** DONE Install SDNET via xsetup CLOSED: [2019-07-23 Tue 11:03] **** DONE Not enough space for installing vivado (40g+ required) CLOSED: [2019-07-23 Tue 11:16] #+BEGIN_CENTER root@ESPRIMO-P956:~# mount /dev/sdb3 /mnt/ root@ESPRIMO-P956:~# df -h Filesystem Size Used Avail Use% Mounted on udev 7.0G 0 7.0G 0% /dev tmpfs 1.4G 146M 1.3G 11% /run /dev/sda5 100G 62G 34G 65% / tmpfs 7.0G 192K 7.0G 1% /dev/shm tmpfs 5.0M 4.0K 5.0M 1% /run/lock tmpfs 7.0G 0 7.0G 0% /sys/fs/cgroup /dev/sda2 96M 29M 68M 30% /boot/efi tmpfs 1.4G 36K 1.4G 1% /run/user/108 tmpfs 1.4G 0 1.4G 0% /run/user/1000 tmpfs 1.4G 0 1.4G 0% /run/user/1001 /dev/sdb3 666G 122G 510G 20% /mnt #+END_CENTER Need to move install files to different partition **** DONE Install Vivado via xsetup CLOSED: [2019-07-23 Tue 11:53] **** DONE Install netpfga-live repo: mkdir + git clone CLOSED: [2019-07-23 Tue 11:20] - git@github.com:NetFPGA/P4-NetFPGA-live.git to ~/project/P4-NetFPGA #+BEGIN_CENTER nico@ESPRIMO-P956:~$ mkdir ~/projects nico@ESPRIMO-P956:~$ cd ~/projects/ nico@ESPRIMO-P956:~/projects$ git clone git@github.com:NetFPGA/P4-NetFPGA-live.git Cloning into 'P4-NetFPGA-live'... The authenticity of host 'github.com (140.82.118.4)' can't be established. RSA key fingerprint is SHA256:nThbg6kXUpJWGl7E1IGOCspRomTxdCARLviKw6E5SY8. Are you sure you want to continue connecting (yes/no)? yes Warning: Permanently added 'github.com,140.82.118.4' (RSA) to the list of known hosts. remote: Enumerating objects: 1822, done. remote: Total 1822 (delta 0), reused 0 (delta 0), pack-reused 1822 Receiving objects: 100% (1822/1822), 6.00 MiB | 3.20 MiB/s, done. Resolving deltas: 100% (970/970), done. Checking connectivity... done. nico@ESPRIMO-P956:~/projects$ #+END_CENTER **** DONE Change ~/projects/P4-NetFPGA/tools/settings.sh for minip4 CLOSED: [2019-07-23 Tue 11:59] #+BEGIN_CENTER #export P4_PROJECT_NAME=switch_calc export P4_PROJECT_NAME=minip4 export NF_PROJECT_NAME=simple_sume_switch export SUME_FOLDER=${HOME}/projects/P4-NetFPGA export SUME_SDNET=${SUME_FOLDER}/contrib-projects/sume-sdnet-switch export P4_PROJECT_DIR=${SUME_SDNET}/projects/${P4_PROJECT_NAME} export LD_LIBRARY_PATH=${SUME_SDNET}/sw/sume:${LD_LIBRARY_PATH} export PROJECTS=${SUME_FOLDER}/projects export DEV_PROJECTS=${SUME_FOLDER}/contrib-projects export IP_FOLDER=${SUME_FOLDER}/lib/hw/std/cores export CONTRIB_IP_FOLDER=${SUME_FOLDER}/lib/hw/contrib/cores export CONSTRAINTS=${SUME_FOLDER}/lib/hw/std/constraints export XILINX_IP_FOLDER=${SUME_FOLDER}/lib/hw/xilinx/cores export NF_DESIGN_DIR=${P4_PROJECT_DIR}/${NF_PROJECT_NAME} export NF_WORK_DIR=/tmp/${USER} export PYTHONPATH=.:${SUME_SDNET}/bin:${SUME_FOLDER}/tools/scripts/:${NF_DESIGN_DIR}/lib/Python:${SUME_FOLDER}/tools/scripts/NFTest export DRIVER_NAME=sume_riffa_v1_0_0 export DRIVER_FOLDER=${SUME_FOLDER}/lib/sw/std/driver/${DRIVER_NAME} export APPS_FOLDER=${SUME_FOLDER}/lib/sw/std/apps/${DRIVER_NAME} export HWTESTLIB_FOLDER=${SUME_FOLDER}/lib/sw/std/hwtestlib #+END_CENTER **** DONE Allow password less sudo CLOSED: [2019-07-23 Tue 11:17] ⚡ root  root cat /etc/sudoers.d/nico nico ALL=(ALL) NOPASSWD: ALL **** DONE Install git CLOSED: [2019-07-23 Tue 11:07] **** Install python-scapy **** DONE Install master thesis repo: git clone git@gitlab.ethz.ch:nicosc/master-thesis.git CLOSED: [2019-07-23 Tue 11:20] **** DONE Setup path sourcing in ~/.bashrc CLOSED: [2019-07-23 Tue 12:05] #+BEGIN_CENTER nico@ESPRIMO-P956:~$ tail -n 2 .bashrc . ~/master-thesis/netpfga/bashinit #+END_CENTER **** DONE Setup bind mount / links / paths for compiling minip4 CLOSED: [2019-07-23 Tue 12:05] nico@ESPRIMO-P956:~/projects/P4-NetFPGA-live/contrib-projects/sume-sdnet-switch/projects$ ln -s ~/master-thesis/netpfga/minip4/nico@ESPRIMO-P956:~/projects/P4-NetFPGA-live/contrib-projects/sume-sdnet-switch/projects$ **** DONE Compile sume library CLOSED: [2019-07-23 Tue 12:07] #+BEGIN_CENTER cd $SUME_FOLDER/lib/hw/xilinx/cores/tcam_v1_1_0/ && make update && make cd $SUME_FOLDER/lib/hw/xilinx/cores/cam_v1_1_0/ && make update && make cd $SUME_SDNET/sw/sume && make cd $SUME_FOLDER && make #+END_CENTER **** DONE Install build deps CLOSED: [2019-07-23 Tue 15:03] #+BEGIN_CENTER sudo apt-get -y install python-matplotlib sudo apt-get -y install python-pip sudo pip install ascii_graph sudo apt-get install -y libc6-dev-i386 sudo apt install -y libc6-dev #+END_CENTER *** DONE 2019-07-23: compiling on ISG computer CLOSED: [2019-07-24 Wed 12:19] **** DONE try1: "souce" files: / missing sumereg CLOSED: [2019-07-23 Tue 12:14] #+BEGIN_CENTER cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg /usr/bin/ld: cannot find -lsumereg collect2: error: ld returned 1 exit status Makefile:52: recipe for target 'libcam' failed make[1]: *** [libcam] Error 1 make[1]: Leaving directory '/home/nico/master-thesis/netpfga/minip4/sw/CLI' ERROR: could not compile libcam souce files #+END_CENTER **** DONE try2: includes missing CLOSED: [2019-07-23 Tue 15:03] #+BEGIN_CENTER /opt/Xilinx/Vivado/2018.2/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/gcc -fPIC -c -Wa,-W -fPIC -m64 -B/opt/Xilinx/Vivado/2018.2/lib/lnx64.o/../../tps/lnx64/gcc-6.2.0/bin/../../binutils-2.26/bin/ -I"/opt/Xilinx/Vivado/2018.2/data/xsim/include" -I"/opt/Xilinx/Vivado/2018.2/data/xsim/systemc" "./Testbench/CAM.c" -O1 -o "/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work/xsc/CAM.lnx64.o" -DXILINX_SIMULATOR In file included from /usr/include/stdio.h:27:0, from ./Testbench/CAM.c:30: /usr/include/features.h:367:25: fatal error: sys/cdefs.h: No such file or directory # include ^ compilation terminated. ERROR: [XSIM 43-3409] Failed to compile generated C file ./Testbench/CAM.c. ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. Exiting... nico@ESPRIMO-P956:~$ nico@nsg-System:~/master-thesis/netpfga/log$ dpkg -S /usr/include/sys/cdefs.h libc6-dev-i386: /usr/include/sys/cdefs.h #+END_CENTER **** try3: missing makefile and axi files - step4 ok - step5, step 6, step7 ok #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis$ ls /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch test make: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test' cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/Makefile': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_stim.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_expected.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/Makefile': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.log': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_expect.axi': No such file or directory cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.axi': No such file or directory NetFPGA environment: Root dir: /home/nico/projects/P4-NetFPGA Project name: simple_sume_switch Project dir: /tmp/nico/test/simple_sume_switch Work dir: /tmp/nico 512 === Work directory is /tmp/nico/test/simple_sume_switch === Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default === Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim'] + date Die Jul 23 13:34:54 CEST 2019 + [ = no ] + cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch + make make: *** No targets specified and no makefile found. Stop. #+END_CENTER *** DONE the config writes madness CLOSED: [2019-07-24 Wed 11:44] - step9 (sume simulation, the longest step) in the process calls "config_writes.py" - config_writes.py fails with a syntax error, as it is incomplete python code - config_writes.py and config_writes.sh are generated by gen_config_writes.py - gen_config_writes.py reads config_writes.txt - config_writes.txt is created in step 5 (sdnet simulation) - step 5 consists of running xsc, xelab and xsim - xsim (re-)generates config_writes.txt according to a watch ls -l on the file: ${XILINX_VIVADO}/bin/xsim --runall SimpleSumeSwitch_tb#work.glbl - it seems (by grep -r) that ./Testbench/SimpleSumeSwitch_tb.sv is responsible for writing config_writes.txt - It seems that the "task" "SV_write_control" inside that file is responsible for writing the content, which in turn uses axi4_lite_master_write_request_control **** More notes for the config writes madness xsc and xelab are described in https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=2&ved=2ahUKEwiGqfiAmcjjAhXEC-wKHW3_C78QFjABegQIBBAC&url=https%3A%2F%2Fwww.xilinx.com%2Fsupport%2Fdocumentation%2Fsw_manuals%2Fxilinx2014_4%2Fug900-vivado-logic-simulation.pdf&usg=AOvVaw1jgWuqcjeph5qOplb4eJMq The xsc compiler helps create a shared library (.a on Windows or .so on Linux) from one or more C files. You use xelab to bind the shared library generated by xsc into the rest of your design. You can create a shared library using a one- or two-step process: - the only file that matches the string "config_writes" in the nf_sume_sdnet_ip/SimpleSumeSwitch subdirectory is ./Testbench/SimpleSumeSwitch_tb.sv - code inside SimpleSumeSwitch_tb.sv: #+BEGIN_CENTER task SV_write_control( input integer addr, input integer data ); int file; file = $fopen("config_writes.txt", "a"); $display("SV_write_control()- start"); $fwrite(file, ": (%h, %h)\n", addr, data); axi4_lite_master_write_request_control(addr,data); $display("SV_write_control()- done"); $fclose(file); endtask #+END_CENTER *** DONE the netpfga madness: Renaming variables breaks the compilation. !!!!!! CLOSED: [2019-07-24 Wed 09:33] #+BEGIN_CENTER @Xilinx_MaxPacketRegion(1024) control TopDeparser( - packet_out b, - in Parsed_packet p, + packet_out packet, + in Parsed_packet hdr, in user_metadata_t user_metadata, inout digest_data_t digest_data, inout sume_metadata_t sume_metadata) { apply { - b.emit(p.ethernet); + packet.emit(hdr.ethernet); } + + } #+END_CENTER *** DONE state names are fixed: needs to be "start" CLOSED: [2019-07-24 Wed 11:44] #+BEGIN_CENTER make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 minip4_solution.p4(37): warning: start: implicit transition to `reject' state start { ^^^^^ minip4_solution.p4(52): warning: realparser: unused instance RealParser() realparser; ^^^^^^^^^^ minip4_solution.p4(45): error: parser TopParser: parser does not have a `start' state parser TopParser( ^^^^^^^^^ minip4_solution.p4(45): warning: accept state in parser TopParser is unreachable parser TopParser( ^^^^^^^^^ Makefile:34: recipe for target 'all' failed make[1]: *** [all] Error 1 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' Makefile:31: recipe for target 'frontend' failed #+END_CENTER *** TODO Further notes P4/master thesis - Cannot easily run P4 on notebook - changes to the system very invasive - Varous compiler bugs/limitations - Very very deep rabbithole problems - Hanging/sleeping issue -- unclear whether it does something or not - Open impl_1 error with unclear reason - logfiles referenced that don't exist Run output will be captured here: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log nico@nsg-System:~/master-thesis/netpfga/log$ ls -alh /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log ls: cannot access '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log': No such file or directory - even "short" compile runs taking 30m+ control_sub_m02_data_fifo_0_synth_1: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ less /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log: No such file or directory - Wrong warnings: using 2018.2, getting warnings about things removed in 2015.3 WARNING: command 'get_user_parameter' will be removed in the 2015.3 release, use 'get_user_parameters' instead - A script/makefile generates a python script that generates a shell script and later then a python script. If there is a mistake in generating the first python script (syntax ok, but content is not correct) then a much later stage of the compile process will fail due to a syntax error in the third generated script. However that syntax error is not fatal in the build process and thus can only be seen with careful analysis of the logfile, which is around 700 KiB or 10k lines per compile process and contains 328 lines matching "error" and "warning". Most of the error and warning messages seem to be non-critical (even if saying they are). Then there are a variety of INFO messages that actually constitute ERROR messages, but are not flagged as such nor do they cause the build process to abort. *** TODO 2019-07-24: setup VM in DCL as third compiler [INSTALL MANUAL] **** TODO install mate for getting xlibraries **** Install sdnet *** DONE 2019-07-24: LIMIT add features to netpfga: LPM tables cannot be 64 CLOSED: [2019-07-24 Wed 13:23] #+BEGIN_CENTER minip4_solution.p4(38): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates out metadata meta, ^^^^ minip4_solution.p4(35) parser RealParser( ^^^^^^^^^^ error: LPM table size should be 2^n - 1 actions_nat64_generic.p4(169): error: could not not map table size size size = 64; ^^^^ error: table match_types are not the same actions_arp.p4(35): error: could not map table key(s) KeyElement hdr.arp.dst_ipv4_addr: lpm; ^^^^^^^^^^^^^^^^^^^^^ error: LPM table size should be 2^n - 1 actions_arp.p4(55): error: could not not map table size size size = 64; ^^^^ Makefile:34: recipe for target 'all' failed make[1]: *** [all] Error 1 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' Makefile:31: recipe for target 'frontend' failed make: *** [frontend] Error 2 nico@nsg-System:~/master-thesis/netpfga/log$ #+END_CENTER *** DONE 2019-07-24: LIMIT table match types are not the same error CLOSED: [2019-07-24 Wed 22:35] - Missing feature in https://cs344-stanford.github.io/documentation/p4c-sdnet-missing-features.pdf - disabling arp for the moment #+BEGIN_CENTER make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 actions_egress.p4(52): warning: Table v6_networks is not used; removing table v6_networks { ^^^^^^^^^^^ actions_egress.p4(69): warning: Table v4_networks is not used; removing table v4_networks { ^^^^^^^^^^^ actions_nat64_generic.p4(174): warning: Table nat46 is not used; removing table nat46 { ^^^^^ minip4_solution.p4(38): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates out metadata meta, ^^^^ minip4_solution.p4(35) parser RealParser( ^^^^^^^^^^ error: table match_types are not the same actions_arp.p4(35): error: could not map table key(s) KeyElement hdr.arp.dst_ipv4_addr: lpm; ^^^^^^^^^^^^^^^^^^^^^ Makefile:34: recipe for target 'all' failed make[1]: *** [all] Error 1 ü #+END_CENTER ARP disabled: #+BEGIN_CENTER table v4_arp { key = { hdr.ethernet.dst_addr: exact; hdr.arp.opcode: exact; hdr.arp.dst_ipv4_addr: lpm; } actions = { controller_debug_table_id; arp_reply; NoAction; } size = ICMP6_TABLE_SIZE; default_action = controller_debug_table_id(TABLE_ARP); } #+END_CENTER *** DONE 2019-07-24: BUG Vivado Simulator kernel has encounted an exception from DPI C function: LPM_VerifyDataset CLOSED: [2019-07-24 Wed 22:41] - maybe LPM problem -> rewrite tables #+BEGIN_CENTER s/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/realmain_lookup_table_0_t.HDL/xpm_memory.sv [SW] LPM_Init() - start [SW] LPM_Init() - done [SW] LPM_LoadDataset() - start [SW] LPM_LoadDataset() failed with error code = 12 FATAL_ERROR: Vivado Simulator kernel has encounted an exception from DPI C function: LPM_VerifyDataset(). Please correct. Time: 2016466 ps Iteration: 0 Process: /SimpleSumeSwitch_tb/LPM_VerifyDataset File: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv *** DONE 2019-07-24: LIMIT table size too small CLOSED: [2019-07-24 Wed 22:44] - raising again - this is a total madness #+BEGIN_CENTER out metadata meta, ^^^^ minip4_solution.p4(35) parser RealParser( ^^^^^^^^^^ actions_nat64_generic.p4(173): error: table size too small for match_type(EM): 63 < 64 size = 63; ^^ actions_nat64_generic.p4(173): error: could not not map table size size size = 63; ^^^^ #+END_CENTER #+END_CENTER *** DONE 2019-07-24: BUG unsupported data plane arguments CLOSED: [2019-07-24 Wed 22:54] #+BEGIN_CENTER actions_egress.p4(89): error: data-plane arguments in default_actions are currently unsupported: realmain_controller_debug_table_id_0 default_action = controller_debug_table_id(TABLE_V4_NETWORKS); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ terminate called after throwing an instance of 'Util::CompilerBug' what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/translate/core/lookupEngine.cpp:137 Compiler Bug: actions_egress.p4(89): unhandled expression realmain_controller_debug_table_id/realmain_controller_debug_table_id_0(5); default_action = controller_debug_table_id(TABLE_V4_NETWORKS); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ #+END_CENTER *** DONE 2019-07-24: BUG unhandled node: (471564) CLOSED: [2019-07-24 Wed 23:34] - Removing the call to " delta_udp_from_v6_to_v4()" fixes the problem. - Calling v4sum() only works - Calling v4sum() and v6sum() works - Calling delta_prepare() that calls v4sum() and v6sum() works - Calling delta_prepare() and delta_udp_from_v6_to_v4() FAILS - Renaming delta_udp_from_v6_to_v4() to stupid() FAILS - Emptying delta_udp_from_v6_to_v4() WORKS #+BEGIN_CENTER minip4_solution.p4(39) parser RealParser( ^^^^^^^^^^ terminate called after throwing an instance of 'Util::CompilerBug' what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/writers/pxWriter.h:20 Compiler Bug: unhandled node: (471564) Makefile:34: recipe for target 'all' failed make[1]: *** [all] Error 134 make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' Makefile:31: recipe for target 'frontend' failed #+END_CENTER Commenting out 2 ifs (not nested) makes it compile again: #+BEGIN_CENTER // if(hdr.udp.isValid()) { // #ifdef USE_NICO_DELTA_CHECKSUM // delta_udp_from_v6_to_v4(); // #else // meta.chk_udp_v4 = 1; // #endif // } // if(hdr.tcp.isValid()) { // #ifdef USE_NICO_DELTA_CHECKSUM // delta_tcp_from_v6_to_v4(); // #else // meta.chk_tcp_v4 = 1; // #endif // } #+END_CENTER Only enabling the following triggers the bug again: #+BEGIN_CENTER if(hdr.udp.isValid()) { #ifdef USE_NICO_DELTA_CHECKSUM delta_udp_from_v6_to_v4(); #else meta.chk_udp_v4 = 1; #endif } #+END_CENTER Even this code is enough: #+BEGIN_CENTER if(hdr.udp.isValid()) { delta_udp_from_v6_to_v4(); } #+END_CENTER This apply block still triggers the bug: #+BEGIN_CENTER apply { if(hdr.ipv6.isValid()) { if(nat64.apply().hit) { /* generic / static nat64 done */ // if(hdr.icmp6.isValid()) { // nat64_icmp6_generic(); // // if(hdr.icmp6.type == ICMP6_ECHO_REPLY) { // // hdr.icmp.type = ICMP_ECHO_REPLY; // // hdr.icmp.code = 0; // // } // // if(hdr.icmp6.type == ICMP6_ECHO_REQUEST) { // // hdr.icmp.type = ICMP_ECHO_REQUEST; // // hdr.icmp.code = 0; // // } // } if(hdr.udp.isValid()) { delta_udp_from_v6_to_v4(); } // if(hdr.tcp.isValid()) { // #ifdef USE_NICO_DELTA_CHECKSUM // delta_tcp_from_v6_to_v4(); // #else // meta.chk_tcp_v4 = 1; // #endif // } v4_networks.apply(); /* apply egress for IPv4 */ exit; /* no further v6 processing */ } } lookup_table.apply(); } } #+END_CENTER This works: #+BEGIN_CENTER if(hdr.udp.isValid()) { v4sum(); v6sum(); // delta_udp_from_v6_to_v4(); } #+END_CENTER This works: #+BEGIN_CENTER if(hdr.udp.isValid()) { // v4sum(); // v6sum(); delta_prepare(); // delta_udp_from_v6_to_v4(); } #+END_CENTER This does not work: #+BEGIN_CENTER if(hdr.udp.isValid()) { delta_prepare(); delta_udp_from_v6_to_v4(); } #+END_CENTER Also fails: #+BEGIN_CENTER if(hdr.udp.isValid()) { //delta_prepare(); //delta_udp_from_v6_to_v4(); stupid(); } #+END_CENTER Works: #+BEGIN_CENTER action delta_udp_from_v6_to_v4() {} #+END_CENTER Works also: #+BEGIN_CENTER action delta_udp_from_v6_to_v4() { delta_prepare(); bit<17> tmp = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; // if (tmp[16:16] == 1) { // tmp = tmp + 1; // tmp[16:16] = 0; // } // tmp = tmp + (bit<17>) (0xffff - meta.v6sum); // if (tmp[16:16] == 1) { // tmp = tmp + 1; // tmp[16:16] = 0; // } hdr.udp.checksum = (bit<16>) tmp; } #+END_CENTER Fails: #+BEGIN_CENTER action delta_udp_from_v6_to_v4() { delta_prepare(); bit<17> tmp = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp[16:16] == 1) { tmp = tmp + 1; tmp[16:16] = 0; } // tmp = tmp + (bit<17>) (0xffff - meta.v6sum); // if (tmp[16:16] == 1) { // tmp = tmp + 1; // tmp[16:16] = 0; // } hdr.udp.checksum = (bit<16>) tmp; } #+END_CENTER *** DONE 2019-07-25: BUG overwrite: calling v4_networks.apply(); twice is impossible in different branches CLOSED: [2019-07-27 Sat 14:48] #+BEGIN_CENTER make -C src/ make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 minip4_solution.p4(19): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates out metadata meta, ^^^^ minip4_solution.p4(16) parser RealParser( ^^^^^^^^^^ terminate called after throwing an instance of 'Util::CompilerBug' what(): In file: /wrk/hdscratch/staff/mohan/p4c_sdnet/build/p4c/extensions/sdnet/translate/core/tupleEngine.cpp:324 Compiler Bug: overwrite Makefile:34: recipe for target 'all' failed #+END_CENTER *** DONE 2019-07-25: LIMIT: cannot use actions with arguments as default parameters CLOSED: [2019-07-27 Sat 14:48] *** DONE 2019-07-27: loading driver, checking interfaces: interfaces are not there CLOSED: [2019-07-27 Sat 14:53] #+BEGIN_CENTER + sudo modprobe -r sume_riffa modprobe: FATAL: Module sume_riffa not found. + true + make clean make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 clean make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/.tmp_versions CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/Module.symvers make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + make all make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CC [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.o Building modules, stage 2. MODPOST 1 modules CC /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.mod.o LD [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.ko make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + sudo make install make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' install -o root -g root -m 0755 -d /lib/modules/4.15.0-55-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/4.15.0-55-generic/extra/sume_riffa/ depmod -a 4.15.0-55-generic + sudo modprobe sume_riffa + lsmod + grep sume_riffa sume_riffa 28672 0 nico@nsg-System:~/master-thesis/netpfga$ #+END_CENTER *** DONE 2019-07-27: reflash the card: ok CLOSED: [2019-07-27 Sat 14:54] *** DONE 2019-07-27: check interfaces after (re-)reboot: ok! CLOSED: [2019-07-27 Sat 14:57] #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga$ ./bind-mount.sh + rm -f /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src + rm -f /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 rm: cannot remove '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4': Is a directory + mkdir -p /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/ + sudo mount --bind /home/nico/master-thesis/netpfga/minip4/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/ + mkdir -p /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src + sudo mount --bind /home/nico/master-thesis/p4src/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src nico@nsg-System:~/master-thesis/netpfga$ ./build-load-drivers.sh + cd /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 + sudo modprobe -r sume_riffa + make clean make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 clean make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/.tmp_versions CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/Module.symvers make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + make all make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CC [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.o Building modules, stage 2. MODPOST 1 modules CC /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.mod.o LD [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.ko make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + sudo make install make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' install -o root -g root -m 0755 -d /lib/modules/4.15.0-55-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/4.15.0-55-generic/extra/sume_riffa/ depmod -a 4.15.0-55-generic + sudo modprobe sume_riffa + lsmod + grep sume_riffa sume_riffa 28672 0 nico@nsg-System:~/master-thesis/netpfga$ 6: nf0: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff 7: nf1: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff 8: nf2: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 9: nf3: mtu 1500 qdisc noop state DOWN group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff nico@nsg-System:~/master-thesis/netpfga$ #+END_CENTER *** 2019-07-27 *** TODO 2019-07-27: test output ports / connection to 2nd computer / dst_addr / exact - action: TopPipe.realmain.set_egress_port - IPv6 address: 42540766411362381960998550477184434178 - Table: realmain_v6_networks_0 #+BEGIN_CENTER >>> int(ipaddress.IPv6Address("2001:db8:42::2")) 42540766411362381960998550477184434178 >> table_cam_add_entry v6_networks set_egress_port 42540766411362381960998550477184434178 => 1 ERROR: v6_networks is not a recognized CAM table name >> table_cam_add_entry realmain_v6_networks set_egress_port 42540766411362381960998550477184434178 => 1 ERROR: realmain_v6_networks is not a recognized CAM table name >> table_cam_add_entry realmain_v6_networks_0 set_egress_port 42540766411362381960998550477184434178 => 1 ERROR: TopPipe.set_egress_port is not a recognized action for table realmain_v6_networks_0 >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 1 ERROR: not enough fields provided to complete _hexify() #+END_CENTER *** TODO 2019-07-27: find out where the _hexify() error comes from - no raise() in the code -> just sys.exit... - using table_tcam_write_entry - 6 arguments are parsed: (table_name, address, keys, masks, action_name, action_data) = parse_table_tcam_add_entry(line) p4_tables_api.table_tcam_write_entry(table_name, address, keys, masks, action_name, action_data) - arguments passed: 4 realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 1 #+BEGIN_CENTER nico@nsg-System:~$ grep -r "not enough fields provided to complete _hexify()" -r ~/ /home/nico/P4-NetFPGA-live-clean/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py: print >> sys.stderr, "ERROR: not enough fields provided to complete _hexify()" Binary file /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.pyc matches /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py: print >> sys.stderr, "ERROR: not enough fields provided to complete _hexify()" def _hexify(self, field_vals, fields): field_sizes = [size for name, size in fields if ('padding' not in name and 'hit' not in name)] if (len(field_vals) != len(field_sizes)): print >> sys.stderr, "ERROR: not enough fields provided to complete _hexify()" sys.exit(1) # convert field_vals to int field_vals = map(convert_to_int, field_vals) # combine field_vals using field sizes ret = 0 for val, bits in zip(field_vals, field_sizes): mask = 2**bits -1 ret = (ret << bits) + (val & mask) return ret nico@nsg-System:~$ find ~/ -name p4_tables_api\* /home/nico/P4-NetFPGA-live-clean/contrib-projects/sume-sdnet-switch/templates/CLI_template/p4_tables_api.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/switch_calc/sw/CLI/p4_tables_api.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI/p4_tables_api.pyc /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI/p4_tables_api.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/int/sw/CLI/p4_tables_api.py /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/CLI_template/p4_tables_api.py /home/nico/master-thesis/netpfga/minip4/sw/CLI/p4_tables_api.pyc /home/nico/master-thesis/netpfga/minip4/sw/CLI/p4_tables_api.py nico@nsg-System:~$ ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py: def hexify_value(self, action_name, action_data): >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 1 dbg: realmain_v6_networks_0 ['42540766411362381960998550477184434178'] realmain.set_egress_port ['1'] key value fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1'] ERROR: not enough fields provided to complete _hexify() nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 1 1 0 0 0 dbg: realmain_v6_networks_0 ['42540766411362381960998550477184434178'] realmain.set_egress_port ['1', '1', '0', '0', '0'] key value fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '1', '0', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020350 = 0x0002 WROTE 0x44020354 = 0x0000 WROTE 0x44020358 = 0x420000 WROTE 0x4402035c = 0x20010db8 WROTE 0x44020380 = 0x0000 WROTE 0x44020384 = 0x0000 WROTE 0x44020388 = 0x1010000 WROTE 0x4402038c = 0x0001 READ 0x44020344 = 0x0001 WROTE 0x44020340 = 0x0001 READ 0x44020344 = 0x0001 READ 0x44020344 = 0x0001 success >> #+END_CENTER *** DONE 2019-07-27: adding neighboar entry CLOSED: [2019-07-27 Sat 21:17] #+BEGIN_CENTER nico@ESPRIMO-P956:~$ sudo ip -6 neighbor add 2001:db8:42::3 lladdr 02:53:55:4d:45:00 dev enp2s0f1 nico@ESPRIMO-P956:~$ ip -6 neigh list fe80::66a0:e7ff:fe42:2ec1 dev enp0s31f6 lladdr 64:a0:e7:42:2e:c1 router REACHABLE 2001:db8:42::3 dev enp2s0f1 lladdr 02:53:55:4d:45:00 PERMANENT fe80::faf2:1eff:fe41:449d dev enp2s0f1 lladdr f8:f2:1e:41:44:9d STALE 2001:db8:42::2 dev enp2s0f1 FAILED 2001:db8:42::43 dev enp2s0f1 lladdr f8:f2:1e:41:44:9d STALE 2001:67c:10ec:2a49:8000::1 dev enp0s31f6 lladdr 64:a0:e7:42:2e:c1 router STALE nico@ESPRIMO-P956:~$ #+END_CENTER *** TODO 2019-07-27: also write output port for ::3 #+BEGIN_CENTER >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434179 => 1 1 0 0 0 dbg: realmain_v6_networks_0 ['42540766411362381960998550477184434179'] realmain.set_egress_port ['1', '1', '0', '0', '0'] key value fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '1', '0', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020350 = 0x0003 WROTE 0x44020354 = 0x0000 WROTE 0x44020358 = 0x420000 WROTE 0x4402035c = 0x20010db8 WROTE 0x44020380 = 0x0000 WROTE 0x44020384 = 0x0000 WROTE 0x44020388 = 0x1010000 WROTE 0x4402038c = 0x0001 READ 0x44020344 = 0x0001 WROTE 0x44020340 = 0x0001 READ 0x44020344 = 0x0001 READ 0x44020344 = 0x0001 success >> #+END_CENTER *** DONE 2019-07-27: deleting table entry does not work due to another bug in the code CLOSED: [2019-07-27 Sat 21:28] #+BEGIN_CENTER >> table_cam_delete_entry realmain_v6_networks_0 42540766411362381960998550477184434179 ERROR: failed to convert 42540766411362381960998550477184434179 of type to an integer nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ ./projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py: print >> sys.stderr, "ERROR: failed to convert {} of type {} to an integer".format(val, type(val)) except ValueError as e: print >> sys.stderr, "ERROR: failed to convert {} of type {} to an integer".format(val, type(val)) #+END_CENTER *** DONE 2019-07-27: fix broken python code for deleting table entry: p4_px_tables.py on nsg CLOSED: [2019-07-27 Sat 21:28] *** TODO 2019-07-27: find out, why more parameters are required for table_cam_add_entry *** TODO 2019-07-27: receiving any packet from the card #+BEGIN_CENTER nico@ESPRIMO-P956:~$ sudo ip l s enp2s0f0 up nico@ESPRIMO-P956:~$ sudo ip l s enp2s0f1 up 12: enp2s0f0: mtu 1500 qdisc mq state UP group default qlen 1000 link/ether f8:f2:1e:09:62:d0 brd ff:ff:ff:ff:ff:ff 13: enp2s0f1: mtu 1500 qdisc mq state UP group default qlen 1000 link/ether f8:f2:1e:09:62:d1 brd ff:ff:ff:ff:ff:ff inet6 2001:db8:42::42/64 scope global valid_lft forever preferred_lft forever inet6 fe80::faf2:1eff:fe09:62d1/64 scope link valid_lft forever preferred_lft forever nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ ./P4_SWITCH_CLI.py loading libsume.. loading libsume.. loading libcam.. The SimpleSumeSwitch interactive command line tool type help to see all commands >> help Documented commands (type help ): ======================================== help table_cam_delete_entry table_tcam_add_entry list_cam_tables table_cam_get_size table_tcam_clean list_lpm_tables table_cam_read_entry table_tcam_erase_entry list_regs table_lpm_get_addr_size table_tcam_get_addr_size list_tcam_tables table_lpm_load_dataset table_tcam_set_log_level reg_read table_lpm_set_active_lookup_bank table_tcam_verify_entry reg_write table_lpm_set_log_level table_cam_add_entry table_lpm_verify_dataset Undocumented commands: ====================== EOF >> >> help table_cam_add_entry table_cam_add_entry => DESCRIPTION: Add an entry to the specified table PARAMS: : name of the table to add an entry to : name of the action to use in the entry (must be listed in the table's actions list) : space separated list of keys to use as the entry key (must correspond to table's keys in the order defined in the P4 program) : space separated list of values to provide as input to the action #+END_CENTER *** TODO 2019-07-27: try adding table entries / running ipv6/ipv4 nat code #+BEGIN_CENTER nico@nsg-System:~/master-thesis$ ls u'type': u'bits'}], u'response_fields': [{u'px_name': u'hit', u'size': 1, u'type': u'bits'}, {u'px_name': u'action_run', u'size': 3, u'type': u'bits'}, {u'fields': [{u'px_name': u'v6_src', u'size': 128, u'type': u'bits'}, {u'px_name': u'v4_dst', u'size': 32, u'type': u'bits'}, {u'px_name': u'nat64_prefix', u'size': 128, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.nat64_static', u'px_name': u'realmain_nat64_static', u'type': u'struct'}, {u'fields': [{u'px_name': u'table_id', u'size': 16, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.controller_debug_table_id', u'px_name': u'realmain_controller_debug_table_id_5', u'type': u'struct'}]} ---------------- realmain_nat46_0 : ---------------- {u'action_ids': {u'.NoAction': 4, u'TopPipe.realmain.controller_debug': 1, u'TopPipe.realmain.controller_debug_table_id': 3, u'TopPipe.realmain.nat46_static': 2}, u'annotations': {u'Xilinx_ExternallyConnected': [u'0'], u'Xilinx_LookupEngineType': [u'EM'], u'name': [u'TopPipe.realmain.nat46']}, u'match_type': u'EM', u'p4_name': u'realmain_nat46_0', u'px_class': u'LookupEngine', u'px_name': u'realmain_nat46_0', u'px_type_name': u'realmain_nat46_0_t', u'request_fields': [{u'p4_name': u'hdr.ipv4.dst_addr', u'px_name': u'lookup_request_key_3', u'size': 32, u'type': u'bits'}], u'response_fields': [{u'px_name': u'hit', u'size': 1, u'type': u'bits'}, {u'px_name': u'action_run', u'size': 3, u'type': u'bits'}, {u'fields': [{u'px_name': u'v6_src', u'size': 128, u'type': u'bits'}, {u'px_name': u'v4_dst', u'size': 32, u'type': u'bits'}, {u'px_name': u'nat64_prefix', u'size': 128, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.nat46_static', u'px_name': u'realmain_nat46_static', u'type': u'struct'}, {u'fields': [{u'px_name': u'table_id', u'size': 16, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.controller_debug_table_id', u'px_name': u'realmain_controller_debug_table_id_6', u'type': u'struct'}]} >> #+END_CENTER *** DONE 2019-07-27: loading CLI cannot find correct json file -> bind mount missing CLOSED: [2019-07-27 Sat 19:04] #+BEGIN_CENTER nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ ./P4_SWITCH_CLI.py loading libsume.. loading libsume.. Traceback (most recent call last): File "./P4_SWITCH_CLI.py", line 36, in import p4_regs_api, p4_tables_api File "/home/nico/master-thesis/netpfga/minip4/sw/CLI/p4_regs_api.py", line 71, in P4_EXTERNS = read_extern_defines() File "/home/nico/master-thesis/netpfga/minip4/sw/CLI/p4_regs_api.py", line 55, in read_extern_defines with open(EXTERN_DEFINES_FILE) as f: IOError: [Errno 2] No such file or directory: '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI/SimpleSumeSwitch_extern_defines.json' nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ #+END_CENTER *** DONE 2019-07-28: setting ipv6 neighbor entries CLOSED: [2019-07-28 Sun 13:07] #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis$ ./netpfga/set_ipv6_neighbour.sh + seq 1 8 + sudo ip -6 neighbor add 2001:db8:42::1 lladdr 02:53:55:4d:45:01 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::2 lladdr 02:53:55:4d:45:02 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::3 lladdr 02:53:55:4d:45:03 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::4 lladdr 02:53:55:4d:45:04 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::5 lladdr 02:53:55:4d:45:05 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::6 lladdr 02:53:55:4d:45:06 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::7 lladdr 02:53:55:4d:45:07 dev enp2s0f1 + sudo ip -6 neighbor add 2001:db8:42::8 lladdr 02:53:55:4d:45:08 dev enp2s0f1 nico@ESPRIMO-P956:~/master-thesis$ #+END_CENTER *** DONE 2019-07-28: setting all table entries for port 1..8: done CLOSED: [2019-07-28 Sun 12:06] #+BEGIN_CENTER table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434177 => 1 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 2 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434179 => 3 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434180 => 4 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434181 => 5 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434182 => 6 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434183 => 7 0 0 0 0 table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434184 => 8 0 0 0 0 #+END_CENTER Output of the last one: #+BEGIN_CENTER fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '8', '0', '0', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020350 = 0x0008 WROTE 0x44020354 = 0x0000 WROTE 0x44020358 = 0x420000 WROTE 0x4402035c = 0x20010db8 WROTE 0x44020380 = 0x0000 WROTE 0x44020384 = 0x0000 WROTE 0x44020388 = 0x8000000 WROTE 0x4402038c = 0x0001 READ 0x44020344 = 0x0001 WROTE 0x44020340 = 0x0001 READ 0x44020344 = 0x0001 READ 0x44020344 = 0x0001 success #+END_CENTER *** DONE 2019-07-28: ping6 test for getting packet: failure CLOSED: [2019-07-28 Sun 12:43] *** DONE 2019-07-28: !!!!!!! NETPFGA PORT MAPPINGS CLOSED: [2019-07-29 Mon 18:35] nf_port_map = { "nf0":0b00000001, "nf1":0b00000100, "nf2":0b00010000, "nf3":0b01000000, "dma0":0b00000010 } - esprimo either nf0 & nf1 - or esprimo nf2 & nf3 | port 0 | 0b00000001 | 1 | eth1@ nsg ?! likely: esprimo enp2s0f0 | | | port 1 | 0b00000100 | 4 | likely: esprimo enp2s0f1 | | | port 2 | 0b00010000 | 16 | not connected likely | | | port 3 | 0b01000000 | 64 | eth1 @ nsg | PROBALY NOT, probably 1! | | | | | | | *** DONE 2019-07-28: testing with port = 64 (first or last in theory): LAST! WORKS! CLOSED: [2019-07-28 Sun 13:19] #+BEGIN_CENTER >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434276 => 1 64 64 0 0 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '64', '64', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020150 = 0x0064 WROTE 0x44020154 = 0x0000 WROTE 0x44020158 = 0x420000 WROTE 0x4402015c = 0x20010db8 WROTE 0x44020180 = 0x0000 WROTE 0x44020184 = 0x0040 WROTE 0x44020188 = 0x1400000 WROTE 0x4402018c = 0x0001 READ 0x44020144 = 0x0001 WROTE 0x44020140 = 0x0001 READ 0x44020144 = 0x0001 READ 0x44020144 = 0x0001 success #+END_CENTER *** DONE 2019-07-28: and another bug in the table code: invalid literal for int() with base 0: CLOSED: [2019-07-29 Mon 18:35] #+BEGIN_CENTER >> table_cam_delete_entry realmain_v6_networks_0 42540766411362381960998550477184434180 ERROR: failed to convert of type to an integer: invalid literal for int() with base 0: '' nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$ #+END_CENTER *** DONE 2019-07-28: try pinging nsg <-> esprimo: reply is being created, not received CLOSED: [2019-07-28 Sun 13:32] - reply seems to come back, too => wrong out port? #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis/netpfga$ sudo ip -6 neighbor add 2001:db8:42::64 lladdr f8:f2:1e:41:44:9c dev enp2s0f1 ⚡ root  root ip -6 neighbor add 2001:db8:42::42 lladdr f8:f2:1e:09:62:d1 dev eth1 13:27:21.387690 IP6 2001:db8:42::42 > 2001:db8:42::64: ICMP6, echo request, seq 1, length 64 13:27:21.387721 IP6 2001:db8:42::64 > 2001:db8:42::42: ICMP6, echo reply, seq 1, length 64 13:27:21.387741 IP6 2001:db8:42::64 > 2001:db8:42::42: ICMP6, echo reply, seq 1, length 64 13:27:22.404759 IP6 2001:db8:42::42 > 2001:db8:42::64: ICMP6, echo request, seq 2, length 64 13:27:22.404788 IP6 2001:db8:42::64 > 2001:db8:42::42: ICMP6, echo reply, seq 2, length 64 13:27:22.404807 IP6 2001:db8:42::64 > 2001:db8:42::42: ICMP6, echo reply, seq 2, length 64 #+END_CENTER *** DONE 2019-07-28: try setting correct out port for 42: seems all go to port3 (or 1?) CLOSED: [2019-07-28 Sun 15:17] - solution: lookup table still in place!!!! #+BEGIN_CENTER >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434242 => 4 4 4 0 0 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '4', '4', '4', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020150 = 0x0042 WROTE 0x44020154 = 0x0000 WROTE 0x44020158 = 0x420000 WROTE 0x4402015c = 0x20010db8 WROTE 0x44020180 = 0x0000 WROTE 0x44020184 = 0x0004 WROTE 0x44020188 = 0x4040000 WROTE 0x4402018c = 0x0001 READ 0x44020144 = 0x0001 WROTE 0x44020140 = 0x0001 READ 0x44020144 = 0x0001 READ 0x44020144 = 0x0001 success >> #+END_CENTER Rewriting/adding: #+BEGIN_CENTER >> table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434242 => 4 4 4 4 4 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '4', '4', '4', '4', '4'] CAM_Init_ValidateContext() - done WROTE 0x44020150 = 0x0042 WROTE 0x44020154 = 0x0000 WROTE 0x44020158 = 0x420000 WROTE 0x4402015c = 0x20010db8 WROTE 0x44020180 = 0x40004 WROTE 0x44020184 = 0x0004 WROTE 0x44020188 = 0x4040000 WROTE 0x4402018c = 0x0001 READ 0x44020144 = 0x0001 WROTE 0x44020140 = 0x0001 READ 0x44020144 = 0x0001 READ 0x44020144 = 0x0001 success >> #+END_CENTER *** DONE 2019-07-28: test with 6.8: very bare / only v4/v6 egress CLOSED: [2019-07-29 Mon 18:35] - Expected: 1 -> nsg, 16 -> enp2s0f0, 64 -> enp2s0f1 - Actual@ no packet seen #+BEGIN_CENTER nico@ESPRIMO-P956:~$ sudo tcpdump -lni enp2s0f1 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on enp2s0f1, link-type EN10MB (Ethernet), capture size 262144 bytes 15:19:36.015934 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 1, length 64 15:20:11.989340 IP6 2001:db8:42::42 > 2001:db8:42::4: ICMP6, echo request, seq 1, length 64 15:20:25.279826 IP6 2001:db8:42::42 > 2001:db8:42::16: ICMP6, echo request, seq 1, length 64 15:20:48.624911 IP6 2001:db8:42::42 > 2001:db8:42::64: ICMP6, echo request, seq 1, length 64 ^C 4 packets captured 4 packets received by filter 0 packets dropped by kernel nico@ESPRIMO-P956:~$ #+END_CENTER *** DONE 2019-07-28: test ipv4 with 6.8 CLOSED: [2019-07-29 Mon 18:35] #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis/netpfga$ sudo ip neigh del 10.0.0.1 dev enp2s0f0 nico@ESPRIMO-P956:~/master-thesis/netpfga$ sudo ip neigh add 10.0.0.1 dev enp2s0f0 lladdr f8:f2:1e:41:44:9c nico@ESPRIMO-P956:~/master-thesis/netpfga$ >> table_cam_delete_entry realmain_v4_networks_0 167772161 #+END_CENTER #+BEGIN_CENTER >> table_cam_delete_entry realmain_v4_networks_0 167772161 CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xa000001 READ 0x44020044 = 0x0001 WROTE 0x44020040 = 0x0002 READ 0x44020044 = 0x0001 READ 0x44020044 = 0x0001 success >> table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '1', '1', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xa000001 WROTE 0x44020080 = 0x0000 WROTE 0x44020084 = 0x0001 WROTE 0x44020088 = 0x1010000 WROTE 0x4402008c = 0x0001 READ 0x44020044 = 0x0001 WROTE 0x44020040 = 0x0001 READ 0x44020044 = 0x0001 READ 0x44020044 = 0x0001 success >> >> table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 10.0.0.1 => 1 1 1 0 0 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '1', '1', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0xa000001 WROTE 0x44020080 = 0x0000 WROTE 0x44020084 = 0x0001 WROTE 0x44020088 = 0x1010000 WROTE 0x4402008c = 0x0001 READ 0x44020044 = 0x0001 WROTE 0x44020040 = 0x0001 READ 0x44020044 = 0x0001 READ 0x44020044 = 0x0001 success #+END_CENTER *** DONE 2019-07-28: trying all ports with ipv4: no result from nmap -sP 10.0.0.1 CLOSED: [2019-07-28 Sun 19:01] #+BEGIN_CENTER [16:26] line:bin% python3 gen_v4_table_test_entries.py table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772162 => 1 2 2 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772163 => 1 3 3 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772164 => 1 4 4 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772165 => 1 5 5 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772166 => 1 6 6 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772167 => 1 7 7 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772168 => 1 8 8 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772169 => 1 9 9 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772170 => 1 10 10 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772171 => 1 11 11 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772172 => 1 12 12 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772173 => 1 13 13 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772174 => 1 14 14 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772175 => 1 15 15 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772176 => 1 16 16 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772177 => 1 17 17 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772178 => 1 18 18 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772179 => 1 19 19 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772180 => 1 20 20 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772181 => 1 21 21 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772182 => 1 22 22 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772183 => 1 23 23 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772184 => 1 24 24 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772185 => 1 25 25 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772186 => 1 26 26 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772187 => 1 27 27 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772188 => 1 28 28 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772189 => 1 29 29 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772190 => 1 30 30 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772191 => 1 31 31 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772192 => 1 32 32 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772193 => 1 33 33 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772194 => 1 34 34 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772195 => 1 35 35 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772196 => 1 36 36 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772197 => 1 37 37 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772198 => 1 38 38 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772199 => 1 39 39 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772200 => 1 40 40 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772201 => 1 41 41 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772202 => 1 42 42 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772203 => 1 43 43 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772204 => 1 44 44 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772205 => 1 45 45 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772206 => 1 46 46 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772207 => 1 47 47 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772208 => 1 48 48 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772209 => 1 49 49 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772210 => 1 50 50 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772211 => 1 51 51 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772212 => 1 52 52 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772213 => 1 53 53 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772214 => 1 54 54 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772215 => 1 55 55 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772216 => 1 56 56 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772217 => 1 57 57 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772218 => 1 58 58 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772219 => 1 59 59 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772220 => 1 60 60 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772221 => 1 61 61 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772222 => 1 62 62 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772223 => 1 63 63 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772224 => 1 64 64 0 0 #+END_CENTER adding ip again: #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis/pcap$ sudo ip addr add 10.0.0.200/24 dev enp2s0f0 #+END_CENTER Using #+BEGIN_CENTER table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772162 => 2 2 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772163 => 3 3 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772164 => 4 4 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772165 => 5 5 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772166 => 6 6 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772167 => 7 7 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772168 => 8 8 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772169 => 9 9 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772170 => 10 10 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772171 => 11 11 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772172 => 12 12 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772173 => 13 13 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772174 => 14 14 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772175 => 15 15 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772176 => 16 16 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772177 => 17 17 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772178 => 18 18 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772179 => 19 19 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772180 => 20 20 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772181 => 21 21 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772182 => 22 22 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772183 => 23 23 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772184 => 24 24 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772185 => 25 25 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772186 => 26 26 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772187 => 27 27 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772188 => 28 28 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772189 => 29 29 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772190 => 30 30 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772191 => 31 31 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772192 => 32 32 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772193 => 33 33 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772194 => 34 34 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772195 => 35 35 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772196 => 36 36 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772197 => 37 37 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772198 => 38 38 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772199 => 39 39 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772200 => 40 40 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772201 => 41 41 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772202 => 42 42 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772203 => 43 43 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772204 => 44 44 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772205 => 45 45 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772206 => 46 46 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772207 => 47 47 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772208 => 48 48 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772209 => 49 49 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772210 => 50 50 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772211 => 51 51 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772212 => 52 52 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772213 => 53 53 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772214 => 54 54 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772215 => 55 55 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772216 => 56 56 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772217 => 57 57 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772218 => 58 58 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772219 => 59 59 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772220 => 60 60 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772221 => 61 61 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772222 => 62 62 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772223 => 63 63 0 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772224 => 64 64 0 0 0 #+END_CENTER also does not work/add packets *** DONE 2019-07-28: Bit / byte order issues? -> not reacting CLOSED: [2019-07-28 Sun 19:01] #+BEGIN_CENTER >> table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 16777226 => 1 1 1 0 0 fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)] action_name = TopPipe.realmain.set_egress_port field_vals = [1, '1', '1', '1', '0', '0'] CAM_Init_ValidateContext() - done WROTE 0x44020050 = 0x100000a WROTE 0x44020080 = 0x0000 WROTE 0x44020084 = 0x0001 WROTE 0x44020088 = 0x1010000 WROTE 0x4402008c = 0x0001 READ 0x44020044 = 0x0001 WROTE 0x44020040 = 0x0001 READ 0x44020044 = 0x0001 READ 0x44020044 = 0x0001 success >> #+END_CENTER *** DONE 2019-07-28: reprogramming fpga fails CLOSED: [2019-07-28 Sun 16:30] #+BEGIN_CENTER INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 11MB 1.7MB/s 00:07 fpga configuration failed. DONE PIN is not HIGH invoked from within "::tcf::eval -progress ::xsdb::print_progress {::tcf::cache_enter tcfchan#0 {tcf_cache_eval {process_tcf_actions_cache_client ::tcfclient#0::arg}}}" (procedure "::tcf::cache_eval_with_progress" line 2) invoked from within "::tcf::cache_eval_with_progress [dict get $arg chan] [list process_tcf_actions_cache_client $argvar] $progress" (procedure "process_tcf_actions" line 1) invoked from within "process_tcf_actions $arg ::xsdb::print_progress" (procedure "fpga" line 430) invoked from within "fpga -f $bitimage" (file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl" line 33) + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Completed rescan PCIe information ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles$ #+END_CENTER After 2nd #+BEGIN_CENTER + xsct /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/run_xsct.tcl -tclargs minip4.bit rlwrap: warning: your $TERM is 'screen' but rlwrap couldn't find it in the terminfo database. Expect some problems. RUN loading image file. minip4.bit attempting to launch hw_server ****** Xilinx hw_server v2018.2 **** Build date : Jun 14 2018-20:18:37 ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 100% 11MB 1.7MB/s 00:06 + bash /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/tools/pci_rescan_run.sh Completed rescan PCIe information ! + rmmod sume_riffa rmmod: ERROR: Module sume_riffa is not currently loaded + modprobe sume_riffa + ifconfig nf0 up nf0: ERROR while getting interface flags: No such device + ifconfig nf1 up nf1: ERROR while getting interface flags: No such device + ifconfig nf2 up nf2: ERROR while getting interface flags: No such device + ifconfig nf3 up nf3: ERROR while getting interface flags: No such device + bash config_writes.sh nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles$ #+END_CENTER *** DONE 2019-07-28: nf* interfaces gone: rebooting, reload module helps CLOSED: [2019-07-28 Sun 16:31] #+BEGIN_CENTER make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' install -o root -g root -m 0755 -d /lib/modules/4.15.0-55-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/4.15.0-55-generic/extra/sume_riffa/ depmod -a 4.15.0-55-generic + sudo modprobe sume_riffa + + grep sume_riffa lsmod sume_riffa 28672 0 nico@nsg-System:~$ ip l 1: lo: mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 2: eth0: mtu 1500 qdisc pfifo_fast state UP mode DEFAULT group default qlen 1000 link/ether 74:d0:2b:98:38:f6 brd ff:ff:ff:ff:ff:ff 3: eth1: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether f8:f2:1e:41:44:9c brd ff:ff:ff:ff:ff:ff 4: eth2: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether f8:f2:1e:41:44:9d brd ff:ff:ff:ff:ff:ff 5: wg0: mtu 1420 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/none 6: nf0: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff 7: nf1: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff 8: nf2: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 9: nf3: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff nico@nsg-System:~$ #+END_CENTER *** DONE 2019-07-28: compile time around 2.5h CLOSED: [2019-07-28 Sun 19:37] *** DONE 2019-07-28: direct loading works / no 2nd reboot necessary CLOSED: [2019-07-28 Sun 19:50] #+BEGIN_CENTER nico@nsg-System:~/master-thesis$ ./bin/build-load-drivers.sh + cd /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 + sudo modprobe -r sume_riffa + make clean make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 clean make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/.tmp_versions CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/Module.symvers make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + make all make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' CC [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.o Building modules, stage 2. MODPOST 1 modules CC /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.mod.o LD [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.ko make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' + sudo make install make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic' Building modules, stage 2. MODPOST 1 modules make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic' install -o root -g root -m 0755 -d /lib/modules/4.15.0-55-generic/extra/sume_riffa/ install -o root -g root -m 0755 sume_riffa.ko /lib/modules/4.15.0-55-generic/extra/sume_riffa/ depmod -a 4.15.0-55-generic + sudo modprobe sume_riffa + lsmod + grep sume_riffa sume_riffa 28672 0 nico@nsg-System:~/master-thesis$ ip l 1: lo: mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 2: eth0: mtu 1500 qdisc pfifo_fast state UP mode DEFAULT group default qlen 1000 link/ether 74:d0:2b:98:38:f6 brd ff:ff:ff:ff:ff:ff 3: eth1: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether f8:f2:1e:41:44:9c brd ff:ff:ff:ff:ff:ff 4: eth2: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether f8:f2:1e:41:44:9d brd ff:ff:ff:ff:ff:ff 5: wg0: mtu 1420 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/none 6: nf0: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff 7: nf1: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff 8: nf2: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff 9: nf3: mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff nico@nsg-System:~/master-thesis$ #+END_CENTER *** DONE 2019-07-28: v4_networks only test [v6.9]: set_egress_port(4) => does not exit anywhere; table for port1 does not work? CLOSED: [2019-07-29 Mon 18:35] #+BEGIN_CENTER >> list_cam_tables ---------------------- realmain_v4_networks_0 : ---------------------- {u'action_ids': {u'.NoAction': 6, u'TopPipe.realmain.controller_debug': 3, u'TopPipe.realmain.controller_debug_table_id': 5, u'TopPipe.realmain.controller_reply': 4, u'TopPipe.realmain.set_egress_port': 1, u'TopPipe.realmain.set_egress_port_and_mac': 2}, u'annotations': {u'Xilinx_ExternallyConnected': [u'0'], u'Xilinx_LookupEngineType': [u'EM'], u'name': [u'TopPipe.realmain.v4_networks']}, u'match_type': u'EM', u'p4_name': u'realmain_v4_networks_0', u'px_class': u'LookupEngine', u'px_name': u'realmain_v4_networks_0', u'px_type_name': u'realmain_v4_networks_0_t', u'request_fields': [{u'p4_name': u'hdr.ipv4.dst_addr', u'px_name': u'lookup_request_key', u'size': 32, u'type': u'bits'}], u'response_fields': [{u'px_name': u'hit', u'size': 1, u'type': u'bits'}, {u'px_name': u'action_run', u'size': 3, u'type': u'bits'}, {u'fields': [{u'px_name': u'out_port', u'size': 8, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.set_egress_port', u'px_name': u'realmain_set_egress_port', u'type': u'struct'}, {u'fields': [{u'px_name': u'out_port', u'size': 8, u'type': u'bits'}, {u'px_name': u'mac_addr', u'size': 48, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.set_egress_port_and_mac', u'px_name': u'realmain_set_egress_port_and_mac', u'type': u'struct'}, {u'fields': [{u'px_name': u'task', u'size': 16, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.controller_reply', u'px_name': u'realmain_controller_reply', u'type': u'struct'}, {u'fields': [{u'px_name': u'table_id', u'size': 16, u'type': u'bits'}], u'p4_action': u'TopPipe.realmain.controller_debug_table_id', u'px_name': u'realmain_controller_debug_table_id', u'type': u'struct'}]} >> #+END_CENTER Adding rule for port1: #+BEGIN_CENTER table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0 nico@ESPRIMO-P956:~$ sudo ip neighbor add 10.0.0.1 lladdr f8:f2:1e:41:44:9c dev enp2s0f0 nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip addr add 10.0.0.200/24 dev enp2s0f1 nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor del 10.0.0.1 dev enp2s0f1 nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor del 10.0.0.1 dev enp2s0f0 nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor add 10.0.0.1 lladdr f8:f2:1e:41:44:9c dev enp2s0f0 ! #+END_CENTER Trying all 64 possibilities: #+BEGIN_CENTER table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772162 => 1 2 2 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772163 => 1 3 3 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772164 => 1 4 4 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772165 => 1 5 5 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772166 => 1 6 6 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772167 => 1 7 7 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772168 => 1 8 8 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772169 => 1 9 9 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772170 => 1 10 10 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772171 => 1 11 11 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772172 => 1 12 12 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772173 => 1 13 13 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772174 => 1 14 14 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772175 => 1 15 15 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772176 => 1 16 16 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772177 => 1 17 17 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772178 => 1 18 18 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772179 => 1 19 19 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772180 => 1 20 20 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772181 => 1 21 21 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772182 => 1 22 22 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772183 => 1 23 23 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772184 => 1 24 24 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772185 => 1 25 25 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772186 => 1 26 26 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772187 => 1 27 27 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772188 => 1 28 28 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772189 => 1 29 29 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772190 => 1 30 30 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772191 => 1 31 31 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772192 => 1 32 32 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772193 => 1 33 33 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772194 => 1 34 34 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772195 => 1 35 35 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772196 => 1 36 36 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772197 => 1 37 37 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772198 => 1 38 38 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772199 => 1 39 39 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772200 => 1 40 40 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772201 => 1 41 41 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772202 => 1 42 42 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772203 => 1 43 43 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772204 => 1 44 44 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772205 => 1 45 45 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772206 => 1 46 46 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772207 => 1 47 47 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772208 => 1 48 48 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772209 => 1 49 49 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772210 => 1 50 50 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772211 => 1 51 51 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772212 => 1 52 52 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772213 => 1 53 53 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772214 => 1 54 54 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772215 => 1 55 55 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772216 => 1 56 56 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772217 => 1 57 57 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772218 => 1 58 58 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772219 => 1 59 59 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772220 => 1 60 60 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772221 => 1 61 61 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772222 => 1 62 62 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772223 => 1 63 63 0 0 table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772224 => 1 64 64 0 0 #+END_CENTER nmap -sP does not show any packet on any other device: #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis/bin$ nmap -sP 10.0.0.0/24 Starting Nmap 7.01 ( https://nmap.org ) at 2019-07-28 20:00 CEST Nmap scan report for ict-networks-010-000-000-200.fwd-v4.ethz.ch (10.0.0.200) Host is up (0.00014s latency). Nmap done: 256 IP addresses (1 host up) scanned in 23.56 seconds nico@ESPRIMO-P956:~/master-thesis/bin$ 20:00:35.114277 IP 10.0.0.200.44382 > 10.0.0.12.443: Flags [S], seq 1173914110, win 29200, options [mss 1460,sackOK,TS val 4138 412163 ecr 0,nop,wscale 7], length 0 20:00:35.114327 IP 10.0.0.200.34958 > 10.0.0.26.443: Flags [S], seq 3327394542, win 29200, options [mss 1460,sackOK,TS val 3323 367618 ecr 0,nop,wscale 7], length 0 #+END_CENTER packets are going out though. Also trying with ping: #+BEGIN_CENTER nico@ESPRIMO-P956:~/master-thesis/bin$ for i in $(seq 1 64); do (ping -c1 10.0.0.$i & ); done #+END_CENTER *** DONE 2019-07-29: v7.0: ping6 seen on eth1 of nsg -> port 1 == itself -> everything to p1 CLOSED: [2019-07-29 Mon 18:35] #+BEGIN_CENTER ⚡ root  root tcpdump -ni1eth1 tcpdump: verboseoutput suppressed, use -v or -vv for full protocol decode listening on eth1, link-type EN10MB (Ethernet), capture size 262144 bytes 00:12:11.717894 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 1, length 64 00:12:14.587061 IP6 fe80::faf2:1eff:fe41:449c > ff02::2: ICMP6, router solicitation, length 16 00:12:14.587116 IP6 fe80::faf2:1eff:fe41:449c > ff02::2: ICMP6, router solicitation, length 16 00:13:57.130843 ARP, Request who-has 10.0.0.201 tell 10.0.0.200, length 46 00:13:58.158866 ARP, Request who-has 10.0.0.201 tell 10.0.0.200, length 46 00:13:59.182948 ARP, Request who-has 10.0.0.201 tell 10.0.0.200, length 46 #+END_CENTER *** DONE 2019-07-29: after recompiling with default = 16, icmp4 seen on eth1 of nsg CLOSED: [2019-07-29 Mon 18:35] eth1@nsg: #+BEGIN_CENTER 09:18:17.411700 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 1, length 64 09:18:18.413405 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 2, length 64 09:18:19.437540 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 3, length 64 09:18:20.461534 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 4, length 64 09:18:21.485394 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 5, length 64 09:18:46.452656 IP 10.0.0.200 > 10.0.0.1: ICMP echo request, id 4648, seq 1, length 64 09:18:47.469570 IP 10.0.0.200 > 10.0.0.1: ICMP echo request, id 4648, seq 2, length 64 09:18:48.493577 IP 10.0.0.200 > 10.0.0.1: ICMP echo request, id 4648, seq 3, length 64 #+END_CENTER reflashing switch *** DONE 2019-07-29: try to set egress to anything that is not 1 CLOSED: [2019-07-29 Mon 18:35] - ..hardcoded: sets to 4 (default) 16 (natted v4->v6) 64 (natted v6->v4) - ... dummy: 1 for arp, 1 for v4, 16 for v6 *** DONE 2019-07-29: fix precedence CLOSED: [2019-07-29 Mon 18:35] #+BEGIN_CENTER make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 netpfga_dummy.p4(20): warning: >>: shifting value with 8 bits by 11 sume_metadata.dst_port = (bit<8>) hdr.ethernet.ethertype >> 11; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ netpfga_dummy.p4(20): warning: >>: shifting value with 8 bits by 11 sume_metadata.dst_port = (bit<8>) hdr.ethernet.ethertype >> 11; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ netpfga_dummy.p4(20): warning: >>: shifting value with 8 bits by 11 sume_metadata.dst_port = (bit<8>) hdr.ethernet.ethertype >> 11; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ *** DONE 2019-07-29: set egress based on v4/v6 header: v7.1 CLOSED: [2019-07-29 Mon 18:35] **** ipv4: no output anywhere (only sent package seen) **** ipv6: no output anywhere (only sent package seen) **** arp: no output anywhere (only sent package seen) **** log #+BEGIN_CENTER nico@ESPRIMO-P956:~$ sudo tcpdump -lni enp2s0f1 tcpdump: verbose output suppressed, use -v or -vv for full protocol decode listening on enp2s0f1, link-type EN10MB (Ethernet), capture size 262144 bytes 16:17:23.691885 IP 10.0.0.200 > 10.0.0.1: ICMP echo request, id 16038, seq 1, length 64 16:17:24.710323 IP 10.0.0.200 > 10.0.0.1: ICMP echo request, id 16038, seq 2, length 64 16:18:16.198657 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 1, length 64 16:18:17.222343 IP6 2001:db8:42::42 > 2001:db8:42::1: ICMP6, echo request, seq 2, length 64 16:20:25.296638 IP6 2001:db8:42::42 > ff02::1:ff00:6000: ICMP6, neighbor solicitation, who has 2001:db8:42::6000, length 32 16:20:26.310284 IP6 2001:db8:42::42 > ff02::1:ff00:6000: ICMP6, neighbor solicitation, who has 2001:db8:42::6000, length 32 16:20:27.334276 IP6 2001:db8:42::42 > ff02::1:ff00:6000: ICMP6, neighbor solicitation, who has 2001:db8:42::6000, length 32 16:20:37.660293 ARP, Request who-has 10.0.0.250 tell 10.0.0.200, length 28 16:20:38.662166 ARP, Request who-has 10.0.0.250 tell 10.0.0.200, length 28 16:20:39.686165 ARP, Request who-has 10.0.0.250 tell 10.0.0.200, length 28 #+END_CENTER **** DONE 2019-07-29: found bug in PARSER!!!! CLOSED: [2019-07-29 Mon 18:34] *** 2019-07-29: documentation: `portland.sty' not found ** The NetPFGA saga Problems encountered: - The logfile for a compile run is 10k+ lines - Many logged errors can actually be ignored (?) like: ERROR: [VRFC 10-1491] unexpected EOF [/home/nico/master-thesis/netpfga/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp:37] ERROR: [VRFC 10-426] cannot find port tuple_out_sume_metadata_DATA on this module [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:219] ERROR: [VRFC 10-426] cannot find port tuple_out_sume_metadata_VALID on this module [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:218] ERROR: [VRFC 10-426] cannot find port tuple_in_sume_metadata_DATA on this module [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:185] ERROR: [VRFC 10-426] cannot find port tuple_in_sume_metadata_VALID on this module [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:184] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/Simp leSumeSwitch/SimpleSumeSwitch.v:332] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/ SimpleSumeSwitch/SimpleSumeSwitch.v:343] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_i p/SimpleSumeSwitch/SimpleSumeSwitch.v:354] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitc h/SimpleSumeSwitch.v:436] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeS witch/SimpleSumeSwitch.v:474] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_s ume_sdnet_ip/SimpleSumeSwitch/SimpleSumeSwitch.v:502] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleS umeSwitch/SimpleSumeSwitch.v:533] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeS witch/SimpleSumeSwitch.v:561] # launch_simulation -simset sim_1 -mode behavioral INFO: [Vivado 12-5698] Checking validity of IPs in the design for the 'XSim' simulator... CRITICAL WARNING: [BD 41-1356] Address block is not mapped into . Please use Address Editor to either map or exclude it. CRITICAL WARNING: [BD 41-1356] Address block is not mapped into . Please use Address Editor to either map or exclude it. WARNING: [VRFC 10-756] identifier state is used before its declaration [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/axis_sim_record_ip0/hdl/axis_sim_record.v:93] WARNING: [VRFC 10-756] identifier ready_count is used before its declaration [/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/axis_sim_record_ip0/hdl/axis_sim_record.v:94] INFO: [#UNDEF] Sorry, too many errors.. ERROR: [XSIM 43-3322] Static elaboration of top level Verilog design unit(s) in library work failed. INFO: [USF-XSim-69] 'elaborate' step finished in '1' seconds INFO: [USF-XSim-99] Step results log file:'/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.sim/sim_1/behav/xsim/elaborate.log' ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.sim/sim_1/behav/xsim/elaborate.log' file for more information. nico@nsg-System:~/master-thesis$ find . -name elaborate.log nico@nsg-System:~/master-thesis$ find ~ -name elaborate.log nico@nsg-System:~/master-thesis$ - Scripts that "fail" (generate wrong data) do exit 0 -> There is no easy / reliable error detection - Writing tables resulted in ioctl errors - Hardware test: unclear if first board was/is broken or not, BUT: second board in different computer allows writing tables - Many scripts depend on each other in later stages, without clear dependencies - There is basically no documentation for someone who "just wants to compile from P4 to netpfga" or A LOT of documentation (if vivado, vhld, sdnet documentation is counted) - Very high complexity in toolchain, scripts that are generated + cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default + make rm -f config_writes.py* rm -f *.pyc nico@nsg-System:~$ cat /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.py from NFTest import * NUM_WRITES = 4 def config_tables(): nftest_regwrite(0x44020050, 0x22222208) nftest_regwrite(0x44020054, 0x00000822) nftest_regwrite(0x44020080, 0x00000201) nftest_regwrite(0x44020040, 0x00000001) nico@nsg-System:~$ cat /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata/config_writes.sh #!/bin/bash ${SUME_SDNET}/sw/sume/rwaxi -a 0x44020050 -w 0x22222208 ${SUME_SDNET}/sw/sume/rwaxi -a 0x44020054 -w 0x00000822 ${SUME_SDNET}/sw/sume/rwaxi -a 0x44020080 -w 0x00000201 ${SUME_SDNET}/sw/sume/rwaxi -a 0x44020040 -w 0x00000001 nico@nsg-System:~$ - Misleading errors like ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.sim/sim_1/behav/xsim/elaborate.log' file for more information. nico@nsg-System:~/master-thesis/netpfga$ ls /home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.sim/sim_1/behav/xsim/elaborate.log ls: cannot access '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/project/simple_sume_switch.sim/sim_1/behav/xsim/elaborate.log': No such file or directory - not using raise() and hiding source of errors (_hexify) ** References / Follow up *** RFC 791 IPv4 https://tools.ietf.org/html/rfc791 *** RFC 792 ICMP https://tools.ietf.org/html/rfc792 *** RFC 826 ARP https://tools.ietf.org/html/rfc826 *** RFC 1017 ICMP checksum https://tools.ietf.org/html/rfc1071 - Related to RFC 6052, Host identifier *** RFC 2373 IP Version 6 Addressing Architecture - Referenced by RFC2464 - Obsoleted by RFC3513 *** RFC 2460 IPv6 (Checksum https://tools.ietf.org/html/rfc2460#section-8.1) *** RFC 2464 Transmission of IPv6 Packets over Ethernet Networks https://tools.ietf.org/html/rfc2464 - embedding of Mac addresses *** RFC 3810 MLD2 https://tools.ietf.org/html/rfc3810 *** RFC 4038 Application Aspects of IPv6 Transition https://tools.ietf.org/html/rfc4038 - Ref by RFC4291 / mapped ipv4 - *** RFC 4291 IP Version 6 Addressing Architecture https://tools.ietf.org/html/rfc4291 -! *** RFC 4443 ICMPv6 https://tools.ietf.org/html/rfc4443 *** RFC 4861: https://tools.ietf.org/html/rfc4861 Neighbor discovery *** RFC 6052: https://tools.ietf.org/html/rfc6052 IPv6 Addressing of IPv4/IPv6 Translators - first NAT64?? *** RFC 6145 IP/ICMP Translation Algorithm - Obsoleted by 7915 *** RFC 6146 Stateful nat http://tools.ietf.org/html/rfc6146 - Referenced from Jool *** RFC 6147 DNS64 https://tools.ietf.org/html/rfc6147 *** RFC 6586 for deployment experiences using Stateful NAT64. *** RFC 7757 Explicit Address Mappings for Stateless IP/ICMP Translation - https://tools.ietf.org/html/rfc7757 *** RFC 7915 IP/ICMP Translation Algorithm https://tools.ietf.org/html/rfc7915 - Requires RFC 6144 - MUST support one or more address mapping algorithms, which are defined in Section 6. - does not translate IPv6 extension headers except the Fragment Header. *** EAMT/Jool: https://www.jool.mx/en/eamt.html *** Solicited node multicast address https://en.wikipedia.org/wiki/Solicited-node_multicast_address *** Scapy / IPv6: https://www.idsv6.de/Downloads/IPv6PacketCreationWithScapy.pdf *** V1 model: https://github.com/p4lang/p4c/blob/master/p4include/v1model.p4 *** Cisco NAT64 https://www.cisco.com/c/en/us/td/docs/ios-xml/ios/ipaddr_nat/configuration/xe-3s/nat-xe-3s-book/iadnat-stateful-nat64.pdf *** Wiki_mac: https://en.wikipedia.org/wiki/MAC_address * DONE Initial administration ** DONE Clarify PDF / form with Denise Spicher: free form description ** DONE Create task description to be handed in mystudies ** DONE Create list of tasks / initial brainstorming ** DONE Get OK from Ueli Maurer that thesis is valid in Information Security Area ** DONE Find out how-when-whom-where to meet / define schedule ** DONE Latex and/or org-mode for the thesis? org for starting ** DONE Add initial milestones *** 180d plan *** 25w ** DONE Proposal / task description *** Task description for mystudies **** High speed NAT64 with P4 Currently there are two main open source NAT64 solution available: tayga and jool. The former is a single threaded, cpu bound user space solution, the latter a custom Linux kernel module. This thesis challenges this status quo by developing a P4 based solution supporting all features of jool/tayga and comparing the performance, security and adaptivity of the solutions. - Milestone 1: Stateless NAT64/NAT46 translations in P4 - Milestone 2: Stateful (dynamic) NAT64/NAT46 translations - Milestone 3: Hardware adaption *** Original ideas Proposal 1: Automating NAT64 with P4 In IPv6 only data centers IPv4 connectivity is still a business requirement. Current state of the art methods include layer 7 proxying or static assignments. both featuring static assignments. A flexible, dynamic assignment of IPv4 addresses to IPv6 hosts, similar to lease times in DHCPv4 and prefix delegations in DHCPv6 could reduce the pressure on IPv4 addresses. I would suggest the develop of a new protocol (likely UDP embedded) that allows hosts to request on-network support for IPv4 addresses. As IPv4 addresses have to be treated as "expensive", an accounting metric has to be introduced. While in the business world this is usually related to money, in the network world IPv4 users could be paying the network by (reduced) bandwidth. If such a metric existed, devices attached to the network could also try to negotiate and wait for using IPv4, when the price / penality for IPv4 is low (this might be very suitable for mail exchangers for instance). Proposal 2: High speed NAT64 with P4 Currently there are two main open source NAT64 solution available: tayga[0] and jool[1]. The former is a single threaded, cpu bound user space solution, the latter a custom Linux kernel module. I would like to challenge this status quo and develop a P4 based solution supporting all features of jool/tayga and comparing the performance and adaptivity of the solutions. [0] http://www.litech.org/tayga/ [1] https://www.jool.mx/en/index.html Proposal 3: Challenging the status quo with IPv10 The de facto standard in networking is to treat IPv4 and IPv6 as "impossible to combine". This proposal is to challenge this notion with three different methods: - Extensions to IPv4 to request remote IPv6 transport - Extensions to IPv6 to request remote IPv4 transport - Support in network equipment to handle the extensions As the IPv4 header does not allow embedding IPv6 addresses due to size limitations, embedding the destination address in a secondary header might be necessary (possibly encapsulated in UDP).