173 lines
4.2 KiB
TeX
173 lines
4.2 KiB
TeX
\chapter{\label{summary}Conclusion}
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%** Summary.tex: What have you achieved, what have you presented in this
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% document. What are the highlights of your work.
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% It should conclude by a conclusion.
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Sum up what you have done and recapitulate your key findings.
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%\section{\label{conclusion:overall}Overall}
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\section{\label{conclusion:softwarenat64}Software based NAT64}
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\section{\label{conclusion:general}General}
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Many misleading
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\section{\label{conclusion:bmv2}BMV2}
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\section{\label{conclusion:P4}P4}
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checksumming a frequent problem and helper
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Many possibilities
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Protocol independent
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Easy architecture
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Limitations in
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if in action limitations
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Limits if in actions
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python2 only - unicode errors
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IPv6: NDP: not easy to parse, as unknown number of following fields
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No support for multiple LPM keys in a table, can be solved with
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ternary matching.
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switch cannot be used in actions
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if things don't work, often a checksum problem.
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if frame checksum, then length of packet is broken
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\begin{verbatim}
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p4c --target bmv2 --arch v1model --std p4-16 "../p4src/static-mapping.p4" -o "/home/p4/master-thesis/p4src"
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../p4src/static-mapping.p4(366): error: Program is not supported by this target, because table MyIngress.v6_networks has multiple successors
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table v6_networks {
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^^^^^^^^^^^
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\end{verbatim}
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\begin{verbatim}
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ipaddress.ip_network("2001:db8:61::/64")
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IPv6Network(u'3230:3031:3a64:6238:3a36:313a:3a2f:3634/128')
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Fix:
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from __future__ import unicode_literals
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\end{verbatim}
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The tooling around P4 is still fragile, encountered many bugs
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in the development.\cite{schottelius:github1675}
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or missing features (\cite{schottelius:github745},
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\cite{theojepsen:_get})
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Hitting expression bug
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\section{\label{conclusion:netpfga}NetFGPA - all HERE}
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personal note here
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MTU limitations: 1500 according to a private mail from Salvator Galea
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cambridge / uk
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long compile process
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error prone compile process
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many dependencies
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lpm not supported!
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Netpfga live,
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Vivado
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SDNET
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xx k lines of supporting code
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Vivado installation: silent errors, infinite loop, missing libncurses5
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82k lines of code that are interdependent
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Many non critical error messages on the way
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Zero exit fatal errors
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missing / spreaded documentation
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tcpdump on local nfX doesn't work -> can only debug on other endpoint
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First card: Writing tables fails
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hardware debug shows some errors
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but hardware debug on correct card also shows some error
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Debug ioctl errors when writing table entries
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Output all ports -> port mapping documented only in a testdata script
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hwtest: Execution fails due to missing djtgcfg
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no payload accessq
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Many workarounds
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Table size 63, table size 64,
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Table entries require arguments of all possible actions, not only used
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one.
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Compile time hours
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Silent errors
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Unclear errors: broken board
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Due to the very fragile nature of the build framework from the
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NetFPGA-Live repository,
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Renaming VARIABLES in the definition of
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Reproducibility:
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hours for finding right output ports
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packet size / annotation
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\section{\label{conclusion:realworld}Real world applications}
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Can be deployed using the netpfga. Or Barefoot or Arista.
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\section{\label{conclusion:outlook}Outlook}
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%** Outlook.tex: What needs to be done further, what is planed
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%
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What are the consequences of your work for future work?
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Different HW
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Speed only limited to line speed. Could be running at 100 Gbit/s
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without modifications.
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PMTU
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handling error cases
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Our algorithm uses the IPv4-Compatible IPv6 Address\cite{rfc4291} to
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embed IPv4 addresses. However RFC6052\cite{rfc6052} defines different
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embeddings depending on the prefix size. A future version should
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support these schemes to be compatible to other implementations.
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No fragmentation
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No address / mac learning
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\section{\label{conclusion:closing}Closing words (NAME?)}
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While the port to NetPFGA was significantly more effort then expected,
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the learnings of the different layers were very much appreciated / liked
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It was a
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\section{todo - FIXME: remove}
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\begin{verbatim}
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***** Summary eher kurz
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***** Outlook als subsection!
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\end{verbatim}
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