cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API
cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API
cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for__OUT_.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_TopDeparser.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/xpm_fifo.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/xpm_memory.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/xpm_cdc.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/glbl.v" into library work
INFO: [VRFC 10-311] analyzing module glbl
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopDeparser.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopParser.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/S_BRIDGER_for_dummy_table_for_netpfga_tuple_in_request.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_fifo.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_cdc.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/glbl.v" into library work
INFO: [VRFC 10-311] analyzing module glbl
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/S_BRIDGER_for_dummy_table_for_netpfga_tuple_in_request.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_t.HDL/TopPipe_lvl_t.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_t.HDL/TopPipe_lvl_t.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/TB_System_Stim.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v" into library work
INFO: [VRFC 10-311] analyzing module Check
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopDeparser_t.HDL/TopDeparser_t.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopDeparser_t.HDL/TopDeparser_t.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_RESETTER.HDL/S_RESETTER_line.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_RESETTER.HDL/S_RESETTER_lookup.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_RESETTER.HDL/S_RESETTER_control.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopParser_t.HDL/TopParser_t.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopParser_t.HDL/TopParser_t.v" into library work
INFO: [VRFC 10-311] analyzing module TopParser_t
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_EGRESS.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_EGRESS.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/dummy_table_for_netpfga_t.HDL/dummy_table_for_netpfga_t.vp" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/dummy_table_for_netpfga_t.HDL/xpm_memory.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/dummy_table_for_netpfga_t.HDL/xpm_cdc.sv" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/dummy_table_for_netpfga_t.HDL/dummy_table_for_netpfga_t.v" into library work
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/SimpleSumeSwitch.v" into library work
./Testbench/CAM.h:169:5: note: expected ‘uint32_t (*)(addr_t) {aka unsigned int (*)(long long unsigned int)}’ but argument is of type ‘uint32_t (*)(uint32_t) {aka unsigned int (*)(unsigned int)}’
INFO: [Common 17-186] '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/webtalk/usage_statistics_ext_xsim.xml' has been successfully sent to Xilinx on Sun Jul 21 16:43:54 2019. For additional details about this file, please refer to the WebTalk help file at /opt/Xilinx/Vivado/2018.2/doc/webtalk_introduction.html.
INFO: [Common 17-206] Exiting Webtalk at Sun Jul 21 16:43:54 2019...
Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.dummy_table_for_netpfga.dummy_table_for_netpfga_t_Wrap_inst.dummy_table_for_netpfga_t_IntTop_inst.dummy_table_for_netpfga_t_Lookup_inst.dummy_table_for_netpfga_t_RamR1RW1_KeyValue_inst_0.xpm_memory_tdpram_inst.xpm_memory_base_inst.config_drc
Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.dummy_table_for_netpfga.dummy_table_for_netpfga_t_Wrap_inst.dummy_table_for_netpfga_t_IntTop_inst.dummy_table_for_netpfga_t_Lookup_inst.dummy_table_for_netpfga_t_RamR1RW1_KeyValue_inst_1.xpm_memory_tdpram_inst.xpm_memory_base_inst.config_drc
Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.dummy_table_for_netpfga.dummy_table_for_netpfga_t_Wrap_inst.dummy_table_for_netpfga_t_IntTop_inst.dummy_table_for_netpfga_t_Lookup_inst.dummy_table_for_netpfga_t_RamR1RW1_KeyValue_inst_2.xpm_memory_tdpram_inst.xpm_memory_base_inst.config_drc
Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.dummy_table_for_netpfga.dummy_table_for_netpfga_t_Wrap_inst.dummy_table_for_netpfga_t_IntTop_inst.dummy_table_for_netpfga_t_Lookup_inst.dummy_table_for_netpfga_t_RamR1RW1_KeyValue_inst_3.xpm_memory_tdpram_inst.xpm_memory_base_inst.config_drc
Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.dummy_table_for_netpfga.dummy_table_for_netpfga_t_Wrap_inst.dummy_table_for_netpfga_t_IntTop_inst.dummy_table_for_netpfga_t_Lookup_inst.dummy_table_for_netpfga_t_RamR1RW1_KeyValue_inst_4.xpm_memory_tdpram_inst.xpm_memory_base_inst.config_drc
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_BRIDGER_for_dummy_table_for_netpfga_tuple_in_request.myfifo.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopParser.fjmfdlrqfke25tc8pp2h0moq5wxaceif_1298.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopParser.k9crqz80r54waqengb72dn_819.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopParser.wdbd2383z402u7nsj981u1l8pqpqy2tp_1299.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopParser.gac95t91ftdd3vwnlblt_1281.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.r6369045h3hsmm9sdrcjj94r76kj33_2640.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.ba7tmorj9hdb9s6rxbg8k7jdipcy_1246.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.b0lxeyvbl4c0q17ohc57qrxy5_122.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.t12hwc7e5tfzzpjewzuoor9_519.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.tg6r33bx90dzvb43qacmlypvs7u5v_1543.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.vlxa85vr7p95d1bscbdwvi2_1810.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.bo7hn5txbbhm3qmubqxm9xr4_851.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.mdrp8ubz2rxhamdrvuk521wh98_1985.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.lw0631n3t0ea59qlquzsdte0w_2518.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.lwjvzppwsijx2ol6ho8wk1w1_927.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.tvxhbvzejcidtg7j9_1286.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.yxurvgtk5vx6l9uptylf0xv2u43ar_2600.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.v0r9gbe0f8989c5tx5dxz_851.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.h42sz2wgzu9its6ipn885v9_2517.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.iuv8vve2305hewolodn7i3d6x_12.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.uouu82mj9mz2qf6aq6ch9mpin35bt7f_2143.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.rk72973fd0kskwddq2i9n028gkzp_1981.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_S_SYNCER_for_TopDeparser.fux1jz8jy2dp26jbws80mo8dg_662.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.ne1ta1qyqywfgf90q3fjfkkls1j_1529.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.om002w82fjks2t8aiwwud1mmmot_2437.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.sx13gxbeac6s6vcn244pxumb60_1243.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.qojd41ohzqwq941ie_386.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.yc2y2fr74y9lqcxn9ip2dz_442.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.w1dkfez54dxkb24ral2lrp_437.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.wopyyy1kuoefgycvgaj6qnqq_1766.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for_TopDeparser.ojtg1mgtwneta1gc3k_1369.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for__OUT_.c1bd0f27pp5aj3llmoruifcqrwve1s4a_1344.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for__OUT_.pl1532ic2bei8uhrjt4bd48sn1vif5_2247.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for__OUT_.b9sbqp09fnv7ghncwre5648q17sdj_1011.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. SimpleSumeSwitch_tb.SimpleSumeSwitch_i.S_SYNCER_for__OUT_.gm68z3ji4zgh8pvye2c5s9z6e7_894.gnuram_async_fifo.xpm_fifo_base_inst.gen_sdpram.xpm_memory_base_inst.config_drc 0
[3758496] INFO: packet 4 data OK (tlast, tkeep, tdata) = (0, ffffffff, 0000000000000000000000000000000000000000081111111108082222222208)
[3761828] INFO: packet 4 data OK (tlast, tkeep, tdata) = (1, ffffffff, 0000000000000000000000000000000000000000000000000000000000000000)
[7097160] INFO: stopping simulation after 1000 idle cycles
[7097160] INFO: all expected data successfully received
[7097160] INFO: TEST PASSED
$finish called at time : 7097160 ps : File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv" Line 207
exit
INFO: [Common 17-206] Exiting xsim at Sun Jul 21 16:44:06 2019...
+ grep ^expected LOG
+ sed -e s/.*= <// -e s/.*= (//
+ expected_line=
+ grep ^actual LOG
+ sed -e s/.*= <// -e s/.*= (//
+ actual_line=
+ [ != ]
+ date
Son Jul 21 16:44:07 CEST 2019
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/lib/hw'.
WARNING: [IP_Flow 19-3656] If you move the project, the path for repository '/home/nico/projects/P4-NetFPGA/lib/hw' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj'.)
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
INFO: [filemgmt 20-348] Importing the appropriate files for fileset: 'sources_1'
# update_compile_order -fileset sources_1
update_compile_order: Time (s): cpu = 00:00:03 ; elapsed = 00:00:05 . Memory (MB): peak = 1252.852 ; gain = 4.000 ; free physical = 9300 ; free virtual = 15012
# update_compile_order -fileset sim_1
update_compile_order: Time (s): cpu = 00:00:03 ; elapsed = 00:00:05 . Memory (MB): peak = 1254.852 ; gain = 2.000 ; free physical = 9297 ; free virtual = 15009
# ipx::package_project
WARNING: [IP_Flow 19-3899] Cannot get the environment domain name variable for the component vendor name. Setting the vendor name to 'user.org'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/wrapper/changeEndian.v'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/SimpleSumeSwitch.h'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.vp'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_EGRESS.vp'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/dpi.h'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/Check.v'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/CAM.h'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/CAM_INST0.h'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/TB_System_Stim.v'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_CONTROLLERs.HDL/S_CONTROLLER_SimpleSumeSwitch.vp'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/glbl.v'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_cdc.sv'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_memory.sv'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/xpm_fifo.sv'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_BRIDGERs.HDL/S_BRIDGER_for_dummy_table_for_netpfga_tuple_in_request.vp'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/glbl.v'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/xpm_cdc.sv'.
WARNING: [IP_Flow 19-3833] Unreferenced file from the top module is not packaged: '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj/nf_sume_sdnet.srcs/sources_1/imports/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/xpm_memory.sv'.
INFO: [IP_Flow 19-5169] Module 'nf_sume_sdnet' uses SystemVerilog sources with a Verilog top file. These SystemVerilog files will not be analysed by the packager.
INFO: [IP_Flow 19-5107] Inferred bus interface 'm_axis' of definition 'xilinx.com:interface:axis:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 's_axis' of definition 'xilinx.com:interface:axis:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 'S_AXI' of definition 'xilinx.com:interface:aximm:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 'S_AXI_ARESETN' of definition 'xilinx.com:signal:reset:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 'axis_resetn' of definition 'xilinx.com:signal:reset:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 'S_AXI_ACLK' of definition 'xilinx.com:signal:clock:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-5107] Inferred bus interface 'axis_aclk' of definition 'xilinx.com:signal:clock:1.0' (from Xilinx Repository).
INFO: [IP_Flow 19-4728] Bus Interface 'S_AXI_ARESETN': Added interface parameter 'POLARITY' with value 'ACTIVE_LOW'.
INFO: [IP_Flow 19-4728] Bus Interface 'axis_resetn': Added interface parameter 'POLARITY' with value 'ACTIVE_LOW'.
INFO: [IP_Flow 19-4728] Bus Interface 'S_AXI_ACLK': Added interface parameter 'ASSOCIATED_BUSIF' with value 'S_AXI'.
INFO: [IP_Flow 19-4728] Bus Interface 'axis_aclk': Added interface parameter 'ASSOCIATED_BUSIF' with value 'm_axis'.
INFO: [IP_Flow 19-4728] Bus Interface 'S_AXI_ACLK': Added interface parameter 'ASSOCIATED_RESET' with value 'S_AXI_ARESETN'.
INFO: [IP_Flow 19-4728] Bus Interface 'axis_aclk': Added interface parameter 'ASSOCIATED_RESET' with value 'axis_resetn'.
INFO: [IP_Flow 19-2181] Payment Required is not set for this core.
INFO: [IP_Flow 19-2187] The Product Guide file is missing.
ipx::package_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:11 . Memory (MB): peak = 1314.492 ; gain = 32.000 ; free physical = 9282 ; free virtual = 14994
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/lib/hw'.
WARNING: [IP_Flow 19-3656] If you move the project, the path for repository '/home/nico/projects/P4-NetFPGA/lib/hw' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/nico/projects/P4-NetFPGA/lib/hw/contrib/cores/nf_sume_sdnet_ip/ip_proj'.)
# ipx::infer_user_parameters [ipx::current_core]
# ipx::check_integrity [ipx::current_core]
INFO: [IP_Flow 19-861] XGUI layout file basename "xgui/nf_sume_sdnet_v1_0.tcl" does not have the current IP <name>_v<version> format. If the IP name or version was changed recently, recreate this file to update the file format.
INFO: [IP_Flow 19-2181] Payment Required is not set for this core.
INFO: [IP_Flow 19-2187] The Product Guide file is missing.
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/ip_repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKIN1_PERIOD' from '5.000' to '5.0' has been ignored for IP 'clk_wiz_ip'
## if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
## puts ""
## puts "ERROR: This script was created for Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."
##
## return 1
## }
## set design_name control_sub
## if { [get_projects -quiet] eq "" } {
## puts "ERROR: Please open or create a project!"
## return 1
## }
## set errMsg ""
## set nRet 0
## set cur_design [current_bd_design -quiet]
## set list_cells [get_bd_cells -quiet]
## if { ${design_name} eq "" } {
## # USE CASES:
## # 1) Design_name not set
##
## set errMsg "ERROR: Please set the variable <design_name> to a non-empty value."
## # 6) Current opened design, has components, but diff names, design_name exists in project.
## # 7) No opened design, design_name exists in project.
##
## set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable <design_name> to another value."
## set nRet 2
##
## } else {
## # USE CASES:
## # 8) No opened design, design_name not in project.
## # 9) Current opened design, has components, but diff names, design_name not in project.
##
## puts "INFO: Currently there is no design <$design_name> in project, so creating one..."
##
## create_bd_design $design_name
##
## puts "INFO: Making design <$design_name> as current_bd_design."
## current_bd_design $design_name
##
## }
INFO: Currently there is no design <control_sub> in project, so creating one...
Wrote : </home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/control_sub.bd>
INFO: Making design <control_sub> as current_bd_design.
## puts "INFO: Currently the variable <design_name> is equal to \"$design_name\"."
INFO: Currently the variable <design_name> is equal to "control_sub".
## if { $nRet != 0 } {
## puts $errMsg
## return $nRet
## }
## proc create_root_design { parentCell } {
##
## if { $parentCell eq "" } {
## set parentCell [get_bd_cells /]
## }
##
## # Get object for parentCell
## set parentObj [get_bd_cells $parentCell]
## if { $parentObj == "" } {
## puts "ERROR: Unable to find parent cell <$parentCell>!"
## return
## }
##
## # Make sure parentObj is hier blk
## set parentType [get_property TYPE $parentObj]
## if { $parentType ne "hier" } {
## puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."
## set_property range $M03_SIZEADDR [get_bd_addr_segs {S00_AXI/SEG_M03_AXI_Reg}]
##
##
## # Restore current instance
## current_bd_instance $oldCurInst
##
## save_bd_design
## }
## create_root_design ""
CRITICAL WARNING: [BD 41-737] Cannot set the parameter TRANSLATION_MODE on /axi_interconnect_0. It is read-only.
### set MICROBLAZE_AXI_IIC_BASEADDR 0x40800000
### set MICROBLAZE_AXI_IIC_HIGHADDR 0x4080FFFF
### set MICROBLAZE_AXI_IIC_SIZEADDR 0x10000
### set MICROBLAZE_UARTLITE_BASEADDR 0x40600000
### set MICROBLAZE_UARTLITE_HIGHADDR 0x4060FFFF
### set MICROBLAZE_UARTLITE_SIZEADDR 0x10000
### set MICROBLAZE_DLMB_BRAM_BASEADDR 0x00000000
### set MICROBLAZE_DLMB_BRAM_HIGHADDR 0x0000FFFF
### set MICROBLAZE_DLMB_BRAM_SIZEADDR 0x10000
### set MICROBLAZE_ILMB_BRAM_BASEADDR 0x00000000
### set MICROBLAZE_ILMB_BRAM_HIGHADDR 0x0000FFFF
### set MICROBLAZE_ILMB_BRAM_SIZEADDR 0x10000
### set MICROBLAZE_AXI_INTC_BASEADDR 0x41200000
### set MICROBLAZE_AXI_INTC_HIGHADDR 0x4120FFFF
### set MICROBLAZE_AXI_INTC_SIZEADDR 0x10000
### set M00_BASEADDR 0x44000000
### set M00_HIGHADDR 0x44000FFF
### set M00_SIZEADDR 0x1000
### set M01_BASEADDR 0x44010000
### set M01_HIGHADDR 0x44010FFF
### set M01_SIZEADDR 0x1000
### set M02_BASEADDR 0x44020000
### set M02_HIGHADDR 0x44020FFF
### set M02_SIZEADDR 0x1000
### set M03_BASEADDR 0x44030000
### set M03_HIGHADDR 0x44030FFF
### set M03_SIZEADDR 0x1000
### set M04_BASEADDR 0x44040000
### set M04_HIGHADDR 0x44040FFF
### set M04_SIZEADDR 0x1000
### set M05_BASEADDR 0x44050000
### set M05_HIGHADDR 0x44050FFF
### set M05_SIZEADDR 0x1000
### set M06_BASEADDR 0x44060000
### set M06_HIGHADDR 0x44060FFF
### set M06_SIZEADDR 0x1000
### set M07_BASEADDR 0x44070000
### set M07_HIGHADDR 0x44070FFF
### set M07_SIZEADDR 0x1000
### set M08_BASEADDR 0x44080000
### set M08_HIGHADDR 0x44080FFF
### set M08_SIZEADDR 0x1000
### set IDENTIFIER_BASEADDR $M00_BASEADDR
### set IDENTIFIER_HIGHADDR $M00_HIGHADDR
### set IDENTIFIER_SIZEADDR $M00_SIZEADDR
### set INPUT_ARBITER_BASEADDR $M01_BASEADDR
### set INPUT_ARBITER_HIGHADDR $M01_HIGHADDR
### set INPUT_ARBITER_SIZEADDR $M01_SIZEADDR
### set OUTPUT_QUEUES_BASEADDR $M03_BASEADDR
### set OUTPUT_QUEUES_HIGHADDR $M03_HIGHADDR
### set OUTPUT_QUEUES_SIZEADDR $M03_SIZEADDR
### set OUTPUT_PORT_LOOKUP_BASEADDR $M02_BASEADDR
### set OUTPUT_PORT_LOOKUP_HIGHADDR $M02_HIGHADDR
### set OUTPUT_PORT_LOOKUP_SIZEADDR $M02_SIZEADDR
### set NF_10G_INTERFACE0_BASEADDR $M04_BASEADDR
### set NF_10G_INTERFACE0_HIGHADDR $M04_HIGHADDR
### set NF_10G_INTERFACE0_SIZEADDR $M04_SIZEADDR
### set NF_10G_INTERFACE1_BASEADDR $M05_BASEADDR
### set NF_10G_INTERFACE1_HIGHADDR $M05_HIGHADDR
### set NF_10G_INTERFACE1_SIZEADDR $M05_SIZEADDR
### set NF_10G_INTERFACE2_BASEADDR $M06_BASEADDR
### set NF_10G_INTERFACE2_HIGHADDR $M06_HIGHADDR
### set NF_10G_INTERFACE2_SIZEADDR $M06_SIZEADDR
### set NF_10G_INTERFACE3_BASEADDR $M07_BASEADDR
### set NF_10G_INTERFACE3_HIGHADDR $M07_HIGHADDR
### set NF_10G_INTERFACE3_SIZEADDR $M07_SIZEADDR
### set NF_RIFFA_DMA_BASEADDR $M08_BASEADDR
### set NF_RIFFA_DMA_HIGHADDR $M08_HIGHADDR
### set NF_RIFFA_DMA_SIZEADDR $M08_SIZEADDR
</M00_AXI/Reg> is being mapped into </S00_AXI> at <0x44A00000 [ 64K ]>
</M01_AXI/Reg> is being mapped into </S00_AXI> at <0x44A00000 [ 64K ]>
</M02_AXI/Reg> is being mapped into </S00_AXI> at <0x44A00000 [ 64K ]>
</M03_AXI/Reg> is being mapped into </S00_AXI> at <0x44A00000 [ 64K ]>
Wrote : </home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/control_sub.bd>
update_compile_order: Time (s): cpu = 00:00:21 ; elapsed = 00:00:11 . Memory (MB): peak = 2029.402 ; gain = 8.012 ; free physical = 9120 ; free virtual = 14551
loading libsume..
Traceback (most recent call last):
File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py", line 42, in <module>
import config_writes
File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/config_writes.py", line 7
(file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/tcl/simple_sume_switch_sim.tcl" line 177)
INFO: [Common 17-206] Exiting Vivado at Sun Jul 21 16:46:22 2019...
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_log.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_stim.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_0_expected.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_log.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_stim.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_1_expected.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_log.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_stim.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_2_expected.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_log.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_stim.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/nf_interface_3_expected.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_log.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/dma_0_expected.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.log': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_expect.axi': No such file or directory
cp: cannot stat '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/reg_stim.axi': No such file or directory
NetFPGA environment:
Root dir: /home/nico/projects/P4-NetFPGA
Project name: simple_sume_switch
Project dir: /tmp/nico/test/simple_sume_switch
Work dir: /tmp/nico
512
=== Work directory is /tmp/nico/test/simple_sume_switch
=== Setting up test in /tmp/nico/test/simple_sume_switch/sim_switch_default
=== Running test /tmp/nico/test/simple_sume_switch/sim_switch_default ... using cmd ['/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/test/sim_switch_default/run.py', '--sim', 'xsim']
+ date
Son Jul 21 16:46:22 CEST 2019
+ [ = no ]
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
# generate_target all [get_ips sss_output_queues_ip]
INFO: [IP_Flow 19-1686] Generating 'Instantiation Template' target for IP 'sss_output_queues_ip'...
INFO: [IP_Flow 19-1686] Generating 'Synthesis' target for IP 'sss_output_queues_ip'...
INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'sss_output_queues_ip'...
# source ./tcl/control_sub.tcl
## set scripts_vivado_version 2018.2
## set current_vivado_version [version -short]
## if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
## puts ""
## puts "ERROR: This script was created for Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."
##
## return 1
## }
## set design_name control_sub
## if { [get_projects -quiet] eq "" } {
## puts "ERROR: Please open or create a project!"
## return 1
## }
## set errMsg ""
## set nRet 0
## set cur_design [current_bd_design -quiet]
## set list_cells [get_bd_cells -quiet]
## if { ${design_name} eq "" } {
## # USE CASES:
## # 1) Design_name not set
##
## set errMsg "ERROR: Please set the variable <design_name> to a non-empty value."
## # 6) Current opened design, has components, but diff names, design_name exists in project.
## # 7) No opened design, design_name exists in project.
##
## set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable <design_name> to another value."
## set nRet 2
##
## } else {
## # USE CASES:
## # 8) No opened design, design_name not in project.
## # 9) Current opened design, has components, but diff names, design_name not in project.
##
## puts "INFO: Currently there is no design <$design_name> in project, so creating one..."
##
## create_bd_design $design_name
##
## puts "INFO: Making design <$design_name> as current_bd_design."
## current_bd_design $design_name
##
## }
INFO: Currently there is no design <control_sub> in project, so creating one...
Wrote : </home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/control_sub.bd>
INFO: Making design <control_sub> as current_bd_design.
## puts "INFO: Currently the variable <design_name> is equal to \"$design_name\"."
INFO: Currently the variable <design_name> is equal to "control_sub".
CRITICAL WARNING: [BD 41-737] Cannot set the parameter FREQ_HZ on /dma_sub/nf_riffa_dma_1/s_axi_lite. It is read-only.
create_bd_cell: Time (s): cpu = 00:00:22 ; elapsed = 00:00:58 . Memory (MB): peak = 1703.023 ; gain = 287.730 ; free physical = 9237 ; free virtual = 14624
WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKIN1_PERIOD' from '10.000' to '10.0' has been ignored for IP 'nf_mbsys/clk_wiz_1'
INFO: [Device 21-403] Loading part xc7vx690tffg1761-3
### set MICROBLAZE_AXI_IIC_BASEADDR 0x40800000
### set MICROBLAZE_AXI_IIC_HIGHADDR 0x4080FFFF
### set MICROBLAZE_AXI_IIC_SIZEADDR 0x10000
### set MICROBLAZE_UARTLITE_BASEADDR 0x40600000
### set MICROBLAZE_UARTLITE_HIGHADDR 0x4060FFFF
### set MICROBLAZE_UARTLITE_SIZEADDR 0x10000
### set MICROBLAZE_DLMB_BRAM_BASEADDR 0x00000000
### set MICROBLAZE_DLMB_BRAM_HIGHADDR 0x0000FFFF
### set MICROBLAZE_DLMB_BRAM_SIZEADDR 0x10000
### set MICROBLAZE_ILMB_BRAM_BASEADDR 0x00000000
### set MICROBLAZE_ILMB_BRAM_HIGHADDR 0x0000FFFF
### set MICROBLAZE_ILMB_BRAM_SIZEADDR 0x10000
### set MICROBLAZE_AXI_INTC_BASEADDR 0x41200000
### set MICROBLAZE_AXI_INTC_HIGHADDR 0x4120FFFF
### set MICROBLAZE_AXI_INTC_SIZEADDR 0x10000
### set M00_BASEADDR 0x44000000
### set M00_HIGHADDR 0x44000FFF
### set M00_SIZEADDR 0x1000
### set M01_BASEADDR 0x44010000
### set M01_HIGHADDR 0x44010FFF
### set M01_SIZEADDR 0x1000
### set M02_BASEADDR 0x44020000
### set M02_HIGHADDR 0x44020FFF
### set M02_SIZEADDR 0x1000
### set M03_BASEADDR 0x44030000
### set M03_HIGHADDR 0x44030FFF
### set M03_SIZEADDR 0x1000
### set M04_BASEADDR 0x44040000
### set M04_HIGHADDR 0x44040FFF
### set M04_SIZEADDR 0x1000
### set M05_BASEADDR 0x44050000
### set M05_HIGHADDR 0x44050FFF
### set M05_SIZEADDR 0x1000
### set M06_BASEADDR 0x44060000
### set M06_HIGHADDR 0x44060FFF
### set M06_SIZEADDR 0x1000
### set M07_BASEADDR 0x44070000
### set M07_HIGHADDR 0x44070FFF
### set M07_SIZEADDR 0x1000
### set M08_BASEADDR 0x44080000
### set M08_HIGHADDR 0x44080FFF
### set M08_SIZEADDR 0x1000
### set IDENTIFIER_BASEADDR $M00_BASEADDR
### set IDENTIFIER_HIGHADDR $M00_HIGHADDR
### set IDENTIFIER_SIZEADDR $M00_SIZEADDR
### set INPUT_ARBITER_BASEADDR $M01_BASEADDR
### set INPUT_ARBITER_HIGHADDR $M01_HIGHADDR
### set INPUT_ARBITER_SIZEADDR $M01_SIZEADDR
### set OUTPUT_QUEUES_BASEADDR $M03_BASEADDR
### set OUTPUT_QUEUES_HIGHADDR $M03_HIGHADDR
### set OUTPUT_QUEUES_SIZEADDR $M03_SIZEADDR
### set OUTPUT_PORT_LOOKUP_BASEADDR $M02_BASEADDR
### set OUTPUT_PORT_LOOKUP_HIGHADDR $M02_HIGHADDR
### set OUTPUT_PORT_LOOKUP_SIZEADDR $M02_SIZEADDR
### set NF_10G_INTERFACE0_BASEADDR $M04_BASEADDR
### set NF_10G_INTERFACE0_HIGHADDR $M04_HIGHADDR
### set NF_10G_INTERFACE0_SIZEADDR $M04_SIZEADDR
### set NF_10G_INTERFACE1_BASEADDR $M05_BASEADDR
### set NF_10G_INTERFACE1_HIGHADDR $M05_HIGHADDR
### set NF_10G_INTERFACE1_SIZEADDR $M05_SIZEADDR
### set NF_10G_INTERFACE2_BASEADDR $M06_BASEADDR
### set NF_10G_INTERFACE2_HIGHADDR $M06_HIGHADDR
### set NF_10G_INTERFACE2_SIZEADDR $M06_SIZEADDR
### set NF_10G_INTERFACE3_BASEADDR $M07_BASEADDR
### set NF_10G_INTERFACE3_HIGHADDR $M07_HIGHADDR
### set NF_10G_INTERFACE3_SIZEADDR $M07_SIZEADDR
### set NF_RIFFA_DMA_BASEADDR $M08_BASEADDR
### set NF_RIFFA_DMA_HIGHADDR $M08_HIGHADDR
### set NF_RIFFA_DMA_SIZEADDR $M08_SIZEADDR
Wrote : </home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/control_sub.bd>
WARNING: [IP_Flow 19-4832] The IP name 'axi_10g_ethernet_nonshared' you have specified is long. The Windows operating system has path length limitations. It is recommended you use shorter names to reduce the likelihood of issues.
## reset_target all [get_ips axi_10g_ethernet_nonshared]
## generate_target all [get_ips axi_10g_ethernet_nonshared]
INFO: [IP_Flow 19-1686] Generating 'Instantiation Template' target for IP 'axi_10g_ethernet_nonshared'...
INFO: [IP_Flow 19-1686] Generating 'Synthesis' target for IP 'axi_10g_ethernet_nonshared'...
INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'axi_10g_ethernet_nonshared'...
INFO: [IP_Flow 19-1686] Generating 'Change Log' target for IP 'axi_10g_ethernet_nonshared'...
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
Exporting to file /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/axi_10g_ethernet_nonshared/bd_0/hw_handoff/axi_10g_ethernet_nonshared.hwh
WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'Full_Threshold_Assert_Value' from '15' to '13' has been ignored for IP 'fifo_generator_1_9'
WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'Full_Threshold_Negate_Value' from '14' to '12' has been ignored for IP 'fifo_generator_1_9'
WARNING: [BD 41-1306] The connection to interface pin /xpcs/refclk_p is being overridden by the user. This pin will not be connected as a part of interface connection refclk_diff_port
WARNING: [BD 41-1306] The connection to interface pin /xpcs/refclk_n is being overridden by the user. This pin will not be connected as a part of interface connection refclk_diff_port
## reset_target all [get_ips axi_10g_ethernet_shared]
## generate_target all [get_ips axi_10g_ethernet_shared]
INFO: [IP_Flow 19-1686] Generating 'Instantiation Template' target for IP 'axi_10g_ethernet_shared'...
INFO: [IP_Flow 19-1686] Generating 'Synthesis' target for IP 'axi_10g_ethernet_shared'...
INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'axi_10g_ethernet_shared'...
INFO: [IP_Flow 19-1686] Generating 'Change Log' target for IP 'axi_10g_ethernet_shared'...
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
WARNING: [IP_Flow 19-650] IP license key 'ten_gig_eth_pcs_pma_basekr@2015.04' is enabled with a Design_Linking license.
Exporting to file /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/axi_10g_ethernet_shared/bd_0/hw_handoff/axi_10g_ethernet_shared.hwh
WARNING: [IP_Flow 19-4832] The IP name 'nf_10g_interface_shared_ip' you have specified is long. The Windows operating system has path length limitations. It is recommended you use shorter names to reduce the likelihood of issues.
WARNING: [IP_Flow 19-3374] An attempt to modify the value of disabled parameter 'MMCM_CLKIN1_PERIOD' from '5.000' to '5.0' has been ignored for IP 'clk_wiz_ip'
INFO: [xilinx.com:ip:axi_intc:4.1-1] /nf_mbsys/mbsys/microblaze_0_axi_intc: The AXI INTC core has been configured to operate with synchronous clocks.
INFO: [xilinx.com:ip:axi_intc:4.1-1] /nf_mbsys/mbsys/microblaze_0_axi_intc: The AXI INTC core has been configured to operate with synchronous clocks.
CRITICAL WARNING: [BD 41-759] The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified. These pins are tied-off to all 0's to avoid error in Implementation flow.
Please check your design and connect them as needed:
/dma_sub/nf_riffa_dma_1/cfg_interrupt_sent
Wrote : </home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/control_sub.bd>
VHDL Output written to : /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/synth/control_sub.v
VHDL Output written to : /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/sim/control_sub.v
VHDL Output written to : /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/hdl/control_sub_wrapper.v
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/axi_iic_0 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/axi_uartlite_0 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/clk_wiz_1 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/mdm_1 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_axi_intc .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_xlconcat .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/rst_clk_wiz_1_100M .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_local_memory/dlmb_bram_if_cntlr .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_local_memory/dlmb_v10 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_local_memory/ilmb_bram_if_cntlr .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_local_memory/ilmb_v10 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_local_memory/lmb_bram .
INFO: [BD 41-1029] Generation completed for the IP Integrator block nf_mbsys/mbsys/microblaze_0_axi_periph/xbar .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/pcie_reset_inv .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/axis_dwidth_dma_tx .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/axis_dwidth_dma_rx .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/axis_fifo_10g_rx .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/axis_fifo_10g_tx .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/nf_riffa_dma_1 .
INFO: [BD 41-1029] Generation completed for the IP Integrator block dma_sub/axi_interconnect_0/s00_couplers/auto_cc .
Exporting to file /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/bd/control_sub/hw_handoff/control_sub.hwh
Run output will be captured here: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log
launch_runs: Time (s): cpu = 00:00:13 ; elapsed = 00:00:15 . Memory (MB): peak = 2872.801 ; gain = 832.961 ; free physical = 8612 ; free virtual = 14202
# wait_on_run synth
[Sun Jul 21 16:48:53 2019] Waiting for synth to finish...
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
**** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
source top.tcl -notrace
Command: synth_design -top top -part xc7vx690tffg1761-3
Starting synth_design
WARNING: [Vivado_Tcl 4-393] The 'Synthesis' target of the following IPs are stale, please generate the output products using the generate_target or synth_ip command before running synth_design.
INFO: Launching helper process for spawning children vivado processes
INFO: Helper process launched with PID 22272
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_single [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:153]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_gray [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:284]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_handshake [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:469]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_pulse [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:715]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_array_single [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:903]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_sync_rst [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:1055]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_cdc_async_rst [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv:1171]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_base [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:56]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_rst [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1478]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_counter_updn [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1707]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_reg_vec [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1733]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_reg_bit [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1755]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_reg_pipe_bit [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1774]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_sync [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1800]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_async [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1937]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_fifo_axis [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:2076]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_base [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:57]
WARNING: [Synth 8-2490] overwriting previous definition of module asym_bwe_bb [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:6541]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_dpdistram [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:6600]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_dprom [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:6734]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_sdpram [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:6888]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_spram [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:7043]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_sprom [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:7189]
WARNING: [Synth 8-2490] overwriting previous definition of module xpm_memory_tdpram [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:7325]
WARNING: [Synth 8-2507] parameter declaration becomes local in small_fifo with formal parameter declaration list [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/input_arbiter_ip/hdl/small_fifo.v:67]
WARNING: [Synth 8-2507] parameter declaration becomes local in sss_small_fifo with formal parameter declaration list [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/sss_output_queues_ip/hdl/sss_small_fifo.v:69]
Parameter C_BASE_ADDRESS bound to: 0 - type: integer
Parameter C_S_AXI_DATA_WIDTH bound to: 32 - type: integer
Parameter C_S_AXI_ADDR_WIDTH bound to: 12 - type: integer
INFO: [Synth 8-155] case statement is not full and has no default [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/input_arbiter_ip/hdl/input_arbiter_cpu_regs.v:305]
INFO: [Synth 8-155] case statement is not full and has no default [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/sume_to_sdnet.v:72]
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-1] MEMORY_PRIMITIVE (0) instructs Vivado Synthesis to choose the memory primitive type. Depending on their values, other XPM_MEMORY parameters may preclude the choice of certain memory primitive types. Review XPM_MEMORY documentation and parameter values to understand any limitations, or set MEMORY_PRIMITIVE to a different value. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:467]
Parameter MEMORY_SIZE bound to: 12288 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 48 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 48 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 48 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 48 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 48 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 48 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 48 - type: integer
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 48 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 48 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 48 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 48 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 48 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 48 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 48 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
INFO: [Synth 8-4471] merging register 'tuple_out_control_VALID_reg' into 'packet_out_SOF_reg' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.v:182]
WARNING: [Synth 8-6014] Unused sequential element tuple_out_control_VALID_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_PROTOCOL_ADAPTERs.HDL/S_PROTOCOL_ADAPTER_INGRESS.v:182]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:124]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:124]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
WARNING: [Synth 8-6104] Input port 'value' has an internal driver [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:126]
INFO: [Common 17-14] Message 'Synth 8-6104' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 266 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 129 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 266 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 129 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 2 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 136192 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 129 - type: integer
Parameter PE_THRESH_ADJ bound to: 129 - type: integer
Parameter PF_THRESH_MIN bound to: 3 - type: integer
Parameter PF_THRESH_MAX bound to: 509 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 509 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter MEMORY_SIZE bound to: 136192 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 0 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 266 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 266 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 266 - type: integer
Parameter ADDR_WIDTH_A bound to: 9 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 266 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 266 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 266 - type: integer
Parameter ADDR_WIDTH_B bound to: 9 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 266 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 266 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 266 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 266 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 512 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 266 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 266 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 266 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
INFO: [Common 17-14] Message 'Synth 8-5772' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
Parameter MEMORY_SIZE bound to: 512 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 1 - type: integer
Parameter CLOCKING_MODE bound to: 0 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 1 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 1 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 1 - type: integer
Parameter ADDR_WIDTH_A bound to: 9 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 1 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 1 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 1 - type: integer
Parameter ADDR_WIDTH_B bound to: 9 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 2 - type: integer
Parameter WRITE_MODE_B bound to: 1 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: distributed - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 1 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 1 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 1 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 1 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 512 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 1 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: yes - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 5 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 1 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
WARNING: [Synth 8-6014] Unused sequential element gen_rd_b.gen_doutb_pipe.enb_pipe_reg[0] was removed. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:2588]
INFO: [Synth 8-4471] merging register 'gen_fwft.empty_fwft_fb_reg' into 'gen_fwft.empty_fwft_i_reg' [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
WARNING: [Synth 8-6014] Unused sequential element gen_fwft.empty_fwft_fb_reg was removed. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
Parameter MEMORY_SIZE bound to: 32768 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 128 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 128 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 128 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 128 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 128 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 128 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 128 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 128 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 128 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 128 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 128 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 128 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 128 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
Parameter MEMORY_SIZE bound to: 5120 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 1 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 1 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 20 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 20 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 20 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 20 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 20 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 20 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 1 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: distributed - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 20 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 20 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 20 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 20 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 20 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 20 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: yes - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 20 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
WARNING: [Synth 8-6014] Unused sequential element plihpeujtzw1n5gobvutsfu_356_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopParser.v:353]
WARNING: [Synth 8-6014] Unused sequential element p98hjnlgf3h53wq3ho65y60yvj12z_630_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopParser.v:341]
WARNING: [Synth 8-6014] Unused sequential element dbcki87wcpeeht0h6yb08sn9q_656_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopParser.v:355]
WARNING: [Synth 8-6014] Unused sequential element fajs5p342tladnereu8rmhwrapjzr_784_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopParser.v:292]
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 1 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 135 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 1 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 1 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 135 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 1 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 512 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 133 - type: integer
Parameter PE_THRESH_ADJ bound to: 133 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 507 - type: integer
Parameter PE_THRESH_MIN bound to: 5 - type: integer
Parameter PE_THRESH_MAX bound to: 507 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 2 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1161]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1207]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1218]
INFO: [Synth 8-4471] merging register 'gen_fwft.empty_fwft_fb_reg' into 'gen_fwft.empty_fwft_i_reg' [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
WARNING: [Synth 8-6014] Unused sequential element gen_fwft.empty_fwft_fb_reg was removed. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
Parameter MEMORY_SIZE bound to: 359168 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 1403 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 1403 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 1403 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 1403 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 1403 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 1403 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 1403 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 1403 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 1403 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 1403 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 1403 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 1403 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 1403 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
Parameter MEMORY_SIZE bound to: 40960 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 160 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 160 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 160 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 160 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 160 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 160 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 160 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 160 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 160 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 160 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 160 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 160 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 160 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
Parameter MEMORY_SIZE bound to: 65536 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 256 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 256 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 256 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 256 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 256 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 256 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 256 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 256 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 256 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 256 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 256 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 256 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 256 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
Parameter MEMORY_SIZE bound to: 8192 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 1 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 1 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 32 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 32 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 32 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 32 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 32 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 32 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 1 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: distributed - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 32 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 32 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 32 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 32 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 32 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 32 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: yes - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 32 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
WARNING: [Synth 8-6014] Unused sequential element ao36urn6hzdjnpe0npo8g67o_530_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.v:557]
WARNING: [Synth 8-6014] Unused sequential element kgg411y9iynrfdzxc8b6gys8w2h7uee8_496_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.v:545]
WARNING: [Synth 8-6014] Unused sequential element j96bd0obvmu0yopbwkyhj1nhzg_865_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.v:559]
WARNING: [Synth 8-6014] Unused sequential element suwakpsjlr3od9oitohk5ftcl7_205_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_S_SYNCER_for_TopDeparser.v:452]
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 1 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 167 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 1 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 1 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 167 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 1 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 512 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 165 - type: integer
Parameter PE_THRESH_ADJ bound to: 165 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 507 - type: integer
Parameter PE_THRESH_MIN bound to: 5 - type: integer
Parameter PE_THRESH_MAX bound to: 507 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 2 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1161]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1207]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1218]
INFO: [Synth 8-4471] merging register 'gen_fwft.empty_fwft_fb_reg' into 'gen_fwft.empty_fwft_i_reg' [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
WARNING: [Synth 8-6014] Unused sequential element gen_fwft.empty_fwft_fb_reg was removed. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
Parameter MEMORY_SIZE bound to: 4096 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 1 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 1 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 16 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 16 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 16 - type: integer
Parameter ADDR_WIDTH_A bound to: 8 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 16 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 16 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 16 - type: integer
Parameter ADDR_WIDTH_B bound to: 8 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 1 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: distributed - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 16 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 16 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 16 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 16 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 256 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 16 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 16 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 8 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: yes - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 16 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
INFO: [Common 17-14] Message 'Synth 8-6157' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
Parameter FIFO_MEMORY_TYPE bound to: bram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 160 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 81 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 160 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 81 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 160 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 81 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 160 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 81 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 2 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 40960 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 81 - type: integer
Parameter PE_THRESH_ADJ bound to: 81 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 128 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 11 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 7 - type: integer
Parameter PROG_FULL_THRESH bound to: 33 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 11 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 7 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 33 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 128 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 11 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 7 - type: integer
Parameter PROG_FULL_THRESH bound to: 33 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 11 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 7 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 33 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 128 - type: integer
Parameter FIFO_SIZE bound to: 1408 - type: integer
Parameter WR_PNTR_WIDTH bound to: 7 - type: integer
Parameter RD_PNTR_WIDTH bound to: 7 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 33 - type: integer
Parameter PE_THRESH_ADJ bound to: 33 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 125 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 125 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 8 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 8 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
Parameter MEMORY_TYPE bound to: 1 - type: integer
Parameter MEMORY_SIZE bound to: 1408 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 1 - type: integer
Parameter CLOCKING_MODE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 1 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 11 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 11 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 11 - type: integer
Parameter ADDR_WIDTH_A bound to: 7 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 11 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 11 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 11 - type: integer
Parameter ADDR_WIDTH_B bound to: 7 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 1 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: distributed - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 11 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 11 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 11 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 11 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 128 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 11 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 11 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 7 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 7 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 7 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 7 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: yes - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 11 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
INFO: [Common 17-14] Message 'Synth 8-6155' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
Parameter COUNTER_WIDTH bound to: 8 - type: integer
Parameter RESET_VALUE bound to: 0 - type: integer
Parameter COUNTER_WIDTH bound to: 7 - type: integer
Parameter RESET_VALUE bound to: 1 - type: integer
Parameter COUNTER_WIDTH bound to: 7 - type: integer
Parameter RESET_VALUE bound to: 2 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 20 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 84 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 20 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 84 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 20 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 84 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 20 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 84 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 5120 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 84 - type: integer
Parameter PE_THRESH_ADJ bound to: 84 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 32 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 84 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 32 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 84 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 32 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 84 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 32 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 84 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 8192 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 84 - type: integer
Parameter PE_THRESH_ADJ bound to: 84 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
WARNING: [Synth 8-6014] Unused sequential element vv98sv2mfss3k4zzxu4ippm_609_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_TopDeparser.v:659]
WARNING: [Synth 8-6014] Unused sequential element zcmw46ecdm4ijmvh0bfz6xwdzuh_355_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_TopDeparser.v:647]
WARNING: [Synth 8-6014] Unused sequential element qdy70lza7bbwl02zl53enb0a8urtb2v9_308_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_TopDeparser.v:661]
WARNING: [Synth 8-6014] Unused sequential element pgf6wwqelchlgz093jxb3ly_808_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_S_SYNCER_for_TopDeparser.v:532]
Parameter FIFO_MEMORY_TYPE bound to: bram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 266 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 143 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 266 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 143 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter P_COMMON_CLOCK bound to: 1 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 266 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 143 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 266 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 143 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 2 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 136192 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 143 - type: integer
Parameter PE_THRESH_ADJ bound to: 143 - type: integer
Parameter PF_THRESH_MIN bound to: 3 - type: integer
Parameter PF_THRESH_MAX bound to: 509 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 509 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 1 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 143 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: FWFT - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 1 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 143 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 1 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 1 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 1 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 143 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 1 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 1 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 143 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 1 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 512 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 141 - type: integer
Parameter PE_THRESH_ADJ bound to: 141 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 507 - type: integer
Parameter PE_THRESH_MIN bound to: 5 - type: integer
Parameter PE_THRESH_MAX bound to: 507 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 2 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1161]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1207]
INFO: [Synth 8-226] default block is never used [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1218]
INFO: [Synth 8-4471] merging register 'gen_fwft.empty_fwft_fb_reg' into 'gen_fwft.empty_fwft_i_reg' [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
WARNING: [Synth 8-6014] Unused sequential element gen_fwft.empty_fwft_fb_reg was removed. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_fifo/hdl/xpm_fifo.sv:1266]
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 20 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 72 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 20 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 72 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 20 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 72 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 20 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 72 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 5120 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 72 - type: integer
Parameter PE_THRESH_ADJ bound to: 72 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
Parameter FIFO_MEMORY_TYPE bound to: lutram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 32 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 72 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 32 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 72 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 1 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 32 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 72 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 32 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 72 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 1 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 8192 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 72 - type: integer
Parameter PE_THRESH_ADJ bound to: 72 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
WARNING: [Synth 8-6014] Unused sequential element mj718m0c40dgghwlyjyrj9bvwf_778_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopDeparser.v:557]
WARNING: [Synth 8-6014] Unused sequential element kj7a3u2lea2htcjsjjaw2f00m_281_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopDeparser.v:545]
WARNING: [Synth 8-6014] Unused sequential element jjh11scx2b8vmw04pbep9f7s_906_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopDeparser.v:559]
WARNING: [Synth 8-6014] Unused sequential element qrcddd9qzvh0h06nzk9o83v74zrp3z3h_836_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for_TopDeparser.v:452]
Parameter FIFO_MEMORY_TYPE bound to: bram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 290 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 135 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 290 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 135 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter P_COMMON_CLOCK bound to: 1 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 1 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 512 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 290 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_FULL_THRESH bound to: 135 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 290 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 9 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 135 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 2 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 512 - type: integer
Parameter FIFO_SIZE bound to: 148480 - type: integer
Parameter WR_PNTR_WIDTH bound to: 9 - type: integer
Parameter RD_PNTR_WIDTH bound to: 9 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 135 - type: integer
Parameter PE_THRESH_ADJ bound to: 135 - type: integer
Parameter PF_THRESH_MIN bound to: 3 - type: integer
Parameter PF_THRESH_MAX bound to: 509 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 509 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 10 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
Parameter MEMORY_TYPE bound to: 1 - type: integer
Parameter MEMORY_SIZE bound to: 148480 - type: integer
Parameter MEMORY_PRIMITIVE bound to: 2 - type: integer
Parameter CLOCKING_MODE bound to: 0 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter MEMORY_INIT_FILE bound to: none - type: string
Parameter MEMORY_INIT_PARAM bound to: (null) - type: string
Parameter USE_MEM_INIT bound to: 1 - type: integer
Parameter MEMORY_OPTIMIZATION bound to: true - type: string
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter AUTO_SLEEP_TIME bound to: 0 - type: integer
Parameter MESSAGE_CONTROL bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter USE_EMBEDDED_CONSTRAINT bound to: 0 - type: integer
Parameter WRITE_DATA_WIDTH_A bound to: 290 - type: integer
Parameter READ_DATA_WIDTH_A bound to: 290 - type: integer
Parameter BYTE_WRITE_WIDTH_A bound to: 290 - type: integer
Parameter ADDR_WIDTH_A bound to: 9 - type: integer
Parameter READ_RESET_VALUE_A bound to: 0 - type: string
Parameter READ_LATENCY_A bound to: 2 - type: integer
Parameter WRITE_MODE_A bound to: 2 - type: integer
Parameter WRITE_DATA_WIDTH_B bound to: 290 - type: integer
Parameter READ_DATA_WIDTH_B bound to: 290 - type: integer
Parameter BYTE_WRITE_WIDTH_B bound to: 290 - type: integer
Parameter ADDR_WIDTH_B bound to: 9 - type: integer
Parameter READ_RESET_VALUE_B bound to: 0 - type: string
Parameter READ_LATENCY_B bound to: 1 - type: integer
Parameter WRITE_MODE_B bound to: 2 - type: integer
Parameter P_MEMORY_PRIMITIVE bound to: block - type: string
Parameter P_MIN_WIDTH_DATA_A bound to: 290 - type: integer
Parameter P_MIN_WIDTH_DATA_B bound to: 290 - type: integer
Parameter P_MIN_WIDTH_DATA bound to: 290 - type: integer
Parameter P_MIN_WIDTH_DATA_ECC bound to: 290 - type: integer
Parameter P_MAX_DEPTH_DATA bound to: 512 - type: integer
Parameter P_ECC_MODE bound to: no_ecc - type: string
Parameter P_MEMORY_OPT bound to: yes - type: string
Parameter P_WIDTH_COL_WRITE_A bound to: 290 - type: integer
Parameter P_WIDTH_COL_WRITE_B bound to: 290 - type: integer
Parameter P_NUM_COLS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_COLS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_WRITE_B bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_A bound to: 1 - type: integer
Parameter P_NUM_ROWS_READ_B bound to: 1 - type: integer
Parameter P_WIDTH_ADDR_WRITE_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_WRITE_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_A bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_READ_B bound to: 9 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_WRITE_B bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_A bound to: 0 - type: integer
Parameter P_WIDTH_ADDR_LSB_READ_B bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_A bound to: 0 - type: integer
Parameter P_ENABLE_BYTE_WRITE_B bound to: 0 - type: integer
Parameter P_SDP_WRITE_MODE bound to: no - type: string
Parameter NUM_CHAR_LOC bound to: 0 - type: integer
Parameter MAX_NUM_CHAR bound to: 0 - type: integer
Parameter P_MIN_WIDTH_DATA_SHFT bound to: 290 - type: integer
Parameter P_MIN_WIDTH_DATA_LDW bound to: 4 - type: integer
INFO: [Synth 8-6059] Synth Info: [XPM_MEMORY 20-2] MEMORY_INIT_FILE (none), MEMORY_INIT_PARAM together specify no memory initialization. Initial memory contents will be all 0's. [/opt/Xilinx/Vivado/2018.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv:469]
Parameter FIFO_MEMORY_TYPE bound to: bram - type: string
Parameter ECC_MODE bound to: no_ecc - type: string
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 256 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 66 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: STD - type: string
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 256 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 66 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_SYNC_STAGES bound to: 2 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter P_FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter P_COMMON_CLOCK bound to: 0 - type: integer
Parameter P_ECC_MODE bound to: 0 - type: integer
Parameter P_READ_MODE bound to: 0 - type: integer
Parameter P_WAKEUP_TIME bound to: 2 - type: integer
Parameter COMMON_CLOCK bound to: 0 - type: integer
Parameter RELATED_CLOCKS bound to: 0 - type: integer
Parameter FIFO_MEMORY_TYPE bound to: 2 - type: integer
Parameter ECC_MODE bound to: 0 - type: integer
Parameter FIFO_WRITE_DEPTH bound to: 256 - type: integer
Parameter WRITE_DATA_WIDTH bound to: 256 - type: integer
Parameter WR_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_FULL_THRESH bound to: 66 - type: integer
Parameter USE_ADV_FEATURES bound to: 0707 - type: string
Parameter READ_MODE bound to: 0 - type: integer
Parameter FIFO_READ_LATENCY bound to: 1 - type: integer
Parameter READ_DATA_WIDTH bound to: 256 - type: integer
Parameter RD_DATA_COUNT_WIDTH bound to: 8 - type: integer
Parameter PROG_EMPTY_THRESH bound to: 66 - type: integer
Parameter DOUT_RESET_VALUE bound to: 0 - type: string
Parameter CDC_DEST_SYNC_FF bound to: 2 - type: integer
Parameter FULL_RESET_VALUE bound to: 0 - type: integer
Parameter REMOVE_WR_RD_PROT_LOGIC bound to: 0 - type: integer
Parameter WAKEUP_TIME bound to: 0 - type: integer
Parameter VERSION bound to: 0 - type: integer
Parameter SIM_ASSERT_CHK bound to: 0 - type: integer
Parameter FIFO_MEM_TYPE bound to: 2 - type: integer
Parameter RD_MODE bound to: 0 - type: integer
Parameter ENABLE_ECC bound to: 0 - type: integer
Parameter FIFO_READ_DEPTH bound to: 256 - type: integer
Parameter FIFO_SIZE bound to: 65536 - type: integer
Parameter WR_PNTR_WIDTH bound to: 8 - type: integer
Parameter RD_PNTR_WIDTH bound to: 8 - type: integer
Parameter FULL_RST_VAL bound to: 1'b0
Parameter WR_RD_RATIO bound to: 0 - type: integer
Parameter PF_THRESH_ADJ bound to: 66 - type: integer
Parameter PE_THRESH_ADJ bound to: 66 - type: integer
Parameter PF_THRESH_MIN bound to: 5 - type: integer
Parameter PF_THRESH_MAX bound to: 253 - type: integer
Parameter PE_THRESH_MIN bound to: 3 - type: integer
Parameter PE_THRESH_MAX bound to: 253 - type: integer
Parameter WR_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_DC_WIDTH_EXT bound to: 9 - type: integer
Parameter RD_LATENCY bound to: 1 - type: integer
Parameter EN_ADV_FEATURE bound to: 16'b0000011100000111
Parameter EN_OF bound to: 1'b1
Parameter EN_PF bound to: 1'b1
Parameter EN_WDC bound to: 1'b1
Parameter EN_AF bound to: 1'b0
Parameter EN_WACK bound to: 1'b0
Parameter FG_EQ_ASYM_DOUT bound to: 1'b0
Parameter EN_UF bound to: 1'b1
Parameter EN_PE bound to: 1'b1
Parameter EN_RDC bound to: 1'b1
Parameter EN_AE bound to: 1'b0
Parameter EN_DVLD bound to: 1'b0
WARNING: [Synth 8-6014] Unused sequential element irb0sp7xdt7clzbg3wntrt1nuie1zrb_872_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for__OUT_.v:302]
WARNING: [Synth 8-6014] Unused sequential element aki7vt10vjtmyfx2w7hw1nnn2n1nl6_268_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for__OUT_.v:300]
WARNING: [Synth 8-6014] Unused sequential element i41rlch9wn1zc4516j7wycbboyqv_263_reg was removed. [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/SimpleSumeSwitch/S_SYNCERs.HDL/S_SYNCER_for__OUT_.v:337]
ERROR: [Synth 8-448] named port connection 'tuple_in_sume_metadata_VALID' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:184]
ERROR: [Synth 8-448] named port connection 'tuple_in_sume_metadata_DATA' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:185]
WARNING: [Synth 8-689] width (12) of port connection 'control_S_AXI_AWADDR' does not match port width (8) of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:189]
WARNING: [Synth 8-689] width (12) of port connection 'control_S_AXI_ARADDR' does not match port width (8) of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:199]
ERROR: [Synth 8-448] named port connection 'tuple_out_sume_metadata_VALID' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:218]
ERROR: [Synth 8-448] named port connection 'tuple_out_sume_metadata_DATA' does not exist for instance 'SimpleSumeSwitch_inst' of module 'SimpleSumeSwitch' [/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.srcs/sources_1/ip/nf_sume_sdnet_ip/nf_sume_sdnet_ip/wrapper/nf_sume_sdnet.v:219]
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details
INFO: [Common 17-206] Exiting Vivado at Sun Jul 21 17:36:33 2019...
[Sun Jul 21 17:36:34 2019] synth finished
wait_on_run: Time (s): cpu = 00:27:48 ; elapsed = 00:47:40 . Memory (MB): peak = 2872.801 ; gain = 0.000 ; free physical = 8488 ; free virtual = 14207
# launch_runs impl_1 -to_step write_bitstream
[Sun Jul 21 17:36:35 2019] Launched synth_1...
Run output will be captured here: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/runme.log
[Sun Jul 21 17:36:35 2019] Launched impl_1...
Run output will be captured here: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/impl_1/runme.log
# wait_on_run impl_1
[Sun Jul 21 17:36:35 2019] Waiting for impl_1 to finish...
[Sun Jul 21 17:38:42 2019] impl_1 finished
wait_on_run: Time (s): cpu = 00:01:40 ; elapsed = 00:02:07 . Memory (MB): peak = 2876.809 ; gain = 0.000 ; free physical = 8490 ; free virtual = 14210
# exit
INFO: [Common 17-206] Exiting Vivado at Sun Jul 21 17:38:42 2019...
echo "Project simple_sume_switch does not exist.";\
echo "Please run \"make project\" to create and build the project first";\
fi;\
export simple_sume_switch project to SDK
****** Vivado v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
**** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
source tcl/export_hardware.tcl
# set design [lindex $argv 0]
# puts "\nOpening $design XPR project\n"
Opening simple_sume_switch XPR project
# open_project project/$design.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-14144-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-14144-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue.
open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1365.711 ; gain = 188.977 ; free physical = 9217 ; free virtual = 14937
