51 lines
18 KiB
Plaintext
51 lines
18 KiB
Plaintext
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+ date
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Mon Jul 29 16:29:36 CEST 2019
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+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4
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+ make
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make -C src/ clean
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
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rm -f *.sdnet *.tbl .sdnet_switch_info.dat
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
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make -C testdata/ clean
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
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rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
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rm -rf nf_sume_sdnet_ip/
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rm -f ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_4456.backup.jou ./nf_sume_sdnet_ip/SimpleSumeSwitch/xelab.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.jou ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsc.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimcrash.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/xsim.dir/work.SimpleSumeSwitch_tb#work.glbl/xsimkernel.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.log ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk.jou ./nf_sume_sdnet_ip/SimpleSumeSwitch/webtalk_4456.backup.log ./simple_sume_switch/hw/vivado.log ./simple_sume_switch/hw/vivado.jou ./simple_sume_switch/hw/vivado_5572.backup.log ./simple_sume_switch/hw/vivado_23128.backup.jou ./simple_sume_switch/hw/vivado_5572.backup.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_auto_cc_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_auto_cc_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_mdm_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_mdm_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m03_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m03_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m01_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m01_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_xbar_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m07_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m07_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_rx_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_dwidth_dma_rx_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m08_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m08_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_clk_wiz_1_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_clk_wiz_1_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_microblaze_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_bram_if_cntlr_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_dlmb_bram_if_cntlr_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_s00_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_s00_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m06_data_fifo_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m06_data_fifo_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_clock_converter_0_0_synth_1/vivado.jou ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axi_clock_converter_0_0_synth_1/runme.log ./simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_axis_fifo_10g_tx_0_synth_1/vivado.
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rm -f sw/config_tables.c
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make -C src/
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
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p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4
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actions_egress.p4(51): warning: Table v6_networks is not used; removing
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table v6_networks {
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^^^^^^^^^^^
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actions_egress.p4(77): warning: Table v4_networks is not used; removing
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table v4_networks {
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^^^^^^^^^^^
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actions_nat64_generic.p4(159): warning: Table nat64 is not used; removing
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table nat64 {
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^^^^^
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actions_nat64_generic.p4(177): warning: Table nat46 is not used; removing
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table nat46 {
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^^^^^
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minip4_solution.p4(19): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates
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out metadata meta,
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^^^^
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minip4_solution.p4(16)
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parser RealParser(
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^^^^^^^^^^
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat
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Traceback (most recent call last):
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File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py", line 438, in <module>
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main()
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File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py", line 434, in main
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fill_px_tables(args.commands_file)
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File "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py", line 409, in fill_px_tables
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with open(commands_file) as f:
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IOError: [Errno 2] No such file or directory: 'commands.txt'
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Makefile:34: recipe for target 'all' failed
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make[1]: *** [all] Error 1
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
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Makefile:31: recipe for target 'frontend' failed
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make: *** [frontend] Error 2
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