118 lines
3.2 KiB
Plaintext
118 lines
3.2 KiB
Plaintext
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#include <core.p4>
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#include <sume_switch.p4>
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#include "headers.p4"
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#include "settings.p4"
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/********************************************************************************
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* Possible bugs / things to fix:
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- Does NoAction exist?
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- Aligment of "meta" / replace metadate with our own
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- what does sume_metadata contain? ingress port is where?
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nico@nsg-System:~$ find . -name sume_switch.p4
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./master-thesis/support/semester-thesis-1/project/SSS_example_2_SS/bitsnpices/sume_switch.p4
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nico@nsg-System:~$
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/******************** INFO ONLY *************************/
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// one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
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// typedef bit<8> port_t;
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/* standard sume switch metadata */
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// struct sume_metadata_t {
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// bit<16> dma_q_size; // measured in 32-byte words
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// bit<16> nf3_q_size; // measured in 32-byte words
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// bit<16> nf2_q_size; // measured in 32-byte words
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// bit<16> nf1_q_size; // measured in 32-byte words
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// bit<16> nf0_q_size; // measured in 32-byte words
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// bit<8> send_dig_to_cpu; // send digest_data to CPU
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// bit<8> drop;
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// port_t dst_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
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// port_t src_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
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// bit<16> pkt_len; // unsigned int
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// }
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/********************************************************************************
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* Header
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*/
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// digest_data, MUST be 256 bits -- not used by us
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struct digest_data_t {
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bit<256> unused;
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}
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@Xilinx_MaxPacketRegion(1024)
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parser TopParser(packet_in packet,
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out headers hdr,
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out metadata meta,
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out digest_data_t digest_data,
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inout sume_metadata_t standard_metadata) {
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#include "parsers.p4"
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}
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/********************************************************************************
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* Main
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*/
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control TopPipe(inout Parsed_packet hdr,
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inout metadata meta,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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/* FIXME: not sure what to do on netpfga */
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action drop() {
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#ifndef _SUME_SWITCH_P4_
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mark_to_drop();
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#endif
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}
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table dummy_table_for_netpfga {
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key = {
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hdr.ethernet.dst_addr: exact;
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}
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actions = {
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swap_eth_addresses;
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do_nothing;
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send_to_port1;
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// send_to_all_ports;
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}
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size = TEST_TABLE_SIZE;
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// default_action = swap_eth_addresses; // test_mirror(): in gen_testdata.py
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default_action = send_to_port1; // test_port1()
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// default_action = send_to_all_ports; // test_allports():
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}
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apply {
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lookup_table.apply();
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}
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}
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/********************************************************************************
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* Deparser
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*/
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@Xilinx_MaxPacketRegion(1024)
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control TopDeparser(packet_out packet,
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in headers hdr,
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in metadata meta,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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#include "deparser.p4"
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}
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/********************************************************************************
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* Switch
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*/
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SimpleSumeSwitch(
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TopParser(),
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TopPipe(),
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TopDeparser()
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) main;
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