In theory: implement NAT64 from v6 to v4 without externs

doc/plan.org

@@ -5632,7 +5632,33 @@ PCAP files to prove it works:
  create mode 100644 pcap/tcp-udp-delta-2019-07-17-1558-h3.pcap
 
 #+END_CENTER
-***
+*** TODO 2019-07-21: fix "compilation error" on minip4 / netpfga
+#+BEGIN_CENTER
+source tcl/export_hardware.tcl
+# set design [lindex $argv 0]
+# puts "\nOpening $design XPR project\n"
+
+Opening simple_sume_switch XPR project
+
+# open_project project/$design.xpr
+Scanning sources...
+Finished scanning sources
+INFO: [IP_Flow 19-234] Refreshing IP repositories
+INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'.
+INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
+WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-10327-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue.
+WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-10327-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue.
+open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1365.707 ; gain = 188.977 ; free physical = 10151 ; free virtual = 15581
+# puts "\nOpening $design Implementation design\n"
+
+Opening simple_sume_switch Implementation design
+
+# open_run impl_1
+ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open
+Vivado%
+Vivado%
+#+END_CENTER
+*** TODO 2019-07-21: whether or not to handle icmp(6) checksums
 ** The NetPFGA saga
 Problems encountered:
 - The logfile for a compile run is 10k+ lines