[++doc] add benchmark design
This commit is contained in:
Nico Schottelius
parent
ce02b44164
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393a6ecd91
9 changed files with 142 additions and 40 deletions
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@ -182,3 +182,29 @@ not the full headers are used, but the pseudo headers (compare figures
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To compensate the carry bit, our code uses 17 bit integers for
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correcting the carry.
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% FIXME: add note to python script / checksum diffing
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% ----------------------------------------------------------------------
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\section{\label{Design:Benchmarks}Benchmarks}
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The benchmarks were performed on two hosts, a load generator and a
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nat64 translator. Both hosts were equipped with a dual port
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Intel X520 10 Gbit/s network card. Both hosts were connected using DAC
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without any equipment in between. Figure \ref{fig:softwarenat64design}
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shows the setup.
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\begin{figure}[h]
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\includegraphics[scale=0.5]{softwarenat64design}
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\centering
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\caption{NAT64 in software benchmark}
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\label{fig:softwarenat64design}
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\end{figure}
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When testing the NetPFGA/P4 performance, the X520 cards in the NAT64
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translator were diconnected and instead the NetPFGA ports were
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connected, as show in figure \ref{fig:netpfgadesign}. The load
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generator is equipped with a quad core CPU (Intel(R) Core(TM) i7-6700
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CPU @ 3.40GHz), enabled with hyperthreading and 16 GB RAM. The NAT64
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translator is also equipped with a quard core CPU (Intel(R) Core(TM)
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i7-4770 CPU @ 3.40GHz) and 16 GB RAM.
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\begin{figure}[h]
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\includegraphics[scale=0.5]{netpfgadesign}
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\centering
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\caption{NAT64 with NetFPGA benchmark}
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\label{fig:netpfgadesign}
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\end{figure}
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@ -1,15 +1,53 @@
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\chapter{\label{results}Results}
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%** Results.tex: What were the results achieved including an evaluation
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%
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This section describes the achieved results and compares the P4 based
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implementation with real world software solutions.
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\section{\label{results:general}General}
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Parser for all protocols (udp,tcp,icmp,icmp6)
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We distinguish the software implementation of P4 (BMV2) and the
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hardware implementation (NetFPGA) due to significant differences in
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deployment and development. We present benchmarks for the existing
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software solutions as well as for our hardware implementation. As the
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objective of this thesis was to demonstrate the high speed
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capabilities of NAT64 in hardware, no benchmarks were performed on the
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P4 software implementation.
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% ----------------------------------------------------------------------
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\section{\label{results:p4}NAT64 with P4}
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We successfully implemented P4 code to realise
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NAT64\cite{schottelius:thesisrepo}. It contains parsers
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for all related protocols (ipv6, ipv4, udp, tcp, icmp, icmp6, ndp,
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arp), supports EAMT as defined by RFC7757 \cite{rfc7757} and is
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feature equivalent to the two compared software solutions
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tayga\cite{lutchansky:_tayga_simpl_nat64_linux} and
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jool\cite{mexico:_jool_open_sourc_siit_nat64_linux}.
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Due to limitations in the P4 environment of the
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NetFPGA\cite{conclusion:netfpga} environment, the BMV2 implementation
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is more feature rich. Table \ref{tab:benchmark} summarises the
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achieved bandwidths of the NAT64 solutions.
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BMV2: more feature rich, but software only solution
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NetFPGA: capabale of line speed Nat64, focused port on nat64
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\begin{table}[htbp]
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\begin{center}\begin{minipage}{\textwidth}
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\begin{tabular}{| c | p{130pt} | l |}
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\hline
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Solution & Column 2 \newline (additional line) & Column 3 \\
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\hline
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Tayga & C2,R2 & C2,R3 \\
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\hline
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Jool & \multicolumn{2}{| c |}{C2\&C3,R3} \\
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\hline
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P4 / NetPFGA & C2,R4\footnote{Footnote to table~\ref{tab:benchmark}} & C3,R4\\
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\hline
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\end{tabular}
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\end{minipage}
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\caption{Table 1}
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\label{tab:benchmark}
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\end{center}
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\end{table}
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Both support EAMT as defined by RFC7757 \cite{rfc7757}.
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During the benchmarks the client
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% ----------------------------------------------------------------------
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\section{\label{Results:BMV2}BMV2}
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Responds to icmp, icmp6
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@ -28,11 +66,13 @@ RFC6145\cite{rfc6145}.
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Stateful : no automatic removal
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% ----------------------------------------------------------------------
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\section{\label{results:tayga}Tayga}
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3gbit
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% ----------------------------------------------------------------------
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\section{\label{results:jool}Jool}
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BIN
doc/Thesis.pdf
BIN
doc/Thesis.pdf
Binary file not shown.
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@ -2,22 +2,24 @@
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The following sections describe how to acquire the resources
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to reproduce the test results. All compilations were made on Ubuntu
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16.04 with kernels
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\begin{itemize}
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\item 4.15.0-54-generic (Supporting Desktop),
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\item 4.15.0-54-generic (Supporting Desktop)
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\item 4.4.0-143-generic (BMV2 test VM)
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\item 4.15.0-55-generic (Desktop with NetFPGA
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\item 4.15.0-55-generic (Desktop with NetFPGA card)
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\end{itemize}
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% ok
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% ----------------------------------------------------------------------
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\section{\label{chapterminus1:thesis:general}Master Thesis}
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The master thesis including all self developed source code is
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available by git via
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\begin{verbatim}
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git clone git@gitlab.ethz.ch:nicosc/master-thesis.git
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git clone https://gitlab.ethz.ch/nsg/student-projects/ma-2019-19_high_speed_nat64_with_p4
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\end{verbatim}
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It can be browsed online on \url{https://gitlab.ethz.ch/nicosc/master-thesis}.
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It can be browsed online on
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\url{https://gitlab.ethz.ch/nicosc/master-thesis} and on
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\url{https://gitlab.ethz.ch/nsg/student-projects/ma-2019-19_high_speed_nat64_with_p4}.
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% ok
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% ----------------------------------------------------------------------
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\section{\label{chapterminus1:thesis:xilinx}Xilinx Toolchain}
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A prerequisite for building the NetFGPA source code is the
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@ -26,10 +28,9 @@ installation of
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\item \verb=Xilinx_SDNet_2018.2_1005_9=
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\item \verb=Xilinx_Vivado_SDK_2018.2_0614_1954=
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\end{itemize}
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Both tools need to be installed to /opt/Xilinx/, as paths are
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hardcoded in various places.
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% ok
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% ----------------------------------------------------------------------
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\section{\label{chapterminus1:thesis}NetFGPA support scripts}
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To be able to compile P4 source code to the NetFPGA the collection of
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@ -45,7 +46,6 @@ After that the variable \verb=P4_PROJECT_NAME= in
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\texttt{~/projects/P4-NetFPGA/tools/settings.sh} needs to be modified to
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read \verb|export P4_PROJECT_NAME=minip4| instead of
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\verb|export P4_PROJECT_NAME=switch_calc|.
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Sample code for installation:
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\begin{verbatim}
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@ -53,38 +53,33 @@ Sample code for installation:
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git clone git@github.com:NetFPGA/P4-NetFPGA-live.git P4-NetFPGA
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sed -i 's/\(P4_PROJECT_NAME=\).*/\1minip4/' ~/projects/P4-NetFPGA/tools/settings.sh
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\end{verbatim}
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Version \textbf{v1.3.1-46-g97d3aaa} of the P4-NetPFGA repository was
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used for creating the bitfiles of this project.
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\begin{verbatim}
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nico@nsg-System:~/projects/P4-NetFPGA$ git describe --always
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v1.3.1-46-g97d3aaa
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\end{verbatim}
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% ok
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% ----------------------------------------------------------------------
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\chapter{\label{appendix0}BMV2 environment and tests}
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All BMV2 based compilations were made with the following compiler:
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\begin{verbatim}
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p4@ubuntu:~$ p4c --version
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p4c 0.5 (SHA: 5ae30ee)
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\end{verbatim}
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The installation is based on the vagrant files that were provided in
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the
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``Advanced Topics in
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the ``Advanced Topics in
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Communication Networks Fall 2018'' course of
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ETHZ (\url{https://adv-net.ethz.ch/2018/}) and contains p4tools as
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well as all utilities that came with the vagrant installation.
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\section{\label{chapter0:bmv2-diff}Diff based checksumming}
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% ok
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% ----------------------------------------------------------------------
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%\section{\label{chapter0:bmv2-diff}Diff based checksumming}
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For running the diff based checksum code, the following steps are
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necessary:
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Compiling the p4 code and starting the switch:
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\begin{verbatim}
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cd ~/master-thesis/p4app
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sudo p4run --config nat64-diff.json
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@ -100,9 +95,14 @@ sudo python ./controller.py --mode range_router
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% ----------------------------------------------------------------------
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\chapter{\label{appendixA}NetFPGA environment and tests}
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% ----------------------------------------------------------------------
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\section{\label{chapterA:netpfga-setup}NetFPGA Setup}
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Description of installation, commit of netpfga-live
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% ----------------------------------------------------------------------
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\section{\label{chapterA:netpfga:compile}NetFPGA Compile Flow}
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% ----------------------------------------------------------------------
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\section{\label{chapterA:section1}NetFPGA NAT64 Test cases}
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todo: add graphic of nsg <-> esprimo cabling
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\begin{verbatim}
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@ -131,8 +131,8 @@ For all test cases the following network settings on esprimo:
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inet6 fe80::faf2:1eff:fe09:62d1/64 scope link
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valid_lft forever preferred_lft forever
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\end{verbatim}
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\subsection{Test 1: IPv4 egress settings work}
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% ----------------------------------------------------------------------
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\subsection{Test 1: IPv4 egress}
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Scenario: simple egress port setting for the IPv4 addresses
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Step 1: getting correct values for table entries from python:
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@ -208,6 +208,7 @@ listening on enp2s0f0, link-type EN10MB (Ethernet), capture size 262144 bytes
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Result: sucess
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% ----------------------------------------------------------------------
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\subsection{Test 2: IPv6 egress}
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Similar to the IPv4 setting before, just for IPv6.
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@ -393,18 +394,12 @@ sudo ip -6 neighbor add 2001:db8:42::a00:2a lladdr f8:f2:1e:09:62:d0 dev enp2s0f
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Step 4: ping test should translate, but fail with wrong checksum:
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\begin{verbatim}
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\end{verbatim}
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\begin{verbatim}
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\end{verbatim}
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% ----------------------------------------------------------------------
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\chapter{\label{appendixB}NetFPGA Logs}
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Majority of the log files are stored inside the source code directory
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stored at ``netpfga/logs''. It follows a selection of log files
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stored at ``netpfga/logs''. It follows a selection of excerpts
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of log files that might be relevant for reproducing the work.
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% ----------------------------------------------------------------------
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\section{\label{chapterB:netpfga-flasherror}NetFPGA Flash Errors}
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Sometimes flashing bitfiles to the NetFPGA will fail. A random amount
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@ -458,6 +453,7 @@ nf3: ERROR while getting interface flags: No such device
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+ bash config_writes.sh
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\end{verbatim}
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% ----------------------------------------------------------------------
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\section{\label{chapterB:netpfga-flashok}NetFPGA Flash Success}
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A successful flashing process also emits a couple of errors, however
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@ -511,6 +507,7 @@ nf3: ERROR while getting interface flags: No such device
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+ bash config_writes.sh
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nico@nsg-System:~/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/bitfiles$
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\end{verbatim}
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% ----------------------------------------------------------------------
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\section{\label{chapterB:netpfga-kernelmodule}NetFPGA Kernel module}
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After a successful flash, loading the kernel module will enable nf
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@ -582,6 +579,7 @@ nico@nsg-System:~$ ip l
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nico@nsg-System:~$
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\end{verbatim}
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% ----------------------------------------------------------------------
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\section{\label{chapterB:netpfga-nftraffic}NetFPGA misses packets on nf*}
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While the nf devices appear in the operating system, packets emitted
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@ -591,6 +589,8 @@ that is connected to the specific output port.
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%---------------------------------------------------------------------------------------------------------
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\chapter{\label{benchmark}Benchmark Logs}
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% ----------------------------------------------------------------------
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\section{\label{benchmark:iperf}iperf}
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Omitting startup time
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@ -2369,7 +2369,6 @@ Describe your task.
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%---------------------------------------------------------------------------------------------------------
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\printnomenclature
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\abbrev{ARP}{Address resolution protocol}
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\abbrev{ASIC}{Application-specific integrated circuit}
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\abbrev{FGPA}{Field-programmable gate array}
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@ -4,7 +4,7 @@ graph G {
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x520_1 [ label="X520: IPv4" ];
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x520_2 [ label="X520: IPv6" ];
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x520_nsg [ label="X520: Controller" ];
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x520_nsg [ label="X520: P4 Controller" ];
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netpfga1 [ label="NetFPGA Port 1" ];
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netpfga2 [ label="NetFPGA Port 2" ];
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Binary file not shown.
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27
doc/graphviz/softwarenat64design.dot
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27
doc/graphviz/softwarenat64design.dot
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@ -0,0 +1,27 @@
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graph G {
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node [ shape="box"];
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rankdir="LR";
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x520_1 [ label="X520: IPv4" ];
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x520_2 [ label="X520: IPv6" ];
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x520_nsg_1 [ label="X520: IPv4" ];
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x520_nsg_2 [ label="X520: IPv6" ];
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subgraph cluster_esprimo {
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label="Load generator";
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x520_1;
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x520_2;
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}
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subgraph cluster_nsg {
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label="NAT64 Host";
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x520_nsg_1;
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x520_nsg_2;
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}
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x520_1--x520_nsg_1;
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x520_2--x520_nsg_2;
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}
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BIN
doc/graphviz/softwarenat64design.png
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BIN
doc/graphviz/softwarenat64design.png
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After Width: | Height: | Size: 8.2 KiB |
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@ -69,6 +69,11 @@
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title = {TAYGA - Simple, no-fuss NAT64 for Linux},
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howpublished = {\url{http://www.litech.org/tayga/}}}
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@Misc{mexico:_jool_open_sourc_siit_nat64_linux,
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author = {NIC Mexico},
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title = {Jool an Open Source SIIT and NAT64 for Linux.},
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howpublished = {\url{https://www.jool.mx/en/index.html}}}
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@Misc{vanbever:_progr_networ_data_planes,
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author = {Laurent Vanbever},
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title = {Programming Network Data Planes},
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@ -115,3 +120,8 @@
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title = {Solicited-node multicast address},
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howpublished = {\url{https://en.wikipedia.org/wiki/Solicited-node_multicast_address}},
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note = {Requested on 2019-08-13}}
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@Misc{schottelius:thesisrepo,
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author = {Nico Schottelius},
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title = {High speed NAT64 in P4 (git repository)},
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howpublished = {\url{https://gitlab.ethz.ch/nsg/student-projects/ma-2019-19_high_speed_nat64_with_p4}}}
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