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Signed-off-by: Nico Schottelius <nico@nico-notebook.schottelius.org>
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netfpga/minip4/sw/CLI/p4_regs_api.py
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netfpga/minip4/sw/CLI/p4_regs_api.py
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#!/usr/bin/env python
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#
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# Copyright (c) 2015 University of Cambridge
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# All rights reserved.
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#
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# This software was developed by Stanford University and the University of Cambridge Computer Laboratory
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# under National Science Foundation under Grant No. CNS-0855268,
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# the University of Cambridge Computer Laboratory under EPSRC INTERNET Project EP/H040536/1 and
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# by the University of Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249 ("MRC2"),
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# as part of the DARPA MRC research programme.
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#
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# @NETFPGA_LICENSE_HEADER_START@
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#
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# Licensed to NetFPGA C.I.C. (NetFPGA) under one or more contributor
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# license agreements. See the NOTICE file distributed with this work for
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# additional information regarding copyright ownership. NetFPGA licenses this
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# file to you under the NetFPGA Hardware-Software License, Version 1.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at:
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#
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# http://www.netfpga-cic.org
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#
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# Unless required by applicable law or agreed to in writing, Work distributed
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# under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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# CONDITIONS OF ANY KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations under the License.
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#
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# @NETFPGA_LICENSE_HEADER_END@
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#
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from NFTest import *
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import sys, os, re, json
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from fcntl import *
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from ctypes import *
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from collections import OrderedDict
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# Loading the SUME shared library
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print "loading libsume.."
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lib_path=os.path.join(os.environ['SUME_FOLDER'],'lib','sw','std','hwtestlib','libsume.so')
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libsume=cdll.LoadLibrary(lib_path)
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# argtypes for the functions called from C
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libsume.regread.argtypes = [c_uint]
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libsume.regwrite.argtypes= [c_uint, c_uint]
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EXTERN_DEFINES_FILE = os.path.expandvars("$P4_PROJECT_DIR/sw/CLI/SimpleSumeSwitch_extern_defines.json")
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ERROR_CODE = -1
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"""
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Read the SimpleSumeSwitch_reg_defines.txt file
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"""
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def read_extern_defines():
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with open(EXTERN_DEFINES_FILE) as f:
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p4_externs = json.load(f)
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return p4_externs
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def get_address(reg_name, index):
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global PX_EXTERNS
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if reg_name not in P4_EXTERNS.keys() and 'control_width' not in P4_EXTERNS[reg_name].keys() and P4_EXTERNS[reg_name]['control_width'] > 0:
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print >> sys.stderr, "ERROR: {0} is not a recognized register name".format(reg_name)
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return ERROR_CODE
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addressable_depth = 2**P4_EXTERNS[reg_name]['control_width']
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if index >= addressable_depth or index < 0:
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print >> sys.stderr, "ERROR: cannot access {0}[{1}], index out of bounds".format(reg_name, index)
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return ERROR_CODE
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return P4_EXTERNS[reg_name]['base_addr'] + index
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# P4_EXTERNS is indexed by prefix_name
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P4_EXTERNS = read_extern_defines()
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#####################
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### API Functions ###
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#####################
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def reg_read(reg_name, index):
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address = get_address(reg_name, index)
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if address == ERROR_CODE:
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return ERROR_CODE
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# print "reading address : {0}".format(hex(address))
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return libsume.regread(address)
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def reg_write(reg_name, index, val):
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address = get_address(reg_name, index)
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if address == ERROR_CODE:
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return ERROR_CODE
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# print "writing address : {0}".format(hex(address))
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return libsume.regwrite(address, val)
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