Browse Source

Make it more stupid - forget about tables

master
Nico Schottelius 3 years ago
parent
commit
53ce47a54e
  1. 5
      bin/gen_v4_table_test_entries.py
  2. 248
      doc/plan.org
  3. 5
      p4src/actions_nat64_generic.p4
  4. 17
      p4src/minip4_solution.p4
  5. 13
      p4src/netpfga.p4
  6. 46
      p4src/netpfga_nat64_stupid_hardcoded.p4

5
bin/gen_v4_table_test_entries.py

@ -6,5 +6,6 @@ for i in range(1,65):
addr = ipaddress.IPv4Address("10.0.0.{}".format(i))
ip_int = int(addr)
# print("table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port {} => 1 {} {} 0 0".format(ip_int, i, i))
print("table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port {} => {} {} 0 0 0".format(ip_int, i, i))
print("table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port {} => 1 {} {} 0 0".format(ip_int, i, i))
# print("table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port {} => {} {} 0 0 0".format(ip_int, i, i))
# print("table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port {} => {} {} {} 0 0".format(ip_int, i, i))

248
doc/plan.org

@ -7279,11 +7279,11 @@ nf_port_map = {
- esprimo either nf0 & nf1
- or esprimo nf2 & nf3
| port 0 | 1 | eth1@ nsg ?! likely: esprimo enp2s0f0 | |
| port 1 | 4 | likely: esprimo enp2s0f1 | |
| port 2 | 16 | not connected likely | |
| port 3 | 64 | eth1 @ nsg | PROBALY NOT, probably 1! |
| | | | |
| port 0 | 0b00000001 | 1 | eth1@ nsg ?! likely: esprimo enp2s0f0 | |
| port 1 | 0b00000100 | 4 | likely: esprimo enp2s0f1 | |
| port 2 | 0b00010000 | 16 | not connected likely | |
| port 3 | 0b01000000 | 64 | eth1 @ nsg | PROBALY NOT, probably 1! |
| | | | | |
*** DONE 2019-07-28: testing with port = 64 (first or last in theory): LAST! WORKS!
CLOSED: [2019-07-28 Sun 13:19]
@ -7464,8 +7464,8 @@ success
#+END_CENTER
*** TODO 2019-07-28: trying all ports with ipv4
*** DONE 2019-07-28: trying all ports with ipv4: no result from nmap -sP 10.0.0.1
CLOSED: [2019-07-28 Sun 19:01]
#+BEGIN_CENTER
[16:26] line:bin% python3 gen_v4_table_test_entries.py
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0
@ -7611,8 +7611,8 @@ table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772224 =>
also does not work/add packets
*** TODO 2019-07-28: Bit / byte order issues?
*** DONE 2019-07-28: Bit / byte order issues? -> not reacting
CLOSED: [2019-07-28 Sun 19:01]
#+BEGIN_CENTER
>> table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 16777226 => 1 1 1 0 0
fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)]
@ -7749,6 +7749,236 @@ nico@nsg-System:~$
#+END_CENTER
*** DONE 2019-07-28: compile time around 2.5h
CLOSED: [2019-07-28 Sun 19:37]
*** DONE 2019-07-28: direct loading works / no 2nd reboot necessary
CLOSED: [2019-07-28 Sun 19:50]
#+BEGIN_CENTER
nico@nsg-System:~/master-thesis$ ./bin/build-load-drivers.sh
+ cd /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0
+ sudo modprobe -r sume_riffa
+ make clean
make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 clean
make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic'
CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/.tmp_versions
CLEAN /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/Module.symvers
make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic'
+ make all
make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules
make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic'
CC [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.o
Building modules, stage 2.
MODPOST 1 modules
CC /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.mod.o
LD [M] /home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0/sume_riffa.ko
make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic'
+ sudo make install
make -C /lib/modules/4.15.0-55-generic/build M=/home/nico/projects/P4-NetFPGA/lib/sw/std/driver/sume_riffa_v1_0_0 modules
make[1]: Entering directory '/usr/src/linux-headers-4.15.0-55-generic'
Building modules, stage 2.
MODPOST 1 modules
make[1]: Leaving directory '/usr/src/linux-headers-4.15.0-55-generic'
install -o root -g root -m 0755 -d /lib/modules/4.15.0-55-generic/extra/sume_riffa/
install -o root -g root -m 0755 sume_riffa.ko /lib/modules/4.15.0-55-generic/extra/sume_riffa/
depmod -a 4.15.0-55-generic
+ sudo modprobe sume_riffa
+ lsmod
+ grep sume_riffa
sume_riffa 28672 0
nico@nsg-System:~/master-thesis$ ip l
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000
link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc pfifo_fast state UP mode DEFAULT group default qlen 1000
link/ether 74:d0:2b:98:38:f6 brd ff:ff:ff:ff:ff:ff
3: eth1: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether f8:f2:1e:41:44:9c brd ff:ff:ff:ff:ff:ff
4: eth2: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether f8:f2:1e:41:44:9d brd ff:ff:ff:ff:ff:ff
5: wg0: <POINTOPOINT,NOARP,UP,LOWER_UP> mtu 1420 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000
link/none
6: nf0: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether 02:53:55:4d:45:00 brd ff:ff:ff:ff:ff:ff
7: nf1: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether 02:53:55:4d:45:01 brd ff:ff:ff:ff:ff:ff
8: nf2: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether 02:53:55:4d:45:02 brd ff:ff:ff:ff:ff:ff
9: nf3: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000
link/ether 02:53:55:4d:45:03 brd ff:ff:ff:ff:ff:ff
nico@nsg-System:~/master-thesis$
#+END_CENTER
*** TODO 2019-07-28: v4_networks only test [v6.9]: set_egress_port(4) => does not exit anywhere; table for port1 does not work?
#+BEGIN_CENTER
>> list_cam_tables
----------------------
realmain_v4_networks_0 :
----------------------
{u'action_ids': {u'.NoAction': 6,
u'TopPipe.realmain.controller_debug': 3,
u'TopPipe.realmain.controller_debug_table_id': 5,
u'TopPipe.realmain.controller_reply': 4,
u'TopPipe.realmain.set_egress_port': 1,
u'TopPipe.realmain.set_egress_port_and_mac': 2},
u'annotations': {u'Xilinx_ExternallyConnected': [u'0'],
u'Xilinx_LookupEngineType': [u'EM'],
u'name': [u'TopPipe.realmain.v4_networks']},
u'match_type': u'EM',
u'p4_name': u'realmain_v4_networks_0',
u'px_class': u'LookupEngine',
u'px_name': u'realmain_v4_networks_0',
u'px_type_name': u'realmain_v4_networks_0_t',
u'request_fields': [{u'p4_name': u'hdr.ipv4.dst_addr',
u'px_name': u'lookup_request_key',
u'size': 32,
u'type': u'bits'}],
u'response_fields': [{u'px_name': u'hit', u'size': 1, u'type': u'bits'},
{u'px_name': u'action_run',
u'size': 3,
u'type': u'bits'},
{u'fields': [{u'px_name': u'out_port',
u'size': 8,
u'type': u'bits'}],
u'p4_action': u'TopPipe.realmain.set_egress_port',
u'px_name': u'realmain_set_egress_port',
u'type': u'struct'},
{u'fields': [{u'px_name': u'out_port',
u'size': 8,
u'type': u'bits'},
{u'px_name': u'mac_addr',
u'size': 48,
u'type': u'bits'}],
u'p4_action': u'TopPipe.realmain.set_egress_port_and_mac',
u'px_name': u'realmain_set_egress_port_and_mac',
u'type': u'struct'},
{u'fields': [{u'px_name': u'task',
u'size': 16,
u'type': u'bits'}],
u'p4_action': u'TopPipe.realmain.controller_reply',
u'px_name': u'realmain_controller_reply',
u'type': u'struct'},
{u'fields': [{u'px_name': u'table_id',
u'size': 16,
u'type': u'bits'}],
u'p4_action': u'TopPipe.realmain.controller_debug_table_id',
u'px_name': u'realmain_controller_debug_table_id',
u'type': u'struct'}]}
>>
#+END_CENTER
Adding rule for port1:
#+BEGIN_CENTER
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0
nico@ESPRIMO-P956:~$ sudo ip neighbor add 10.0.0.1 lladdr f8:f2:1e:41:44:9c dev enp2s0f0
nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip addr add 10.0.0.200/24 dev enp2s0f1
nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor del 10.0.0.1 dev enp2s0f1
nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor del 10.0.0.1 dev enp2s0f0
nico@ESPRIMO-P956:~/master-thesis/bin$ sudo ip neighbor add 10.0.0.1 lladdr f8:f2:1e:41:44:9c dev enp2s0f0
!
#+END_CENTER
Trying all 64 possibilities:
#+BEGIN_CENTER
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772161 => 1 1 1 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772162 => 1 2 2 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772163 => 1 3 3 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772164 => 1 4 4 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772165 => 1 5 5 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772166 => 1 6 6 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772167 => 1 7 7 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772168 => 1 8 8 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772169 => 1 9 9 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772170 => 1 10 10 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772171 => 1 11 11 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772172 => 1 12 12 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772173 => 1 13 13 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772174 => 1 14 14 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772175 => 1 15 15 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772176 => 1 16 16 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772177 => 1 17 17 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772178 => 1 18 18 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772179 => 1 19 19 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772180 => 1 20 20 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772181 => 1 21 21 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772182 => 1 22 22 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772183 => 1 23 23 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772184 => 1 24 24 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772185 => 1 25 25 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772186 => 1 26 26 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772187 => 1 27 27 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772188 => 1 28 28 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772189 => 1 29 29 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772190 => 1 30 30 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772191 => 1 31 31 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772192 => 1 32 32 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772193 => 1 33 33 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772194 => 1 34 34 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772195 => 1 35 35 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772196 => 1 36 36 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772197 => 1 37 37 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772198 => 1 38 38 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772199 => 1 39 39 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772200 => 1 40 40 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772201 => 1 41 41 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772202 => 1 42 42 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772203 => 1 43 43 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772204 => 1 44 44 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772205 => 1 45 45 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772206 => 1 46 46 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772207 => 1 47 47 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772208 => 1 48 48 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772209 => 1 49 49 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772210 => 1 50 50 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772211 => 1 51 51 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772212 => 1 52 52 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772213 => 1 53 53 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772214 => 1 54 54 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772215 => 1 55 55 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772216 => 1 56 56 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772217 => 1 57 57 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772218 => 1 58 58 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772219 => 1 59 59 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772220 => 1 60 60 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772221 => 1 61 61 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772222 => 1 62 62 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772223 => 1 63 63 0 0
table_cam_add_entry realmain_v4_networks_0 realmain.set_egress_port 167772224 => 1 64 64 0 0
#+END_CENTER
nmap -sP does not show any packet on any other device:
#+BEGIN_CENTER
nico@ESPRIMO-P956:~/master-thesis/bin$ nmap -sP 10.0.0.0/24
Starting Nmap 7.01 ( https://nmap.org ) at 2019-07-28 20:00 CEST
Nmap scan report for ict-networks-010-000-000-200.fwd-v4.ethz.ch (10.0.0.200)
Host is up (0.00014s latency).
Nmap done: 256 IP addresses (1 host up) scanned in 23.56 seconds
nico@ESPRIMO-P956:~/master-thesis/bin$
20:00:35.114277 IP 10.0.0.200.44382 > 10.0.0.12.443: Flags [S], seq 1173914110, win 29200, options [mss 1460,sackOK,TS val 4138
412163 ecr 0,nop,wscale 7], length 0
20:00:35.114327 IP 10.0.0.200.34958 > 10.0.0.26.443: Flags [S], seq 3327394542, win 29200, options [mss 1460,sackOK,TS val 3323
367618 ecr 0,nop,wscale 7], length 0
#+END_CENTER
packets are going out though.
Also trying with ping:
#+BEGIN_CENTER
nico@ESPRIMO-P956:~/master-thesis/bin$ for i in $(seq 1 64); do (ping -c1 10.0.0.$i & ); done
#+END_CENTER
** The NetPFGA saga
Problems encountered:
- The logfile for a compile run is 10k+ lines

5
p4src/actions_nat64_generic.p4

@ -128,8 +128,8 @@ action nat46_icmp_generic()
hdr.icmp.setInvalid();
}
/* NAT46: protocol unspecific changes */
action nat46_generic(ipv6_addr_t src, ipv6_addr_t dst) {
/* NAT46: protocol unspecific changes */
action nat46_generic(ipv6_addr_t src, ipv6_addr_t dst) {
hdr.ipv6.setValid();
hdr.ipv4.setInvalid();
@ -171,7 +171,6 @@ action nat46_icmp_generic()
NoAction;
}
size = NAT64_TABLE_SIZE;
// default_action = controller_debug_table_id(TABLE_NAT64);
default_action = NoAction;
}

17
p4src/minip4_solution.p4

@ -58,20 +58,17 @@ control RealMain(
#include "actions_egress.p4"
#include "actions_delta_checksum.p4"
#include "netpfga_dummy.p4"
apply {
bit<17> tmp17 = 0;
bool apply_v4networks = true;
bool apply_v6networks = true;
// #include "netpfga_nat64.p4"
// if(apply_v4networks == true) {
v4_networks.apply();
// }
/* does not compile without a table - give it a table */
dummy_table_for_netpfga.apply();
// if(apply_v6networks == true) {
// v6_networks.apply();
// }
/* continue without tables */
#include "netpfga_nat64_stupid_hardcoded.p4"
}
}

13
p4src/netpfga.p4

@ -1,14 +1,6 @@
#ifndef DUMMY_NETPFGA
#define DUMMY_NETPFGA
action do_nothing() {
;
}
action send_to_port(port_t port) {
sume_metadata.dst_port = port;
}
action send_to_port1() {
sume_metadata.dst_port = 1;
}
@ -19,12 +11,9 @@ table dummy_table_for_netpfga {
}
actions = {
do_nothing;
send_to_port1;
send_to_port;
}
size = TEST_TABLE_SIZE;
// default_action = do_nothing;
size = 64;
default_action = send_to_port1;
}

46
p4src/netpfga_nat64_stupid_hardcoded.p4

@ -0,0 +1,46 @@
port_t v6_out = 64;
port_t v4_out = 16;
/* nat64 */
/*
>>> int(ipaddress.IPv4Address("10.0.0.0"))
167772160
>>> int(ipaddress.IPv6Address("2001:db8:42::"))
42540766411362381960998550477184434176
*/
ipv6_addr_t v6_src = 42540766411362381960998550477184434176; /* 2001:db8:42:: -> v6 source range*/
ipv6_addr_t v6_dst = 42540766411362381960998550477184434176; /* 2001:db8:42:: -> v6 source range*/
ipv6_addr_t nat64_prefix = 42540766411362381960998550477184434176; /* 2001:db8:42:: -> v6 destination range */
ipv4_addr_t v4_dst = 167772160; /* 10.0.0.0 -> v4 destination range */
/* if it is ipv6, we always translate to IPv4 and output on v4_out */
if(hdr.ipv6.isValid()) {
nat64_static(v6_src, v4_dst, nat64_prefix);
if(hdr.udp.isValid()) {
delta_udp_from_v6_to_v4
}
if(hdr.tcp.isValid()) {
delta_tcp_from_v6_to_v4
}
set_egress_port(v4_out);
} else if(hdr.ipv4.isValid()) {
nat46_static(v6_dst, v4_dst, nat64_prefix);
if(hdr.udp.isValid()) {
delta_udp_from_v4_to_v6
}
if(hdr.tcp.isValid()) {
delta_tcp_from_v4_to_v6
}
set_egress_port(v6_out);
} else {
set_egress_port(1);
}
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