begin to integrate headers of real code into netpfga
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5 changed files with 133 additions and 10 deletions
10
doc/plan.org
10
doc/plan.org
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@ -1422,6 +1422,9 @@ Please make sure that it is installed and available in your $PATH:
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** TODO Setup test VM [dual stack] for Jool:
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** TODO Setup test VM [dual stack] for tayga:
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** TODO Port to Hardware
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*** NetPFGA documentation
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**** Port mapping
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| 1 | nf0 |
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*** DONE Get access to tofino: no, NDA issues
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*** DONE Get NetFPGA running
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**** DONE Understand the simulations part -> not atm
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@ -2893,9 +2896,10 @@ SimpleSumeSwitch(
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) main;
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**** Understand the different switch models (?)
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*** TODO Get ANY p4 program to successfully run on netpfga
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**** sending data to switch port 1
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***** figuring out which port 1
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**** TODO mirroring ethernet
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***** no packets seen on source interface
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**** TODO sending data to switch port 1
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***** figuring out which is port 1: nf0
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expected
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actual
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1
netpfga/minip4/src/headers.p4
Symbolic link
1
netpfga/minip4/src/headers.p4
Symbolic link
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@ -0,0 +1 @@
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../../../p4src/headers.p4
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119
netpfga/minip4/src/nat64_for_netpfga.p4
Normal file
119
netpfga/minip4/src/nat64_for_netpfga.p4
Normal file
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@ -0,0 +1,119 @@
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#include <core.p4>
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#include <sume_switch.p4>
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#include "headers.p4"
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/********************************************************************************
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* Header
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*/
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typedef bit<48> EthAddr_t;
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header Ethernet_h {
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EthAddr_t dstAddr;
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EthAddr_t srcAddr;
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bit<16> etherType;
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}
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struct Parsed_packet {
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Ethernet_h ethernet;
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}
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// user defined metadata: can be used to share information between
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// TopParser, TopPipe, and TopDeparser
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struct user_metadata_t {
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bit<8> unused;
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}
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// digest_data, MUST be 256 bits -- what is this used for?
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struct digest_data_t {
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bit<256> unused;
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}
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/********************************************************************************
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* Parser
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*/
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@Xilinx_MaxPacketRegion(1024)
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parser TopParser(packet_in b,
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out Parsed_packet p,
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out user_metadata_t user_metadata,
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out digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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state start {
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b.extract(p.ethernet);
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user_metadata.unused = 0;
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digest_data.unused = 0;
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transition accept;
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}
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}
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/********************************************************************************
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* Main
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*/
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control TopPipe(inout Parsed_packet p,
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inout user_metadata_t user_metadata,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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action swap_eth_addresses() {
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EthAddr_t temp = p.ethernet.dstAddr;
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p.ethernet.dstAddr = p.ethernet.srcAddr;
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p.ethernet.srcAddr = temp;
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/* set egress port */
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sume_metadata.dst_port = sume_metadata.src_port;
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}
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action send_to_port1() {
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sume_metadata.dst_port = 1;
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}
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action do_nothing() {
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EthAddr_t temp = p.ethernet.dstAddr;
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}
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table lookup_table {
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key = {
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p.ethernet.dstAddr: exact;
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}
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actions = {
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swap_eth_addresses;
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do_nothing;
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send_to_port1;
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}
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size = 64;
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// default_action = swap_eth_addresses;
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default_action = send_to_port1;
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}
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apply {
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lookup_table.apply();
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}
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}
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/********************************************************************************
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* Deparser
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*/
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@Xilinx_MaxPacketRegion(1024)
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control TopDeparser(packet_out b,
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in Parsed_packet p,
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in user_metadata_t user_metadata,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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apply {
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b.emit(p.ethernet);
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}
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}
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/********************************************************************************
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* Switch
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*/
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SimpleSumeSwitch(
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TopParser(),
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TopPipe(),
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TopDeparser()
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) main;
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@ -3,7 +3,6 @@
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#define HEADERS_P4
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#include <core.p4>
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#include <v1model.p4>
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/**************************************** types ****************************************/
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@ -631,10 +631,10 @@ control MyEgress(inout headers hdr,
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*************************************************************************/
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V1Switch(
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MyParser(),
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MyVerifyChecksum(),
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MyIngress(),
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MyEgress(),
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MyComputeChecksum(),
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MyDeparser()
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MyParser(),
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MyVerifyChecksum(),
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MyIngress(),
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MyEgress(),
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MyComputeChecksum(),
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MyDeparser()
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) main;
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