begin to integrate headers of real code into netpfga

This commit is contained in:
Nico Schottelius 2019-06-03 22:33:37 +02:00
commit 63ec17b9a4
5 changed files with 133 additions and 10 deletions

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@ -1422,6 +1422,9 @@ Please make sure that it is installed and available in your $PATH:
** TODO Setup test VM [dual stack] for Jool:
** TODO Setup test VM [dual stack] for tayga:
** TODO Port to Hardware
*** NetPFGA documentation
**** Port mapping
| 1 | nf0 |
*** DONE Get access to tofino: no, NDA issues
*** DONE Get NetFPGA running
**** DONE Understand the simulations part -> not atm
@ -2893,9 +2896,10 @@ SimpleSumeSwitch(
) main;
**** Understand the different switch models (?)
*** TODO Get ANY p4 program to successfully run on netpfga
**** sending data to switch port 1
***** figuring out which port 1
**** TODO mirroring ethernet
***** no packets seen on source interface
**** TODO sending data to switch port 1
***** figuring out which is port 1: nf0
expected
actual