nico/master-thesis
1
0
Fork 0
Code Issues Pull requests Projects Releases Wiki Activity

Adjust both solutions to be more similar

Browse source 
minip4_solution and minip4_solution-mirror are now the same besides
variable renaming.
This commit is contained in:
Nico Schottelius 2019-07-23 23:20:41 +02:00
parent 6b2379b5b9
commit 7ab4510c36
2 changed files with 123 additions and 134 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

40
p4src/minip4_solution-mirror.p4
View file

@ -2,10 +2,6 @@
#include <sume_switch.p4>
#include "headers.p4"
/********************************************************************************
* Header
*/
typedef bit<48> EthAddr_t;
header Ethernet_h {
EthAddr_t dstAddr;
@ -28,17 +24,18 @@ struct digest_data_t {
bit<256> unused;
}
/********************************************************************************
* Parser
*/
@Xilinx_MaxPacketRegion(1024)
parser TopParser(packet_in b,
out Parsed_packet p,
out user_metadata_t user_metadata,
out digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
parser TopParser(
packet_in b,
out Parsed_packet p,
out user_metadata_t user_metadata,
out digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
state start {
b.extract(p.ethernet);
user_metadata.unused = 0;
@ -51,10 +48,11 @@ parser TopParser(packet_in b,
/********************************************************************************
* Main
*/
control TopPipe(inout Parsed_packet p,
inout user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
control TopPipe(
inout Parsed_packet p,
inout user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
action swap_eth_addresses() {
EthAddr_t temp = p.ethernet.dstAddr;
@ -97,9 +95,7 @@ control TopPipe(inout Parsed_packet p,
send_to_all_ports;
}
size = 64;
// default_action = swap_eth_addresses; // test_mirror(): in gen_testdata.py
default_action = send_to_port1; // test_port1()
// default_action = send_to_all_ports; // test_allports():
}
apply {
@ -112,11 +108,13 @@ control TopPipe(inout Parsed_packet p,
*/
@Xilinx_MaxPacketRegion(1024)
control TopDeparser(packet_out b,
in Parsed_packet p,
in user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
control TopDeparser(
packet_out b,
in Parsed_packet p,
in user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
apply {
b.emit(p.ethernet);
}

217
p4src/minip4_solution.p4
View file

@ -2,16 +2,6 @@
#include <sume_switch.p4>
#include "headers.p4"
/********************************************************************************
* Features
*/
// #define ENABLE_CONTROLLER 1
/********************************************************************************
* Header
*/
typedef bit<48> EthAddr_t;
header Ethernet_h {
EthAddr_t dst_addr;
@ -34,43 +24,124 @@ struct digest_data_t {
bit<256> unused;
}
/********************************************************************************
* Parser
*/
@Xilinx_MaxPacketRegion(1024)
parser TopParser(packet_in packet,
// out headers hdr,
parser TopParser(
packet_in packet,
out Parsed_packet hdr,
// out metadata meta,
out user_metadata_t user_metadata,
out digest_data_t digest_data,
inout sume_metadata_t standard_metadata) {
out user_metadata_t user_metadata,
out digest_data_t digest_data,
inout sume_metadata_t standard_metadata) {
state start {
packet.extract(hdr.ethernet);
user_metadata.unused = 0;
//meta.task = 0; // all others missing
digest_data.unused = 0;
transition accept;
}
// #include "parsers.p4"
}
/********************************************************************************
* Main
*/
control TopPipe(
inout Parsed_packet hdr,
*/
control TopPipe(
inout Parsed_packet hdr,
inout user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
action swap_eth_addresses() {
EthAddr_t temp = hdr.ethernet.dst_addr;
hdr.ethernet.dst_addr = hdr.ethernet.src_addr;
hdr.ethernet.src_addr = temp;
/* set egress port */
sume_metadata.dst_port = sume_metadata.src_port;
}
action send_to_port1() {
sume_metadata.dst_port = 1;
}
action send_to_all_ports() {
/* Taken from commands.txt of the "int" project:
table_cam_add_entry forward set_output_port 0xffffffffffff => 0b01010101
python convert:
>>> 0b01010101
85
*/
sume_metadata.dst_port = 85;
}
action do_nothing() {
EthAddr_t temp = hdr.ethernet.dst_addr;
}
table lookup_table {
key = {
hdr.ethernet.dst_addr: exact;
}
actions = {
swap_eth_addresses;
do_nothing;
send_to_port1;
send_to_all_ports;
}
size = 64;
default_action = send_to_port1; // test_port1()
}
apply {
lookup_table.apply();
}
}
/********************************************************************************
* Deparser
*/
@Xilinx_MaxPacketRegion(1024)
control TopDeparser(
packet_out packet,
in Parsed_packet hdr,
in user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
apply {
packet.emit(hdr.ethernet);
}
}
/********************************************************************************
* Switch
*/
SimpleSumeSwitch(
TopParser(),
TopPipe(),
TopDeparser()
) main;
// in headers hdr,
//in metadata meta,
// out headers hdr,
// out metadata meta,
//meta.task = 0; // all others missing
// #include "parsers.p4"
// inout headers hdr,
//inout metadata meta,
inout user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
// actions to be enabled
// #include "actions_nat64_generic.p4" // includes controller & delta checksum
@ -161,96 +232,16 @@ parser TopParser(packet_in packet,
// }
action swap_eth_addresses() {
EthAddr_t temp = hdr.ethernet.dst_addr;
hdr.ethernet.dst_addr = hdr.ethernet.src_addr;
hdr.ethernet.src_addr = temp;
/* set egress port */
sume_metadata.dst_port = sume_metadata.src_port;
}
action send_to_port1() {
sume_metadata.dst_port = 1;
}
// action send_testdata_to_port1() {
// // python: MAC2 = "08:22:22:22:22:08"
// if(hdr.ethernet.dst_addr == 0x082222222208) {
// sume_metadata.dst_port = 1;
// }
// }
action send_to_all_ports() {
/* Taken from commands.txt of the "int" project:
table_cam_add_entry forward set_output_port 0xffffffffffff => 0b01010101
python convert:
>>> 0b01010101
85
*/
sume_metadata.dst_port = 85;
}
action do_nothing() {
EthAddr_t temp = hdr.ethernet.dst_addr;
}
#ifdef ENABLE_CONTROLLER
#include "actions_controller.p4"
#endif
table lookup_table {
key = {
hdr.ethernet.dst_addr: exact;
}
actions = {
#ifdef ENABLE_CONTROLLER
controller_debug;
#endif
swap_eth_addresses;
do_nothing;
send_to_port1;
send_to_all_ports;
}
size = 64;
default_action = send_to_port1; // test_port1()
}
apply {
lookup_table.apply();
}
}
/********************************************************************************
* Deparser
*/
@Xilinx_MaxPacketRegion(1024)
control TopDeparser(
packet_out packet,
// in headers hdr,
in Parsed_packet hdr,
in user_metadata_t user_metadata,
//in metadata meta,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
apply {
packet.emit(hdr.ethernet);
}
//#ifdef ENABLE_CONTROLLER
// #include "actions_controller.p4"
//#endif
// #ifdef ENABLE_CONTROLLER
// controller_debug;
// #endif
// #include "deparser.p4"
}
/********************************************************************************
* Switch
*/
SimpleSumeSwitch(
TopParser(),
TopPipe(),
TopDeparser()
) main;