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port controller sending code partially to netpfga

This commit is contained in:
Nico Schottelius 2019-06-24 14:24:51 +02:00
parent ba9678fcfe
commit 80aeaf164a
2 changed files with 45 additions and 14 deletions
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2
doc/plan.org
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@ -4879,6 +4879,8 @@ actual (tlast, tkeep, tdata) = (0, ffffffff, 000000000000000080fe403b0a0000000
#+END_CENTER
*** 2019-06-24: find out how the expected/actual packet lines are generated
- afair: indirectly by running gen_testdata.py -> replace script
with port1
** References / Follow up
*** RFC 791 IPv4 https://tools.ietf.org/html/rfc791
*** RFC 792 ICMP https://tools.ietf.org/html/rfc792

57
netpfga/minip4/src/minip4_solution-nat64.p4
View File

@ -7,8 +7,30 @@
* Possible bugs / things to fix:
- Does NoAction exist?
- Aligment of "meta"
- replace metadate with our own
- Aligment of "meta" / replace metadate with our own
- what does sume_metadata contain? ingress port is where?
nico@nsg-System:~$ find . -name sume_switch.p4
./master-thesis/support/semester-thesis-1/project/SSS_example_2_SS/bitsnpices/sume_switch.p4
nico@nsg-System:~$
// one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
typedef bit<8> port_t;
/* standard sume switch metadata */
struct sume_metadata_t {
bit<16> dma_q_size; // measured in 32-byte words
bit<16> nf3_q_size; // measured in 32-byte words
bit<16> nf2_q_size; // measured in 32-byte words
bit<16> nf1_q_size; // measured in 32-byte words
bit<16> nf0_q_size; // measured in 32-byte words
bit<8> send_dig_to_cpu; // send digest_data to CPU
bit<8> drop;
port_t dst_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
port_t src_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
bit<16> pkt_len; // unsigned int
}
*/
@ -99,20 +121,27 @@ control TopPipe(inout Parsed_packet hdr,
set_egress_port(out_port);
}
// action controller_reply(task_t task) {
// meta.task = task;
// meta.ingress_port = standard_metadata.ingress_port;
// clone3(CloneType.I2E, 100, meta);
// }
action controller_reply(task_t task) {
meta.task = task;
#ifdef _SUME_SWITCH_P4_
meta.ingress_port = sume_metadata.src_port;
// action controller_debug_table_id(table_t table_id) {
// meta.table_id = table_id;
// controller_reply(TASK_DEBUG);
// }
/* FIXME: send to controller somehow -> port? */
#else
meta.ingress_port = standard_metadata.ingress_port;
clone3(CloneType.I2E, 100, meta);
#endif
}
action controller_debug_table_id(table_t table_id) {
meta.table_id = table_id;
controller_reply(TASK_DEBUG);
}
action controller_debug() {
controller_reply(TASK_DEBUG);
}
// action controller_debug() {
// controller_reply(TASK_DEBUG);
// }
// action multicast_pkg(mcast_t mcast_grp) { /* Output PKG on correct ports (plural) */
// standard_metadata.mcast_grp = mcast_grp;