++log ++change gen_testdata.py

This commit is contained in:
Nico Schottelius 2019-07-13 19:10:05 +02:00
parent 7599ebb89d
commit c243778bc3
2 changed files with 69 additions and 4 deletions

View File

@ -5152,6 +5152,56 @@ nf2_applied times: []
nf3_applied times: []
#+END_CENTER
*** 2019-07-13: changing/fix testdata
Still impl_1 error:
#+BEGIN_CENTER
export simple_sume_switch project to SDK
****** Vivado v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
**** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
source tcl/export_hardware.tcl
# set design [lindex $argv 0]
# puts "\nOpening $design XPR project\n"
Opening simple_sume_switch XPR project
# open_project project/$design.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/ip_repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue.
open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1364.328 ; gain = 187.594 ; free physical = 10371 ; free virtual = 15665
# puts "\nOpening $design Implementation design\n"
Opening simple_sume_switch Implementation design
# open_run impl_1
ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open
Vivado%
─────────────────────────────────────────────────────────────────────────
#+END_CENTER
Command generating *THIS* error:
#+BEGIN_CENTER
nico 25855 0.0 0.0 4508 1680 pts/10 S+ 17:28 0:00 | \_ /bin/sh ./do-all-steps.sh
nico 29005 0.0 0.0 9988 2516 pts/10 S+ 17:32 0:00 | | \_ make
nico 6363 0.0 0.0 9988 2536 pts/10 S+ 18:24 0:00 | | \_ make -C hw export_to_sdk
nico 6399 0.0 0.0 4508 708 pts/10 S+ 18:24 0:00 | | \_ /bin/sh -c if test -d project; then\ ?echo "export simple_sume_switch project to SDK"; \ ?vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch;\ e
lse \ ?echo "Project simple_sume_switch does not exist.";\ ?echo "Please run \"make project\" to create and build the project first";\ fi;\ nico 6400 0.0 0.0 12948 3368 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
nico 6424 0.0 0.0 12944 3132 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/loader -exec vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
nico 6440 0.4 4.0 1397068 643640 pts/10 Sl+ 18:24 0:11 | | \_ /opt/Xilinx/Vivado/2018.2/bin/unwrapped/lnx64.o/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
#+END_CENTER
**** go through all steps again and try to understand why it (silently) fails later
*** 2019-07-13: fix overflow error
** References / Follow up

View File

@ -103,20 +103,35 @@ lookup_table = {
def test_port1():
""" packets for a certain mac always go to nf0 """
pktCnt = 0
# First ethernet
pktCnt += 1
pkt = Ether(dst=MAC2, src=MAC1)
pkt = pad_pkt(pkt, 64)
# Send on nf0
pktCnt += 1
applyPkt(pkt, 'nf0', pktCnt)
pktCnt += 1
# Receive on nf0
expPkt(pkt, 'nf0')
# Send on nf1
pktCnt += 1
applyPkt(pkt, 'nf1', pktCnt)
# Receive on nf0
expPkt(pkt, 'nf0')
# Send on nf2
pktCnt += 1
applyPkt(pkt, 'nf2', pktCnt)
# Receive on nf0
expPkt(pkt, 'nf0')
# Send on nf3
pktCnt += 1
applyPkt(pkt, 'nf2', pktCnt)
# Receive on nf0
expPkt(pkt, 'nf0')
# Test that packets are being mirrored