++log ++change gen_testdata.py
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@ -5152,6 +5152,56 @@ nf2_applied times: []
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nf3_applied times: []
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#+END_CENTER
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*** 2019-07-13: changing/fix testdata
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Still impl_1 error:
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#+BEGIN_CENTER
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export simple_sume_switch project to SDK
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****** Vivado v2018.2 (64-bit)
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**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
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**** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
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** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
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source tcl/export_hardware.tcl
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# set design [lindex $argv 0]
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# puts "\nOpening $design XPR project\n"
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Opening simple_sume_switch XPR project
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# open_project project/$design.xpr
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Scanning sources...
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Finished scanning sources
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INFO: [IP_Flow 19-234] Refreshing IP repositories
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INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/ip_repo'.
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INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
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WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue.
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WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/master-thesis/netpfga/minip4/simple_sume_switch/hw/.Xil/Vivado-29136-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue.
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open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1364.328 ; gain = 187.594 ; free physical = 10371 ; free virtual = 15665
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# puts "\nOpening $design Implementation design\n"
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Opening simple_sume_switch Implementation design
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# open_run impl_1
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ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open
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Vivado%
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─────────────────────────────────────────────────────────────────────────
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#+END_CENTER
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Command generating *THIS* error:
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#+BEGIN_CENTER
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nico 25855 0.0 0.0 4508 1680 pts/10 S+ 17:28 0:00 | \_ /bin/sh ./do-all-steps.sh
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nico 29005 0.0 0.0 9988 2516 pts/10 S+ 17:32 0:00 | | \_ make
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nico 6363 0.0 0.0 9988 2536 pts/10 S+ 18:24 0:00 | | \_ make -C hw export_to_sdk
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nico 6399 0.0 0.0 4508 708 pts/10 S+ 18:24 0:00 | | \_ /bin/sh -c if test -d project; then\ ?echo "export simple_sume_switch project to SDK"; \ ?vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch;\ e
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lse \ ?echo "Project simple_sume_switch does not exist.";\ ?echo "Please run \"make project\" to create and build the project first";\ fi;\ nico 6400 0.0 0.0 12948 3368 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
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nico 6424 0.0 0.0 12944 3132 pts/10 S+ 18:24 0:00 | | \_ /bin/bash /opt/Xilinx/Vivado/2018.2/bin/loader -exec vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
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nico 6440 0.4 4.0 1397068 643640 pts/10 Sl+ 18:24 0:11 | | \_ /opt/Xilinx/Vivado/2018.2/bin/unwrapped/lnx64.o/vivado -mode tcl -source tcl/export_hardware.tcl -tclargs simple_sume_switch
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#+END_CENTER
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**** go through all steps again and try to understand why it (silently) fails later
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*** 2019-07-13: fix overflow error
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** References / Follow up
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@ -103,20 +103,35 @@ lookup_table = {
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def test_port1():
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""" packets for a certain mac always go to nf0 """
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pktCnt = 0
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# First ethernet
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pktCnt += 1
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pkt = Ether(dst=MAC2, src=MAC1)
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pkt = pad_pkt(pkt, 64)
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# Send on nf0
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pktCnt += 1
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applyPkt(pkt, 'nf0', pktCnt)
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pktCnt += 1
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# Receive on nf0
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expPkt(pkt, 'nf0')
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# Send on nf1
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pktCnt += 1
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applyPkt(pkt, 'nf1', pktCnt)
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# Receive on nf0
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expPkt(pkt, 'nf0')
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# Send on nf2
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pktCnt += 1
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applyPkt(pkt, 'nf2', pktCnt)
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# Receive on nf0
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expPkt(pkt, 'nf0')
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# Send on nf3
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pktCnt += 1
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applyPkt(pkt, 'nf2', pktCnt)
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# Receive on nf0
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expPkt(pkt, 'nf0')
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# Test that packets are being mirrored
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