++notes

doc/plan.org

@@ -7208,6 +7208,63 @@ IOError: [Errno 2] No such file or directory: '/home/nico/projects/P4-NetFPGA/co
 nico@nsg-System:~/master-thesis/netpfga/minip4/sw/CLI$
 
 #+END_CENTER
+*** TODO 2019-07-28: setting ipv6 neighbor entries
+#+BEGIN_CENTER
+
+nico@ESPRIMO-P956:~/master-thesis$ ./netpfga/set_ipv6_neighbour.sh
++ seq 1 8
++ sudo ip -6 neighbor add 2001:db8:42::1 lladdr 02:53:55:4d:45:01 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::2 lladdr 02:53:55:4d:45:02 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::3 lladdr 02:53:55:4d:45:03 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::4 lladdr 02:53:55:4d:45:04 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::5 lladdr 02:53:55:4d:45:05 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::6 lladdr 02:53:55:4d:45:06 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::7 lladdr 02:53:55:4d:45:07 dev enp2s0f1
++ sudo ip -6 neighbor add 2001:db8:42::8 lladdr 02:53:55:4d:45:08 dev enp2s0f1
+nico@ESPRIMO-P956:~/master-thesis$
+
+#+END_CENTER
+*** DONE 2019-07-28: setting all table entries for port 1..8: done
+    CLOSED: [2019-07-28 Sun 12:06]
+#+BEGIN_CENTER
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434177 => 1 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434178 => 2 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434179 => 3 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434180 => 4 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434181 => 5 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434182 => 6 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434183 => 7 0 0 0 0
+table_cam_add_entry realmain_v6_networks_0 realmain.set_egress_port 42540766411362381960998550477184434184 => 8 0 0 0 0
+
+
+#+END_CENTER
+
+Output of the last one:
+
+
+#+BEGIN_CENTER
+fields = [(u'hit', 1), (u'action_run', 3), (u'out_port', 8), (u'out_port', 8), (u'mac_addr', 48), (u'task', 16), (u'table_id', 16)]
+action_name = TopPipe.realmain.set_egress_port
+field_vals = [1, '8', '0', '0', '0', '0']
+CAM_Init_ValidateContext() - done
+WROTE 0x44020350 = 0x0008
+WROTE 0x44020354 = 0x0000
+WROTE 0x44020358 = 0x420000
+WROTE 0x4402035c = 0x20010db8
+WROTE 0x44020380 = 0x0000
+WROTE 0x44020384 = 0x0000
+WROTE 0x44020388 = 0x8000000
+WROTE 0x4402038c = 0x0001
+READ  0x44020344 = 0x0001
+WROTE 0x44020340 = 0x0001
+READ  0x44020344 = 0x0001
+READ  0x44020344 = 0x0001
+success
+
+#+END_CENTER
+
+*** TODO 2019-07-28: ping6 test for getting packet: failure
+
 ** The NetPFGA saga
 Problems encountered:
 - The logfile for a compile run is 10k+ lines