28 changed files with 30909 additions and 62 deletions
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+ date |
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Mit Jul 24 22:58:06 CEST 2019 |
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+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
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+ make |
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make -C src/ clean |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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make -C testdata/ clean |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
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rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
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rm -rf nf_sume_sdnet_ip/ |
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rm -f |
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rm -f sw/config_tables.c |
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make -C src/ |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
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actions_egress.p4(52): warning: Table v6_networks is not used; removing |
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table v6_networks { |
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^^^^^^^^^^^ |
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actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
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table nat46 { |
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^^^^^ |
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minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
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out metadata meta, |
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^^^^ |
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minip4_solution.p4(39) |
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parser RealParser( |
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^^^^^^^^^^ |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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make -C testdata/ |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
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./gen_testdata.py |
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Applying pkt on nf0 at 1: |
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Applying pkt on nf1 at 2: |
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Applying pkt on nf2 at 3: |
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Applying pkt on nf3 at 4: |
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nf0_applied times: [1] |
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nf1_applied times: [2] |
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nf2_applied times: [3] |
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nf3_applied times: [4] |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
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sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
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Xilinx SDNet Compiler version 2018.2, build 2342300 |
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|
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Compilation successful |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_externs.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ ./testdata/ ./sw/ --base_address 0x44020000 |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_API.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_CLI.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' |
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cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API |
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cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API |
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cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' |
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# The following command only applies if running P4_SWITCH Questa Simulation with Ubuntu |
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sed -i 's/vsim/vsim \-ldflags \"\-B\/usr\/lib\/x86\_64\-linux-gnu\"/g' nf_sume_sdnet_ip/SimpleSumeSwitch/questa.bash |
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# modify the P4_SWITCH_tb so that it writes the table configuration writes to a file |
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/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/modify_P4_SWITCH_tb.py nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv |
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# Fix introduced for SDNet 2017.4 |
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sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash |
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sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
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# Fix introduced for SDNet 2018.2 |
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sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
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sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
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cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ |
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cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ |
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cp testdata/*.axi nf_sume_sdnet_ip/SimpleSumeSwitch/ |
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+ date |
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Mit Jul 24 22:58:13 CEST 2019 |
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+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch |
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+ ./vivado_sim.bash |
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+ find -name '*.v' -o -name '*.vp' -o -name '*.sv' |
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+ xargs -I % /opt/Xilinx/Vivado/2018.2/bin/xvlog -sv % |
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INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.v" into library work |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t |
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INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.vp" into library work |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_Engine |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_realmain_lookup_table_0_req_lookup_request_key |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_local_state_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_1 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_2 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_task |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_ingress_port |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_sume_metadata_dst_port |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_table_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_task |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_ingress_port |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_sume_metadata_dst_port |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_src_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_dst_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_version |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ihl |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_diff_serv |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ecn |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_totalLen |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_identification |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_flags |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_fragOffset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ttl |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_protocol |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_src_addr |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_dst_addr |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ethernet_ethertype |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_checksum |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv6_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_3 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_4 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_TopPipe_fl_realmain_tmp_2 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_TopPipe_fl_realmain_tmp_2 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_5 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_realmain_lookup_table_0_req_lookup_request_key |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_local_state_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_6 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_realmain_lookup_table_0_req_lookup_request_key |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_local_state_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_7 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_ipv4_protocol |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_switch_task |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_chk_icmp |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_na_ns_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_option_link_layer_addr_isValid |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_8 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_9 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_type |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_code |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_10 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_local_state_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_11 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_type |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_code |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_local_state_id |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_increment_offset |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_12 |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_nextSection |
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INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_increment_offset |
@ -0,0 +1,49 @@
|
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+ date |
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Mit Jul 24 23:04:49 CEST 2019 |
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+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
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+ make |
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make -C src/ clean |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
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make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
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make -C testdata/ clean |
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make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,49 @@
|
||||
+ date |
||||
Mit Jul 24 23:06:01 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,26 @@
|
||||
+ date |
||||
Mit Jul 24 23:08:23 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
minip4_solution.p4(146): error: Could not find declaration for stupid |
||||
stupid(); |
||||
^^^^^^ |
||||
Makefile:34: recipe for target 'all' failed |
||||
make[1]: *** [all] Error 1 |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
Makefile:31: recipe for target 'frontend' failed |
||||
make: *** [frontend] Error 2 |
@ -0,0 +1,49 @@
|
||||
+ date |
||||
Mit Jul 24 23:09:11 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,77 @@
|
||||
+ date |
||||
Mit Jul 24 23:09:59 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
||||
Compilation successful |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_externs.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ ./testdata/ ./sw/ --base_address 0x44020000 |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_API.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_CLI.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000 |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' |
||||
cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API |
||||
cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API |
||||
cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI' |
||||
# The following command only applies if running P4_SWITCH Questa Simulation with Ubuntu |
||||
sed -i 's/vsim/vsim \-ldflags \"\-B\/usr\/lib\/x86\_64\-linux-gnu\"/g' nf_sume_sdnet_ip/SimpleSumeSwitch/questa.bash |
||||
# modify the P4_SWITCH_tb so that it writes the table configuration writes to a file |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/modify_P4_SWITCH_tb.py nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv |
||||
# Fix introduced for SDNet 2017.4 |
||||
sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash |
||||
sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
||||
# Fix introduced for SDNet 2018.2 |
||||
sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
||||
sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash |
||||
cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/ |
||||
cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/ |
||||
cp testdata/*.axi nf_sume_sdnet_ip/SimpleSumeSwitch/ |
||||
+ date |
||||
Mit Jul 24 23:10:05 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch |
||||
+ ./vivado_sim.bash |
||||
+ find -name '*.v' -o -name '*.vp' -o -name '*.sv' |
||||
+ xargs -I % /opt/Xilinx/Vivado/2018.2/bin/xvlog -sv % |
@ -0,0 +1,49 @@
|
||||
+ date |
||||
Mit Jul 24 23:11:02 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f ./nf_sume_sdnet_ip/SimpleSumeSwitch/xvlog.log |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,49 @@
|
||||
+ date |
||||
Mit Jul 24 23:14:59 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,49 @@
|
||||
+ date |
||||
Mit Jul 24 23:16:04 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
actions_egress.p4(52): warning: Table v6_networks is not used; removing |
||||
table v6_networks { |
||||
^^^^^^^^^^^ |
||||
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing |
||||
table nat46 { |
||||
^^^^^ |
||||
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates |
||||
out metadata meta, |
||||
^^^^ |
||||
minip4_solution.p4(39) |
||||
parser RealParser( |
||||
^^^^^^^^^^ |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
./gen_testdata.py |
||||
Applying pkt on nf0 at 1: |
||||
Applying pkt on nf1 at 2: |
||||
Applying pkt on nf2 at 3: |
||||
Applying pkt on nf3 at 4: |
||||
nf0_applied times: [1] |
||||
nf1_applied times: [2] |
||||
nf2_applied times: [3] |
||||
nf3_applied times: [4] |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap |
||||
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts |
||||
Xilinx SDNet Compiler version 2018.2, build 2342300 |
||||
|
@ -0,0 +1,59 @@
|
||||
+ date |
||||
Mit Jul 24 23:26:01 CEST 2019 |
||||
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4 |
||||
+ make |
||||
make -C src/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
rm -f *.sdnet *.tbl .sdnet_switch_info.dat |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
make -C testdata/ clean |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata' |
||||
rm -rf nf_sume_sdnet_ip/ |
||||
rm -f |
||||
rm -f sw/config_tables.c |
||||
make -C src/ |
||||
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4 |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
minip4_solution.p4(149): error: Could not find declaration for tmp17 |
||||
delta_prepare (); tmp17 = (bit<17>) hdr.udp.checksum + (bit<17>) meta.v4sum; if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } tmp17 = tmp17 + (bit<17>) (0xffff - meta.v6sum); if (tmp17[16:16] == 1) { tmp17 = tmp17 + 1; tmp17[16:16] = 0; } hdr.udp.checksum = (bit<16>) tmp17; |
||||
^^^^^ |
||||
Makefile:34: recipe for target 'all' failed |
||||
make[1]: *** [all] Error 1 |
||||
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src' |
||||
Makefile:31: recipe for target 'frontend' failed |
||||
make: *** [frontend] Error 2 |
File diff suppressed because it is too large
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