master-thesis/doc/Abstract.tex
Nico Schottelius 38c3b9f850 include pdfs instead of png
Signed-off-by: Nico Schottelius <nico@nico-notebook.schottelius.org>
2019-08-21 09:44:17 +02:00

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1.7 KiB
TeX

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\begin{center}\textbf{Abstract}\end{center}
Due to the lack of IPv4 addresses, IPv6 deployments have recently
gained in importance in the Internet.
Several transition mechanisms exist that include
translating IPv6 packets into IPv4 packets,
thus enabling the coexistence and interoperability of both protocols.
This thesis describes an implementation of the translation mechanism
NAT64, implemented in P4. Using the P4 programming language
a software emulated switch was created that translates IPv4 to IPv6 and vice versa.
Due to the target independence of P4 the same code can be compiled
for and deployed to the FPGA hardware platform ``NetFPGA''.
Within the NetFPGA the NAT64 implementation achieves a stable throughput of
9.28 Gigabit/s. Our solution allows in-network translations without a
router or client configurations. Due to the nature of P4, the
implementation runs at line speed and thus with different hardware
the same code can run potentially at much higher speeds,
for instance on 100 Gbit/s switches.
%% P4. P4 is protocol and target independent and allo
%% P4 is a protocol independent programming language that allows programming network
%% However even IPv6 only network
%% deployments usually need connectivity towards the legacy IP (IPv4)
%% networks. To allow legacy IP and IPv6 devices to communicate with each
%% other a transition mechanism named ``NAT64'' is usually
%% deployed. However NAT64 solutions in software often don't reach line
%% rate. Programmable switches offer a possibility to implement NAT64 in
%% the network. This master thesis shows the design, feasibility and
%% scalability of NAT64 on programmable switches.
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