master-thesis/p4src/minip4_solution.p4
2019-07-24 11:22:32 +02:00

158 lines
3.4 KiB
Text

#include <core.p4>
#include <sume_switch.p4>
#include "headers.p4"
typedef bit<48> EthAddr_t;
header Ethernet_h {
EthAddr_t dstAddr;
EthAddr_t srcAddr;
bit<16> etherType;
}
struct Parsed_packet {
Ethernet_h ethernet;
}
// user defined metadata: can be used to share information between
// TopParser, TopPipe, and TopDeparser
struct user_metadata_t {
bit<8> unused;
}
// digest_data, MUST be 256 bits -- what is this used for?
struct digest_data_t {
bit<256> unused;
}
/********************************************************************************
* Parser
*/
parser RealParser(
packet_in packet,
out Parsed_packet hdr,
out user_metadata_t meta,
out digest_data_t digest_data,
inout sume_metadata_t standard_metadata) {
state start {
packet.extract(hdr.ethernet);
meta.unused = 0;
digest_data.unused = 0;
transition accept;
}
}
@Xilinx_MaxPacketRegion(1024)
parser TopParser(
packet_in b,
out Parsed_packet p,
out user_metadata_t user_metadata,
out digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
RealParser() realparser;
state start {
realparser.apply(b, p, user_metadata, digest_data, sume_metadata);
transition accept;
}
}
/********************************************************************************
* Main
*/
control RealMain(
inout Parsed_packet hdr,
inout user_metadata_t meta,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
action swap_eth_addresses() {
EthAddr_t temp = hdr.ethernet.dstAddr;
hdr.ethernet.dstAddr = hdr.ethernet.srcAddr;
hdr.ethernet.srcAddr = temp;
/* set egress port */
sume_metadata.dst_port = sume_metadata.src_port;
}
action send_to_port1() {
sume_metadata.dst_port = 1;
}
action send_to_all_ports() {
/* Taken from commands.txt of the "int" project:
table_cam_add_entry forward set_output_port 0xffffffffffff => 0b01010101
python convert:
>>> 0b01010101
85
*/
sume_metadata.dst_port = 85;
}
action do_nothing() {
EthAddr_t temp = hdr.ethernet.dstAddr;
}
table lookup_table {
key = {
hdr.ethernet.dstAddr: exact;
}
actions = {
swap_eth_addresses;
do_nothing;
send_to_port1;
send_to_all_ports;
}
size = 64;
default_action = send_to_port1; // test_port1()
}
apply {
lookup_table.apply();
}
}
control TopPipe(
inout Parsed_packet p,
inout user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
RealMain() realmain;
apply {
realmain.apply(p, user_metadata, digest_data, sume_metadata);
}
}
/********************************************************************************
* Deparser
*/
@Xilinx_MaxPacketRegion(1024)
control TopDeparser(
packet_out b,
in Parsed_packet p,
in user_metadata_t user_metadata,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
apply {
b.emit(p.ethernet);
}
}
/********************************************************************************
* Switch
*/
SimpleSumeSwitch(
TopParser(),
TopPipe(),
TopDeparser()
) main;