master-thesis/p4src/netpfga_dummy.p4
2019-07-29 16:35:05 +02:00

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624 B
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#ifndef DUMMY_NETPFGA
#define DUMMY_NETPFGA
action send_to_port1() {
sume_metadata.dst_port = 1;
// sume_metadata.dst_port = 16;
}
action select_port_by_type() {
/*
>>> 0x86dd >> 11 v6
16
>>> 0x0800 >> 11 v4
1
>>> 0x0806 >> 11 ARP
1
*/
sume_metadata.dst_port = (bit<8>) (hdr.ethernet.ethertype >> 11);
}
table dummy_table_for_netpfga {
key = {
hdr.ethernet.ethertype: exact;
}
actions = {
send_to_port1;
select_port_by_type;
set_egress_port;
}
size = 64;
default_action = select_port_by_type; //send_to_port1;
}
#endif