163 lines
4.6 KiB
Tcl
163 lines
4.6 KiB
Tcl
#
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# Copyright (c) 2015 Noa Zilberman
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# All rights reserved.
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#
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# This software was developed by Stanford University and the University of Cambridge Computer Laboratory
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# under National Science Foundation under Grant No. CNS-0855268,
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# the University of Cambridge Computer Laboratory under EPSRC INTERNET Project EP/H040536/1 and
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# by the University of Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249 ("MRC2"),
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# as part of the DARPA MRC research programme.
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#
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# @NETFPGA_LICENSE_HEADER_START@
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#
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# Licensed to NetFPGA C.I.C. (NetFPGA) under one or more contributor
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# license agreements. See the NOTICE file distributed with this work for
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# additional information regarding copyright ownership. NetFPGA licenses this
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# file to you under the NetFPGA Hardware-Software License, Version 1.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at:
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#
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# http://www.netfpga-cic.org
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#
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# Unless required by applicable law or agreed to in writing, Work distributed
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# under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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# CONDITIONS OF ANY KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations under the License.
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#
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# @NETFPGA_LICENSE_HEADER_END@
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#
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######################
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#MICROBLAZE Section #
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######################
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# MICROBLAZE_AXI_IIC base address and size
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set MICROBLAZE_AXI_IIC_BASEADDR 0x40800000
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set MICROBLAZE_AXI_IIC_HIGHADDR 0x4080FFFF
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set MICROBLAZE_AXI_IIC_SIZEADDR 0x10000
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# MICROBLAZE_UARTLITE base address and size
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set MICROBLAZE_UARTLITE_BASEADDR 0x40600000
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set MICROBLAZE_UARTLITE_HIGHADDR 0x4060FFFF
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set MICROBLAZE_UARTLITE_SIZEADDR 0x10000
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# MICROBLAZE_DLMB_BRAM base address and size
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set MICROBLAZE_DLMB_BRAM_BASEADDR 0x00000000
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set MICROBLAZE_DLMB_BRAM_HIGHADDR 0x0000FFFF
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set MICROBLAZE_DLMB_BRAM_SIZEADDR 0x10000
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# MICROBLAZE_UARTLITE base address and size
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set MICROBLAZE_ILMB_BRAM_BASEADDR 0x00000000
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set MICROBLAZE_ILMB_BRAM_HIGHADDR 0x0000FFFF
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set MICROBLAZE_ILMB_BRAM_SIZEADDR 0x10000
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# MICROBLAZE_AXI_INTC base address and size
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set MICROBLAZE_AXI_INTC_BASEADDR 0x41200000
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set MICROBLAZE_AXI_INTC_HIGHADDR 0x4120FFFF
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set MICROBLAZE_AXI_INTC_SIZEADDR 0x10000
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#######################
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# Segments Assignment #
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#######################
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#M00
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set M00_BASEADDR 0x44000000
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set M00_HIGHADDR 0x44000FFF
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set M00_SIZEADDR 0x1000
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#M01
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set M01_BASEADDR 0x44010000
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set M01_HIGHADDR 0x44010FFF
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set M01_SIZEADDR 0x1000
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#M02
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set M02_BASEADDR 0x44020000
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set M02_HIGHADDR 0x44020FFF
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set M02_SIZEADDR 0x1000
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#M03
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set M03_BASEADDR 0x44030000
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set M03_HIGHADDR 0x44030FFF
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set M03_SIZEADDR 0x1000
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#M04
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set M04_BASEADDR 0x44040000
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set M04_HIGHADDR 0x44040FFF
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set M04_SIZEADDR 0x1000
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#M05
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set M05_BASEADDR 0x44050000
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set M05_HIGHADDR 0x44050FFF
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set M05_SIZEADDR 0x1000
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#M06
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set M06_BASEADDR 0x44060000
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set M06_HIGHADDR 0x44060FFF
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set M06_SIZEADDR 0x1000
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#M07
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set M07_BASEADDR 0x44070000
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set M07_HIGHADDR 0x44070FFF
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set M07_SIZEADDR 0x1000
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#M08
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set M08_BASEADDR 0x44080000
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set M08_HIGHADDR 0x44080FFF
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set M08_SIZEADDR 0x1000
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#######################
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# IP_ASSIGNMENT #
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#######################
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# Note that physical connectivity must match this mapping
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#IDENTIFIER base address and size
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set IDENTIFIER_BASEADDR $M00_BASEADDR
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set IDENTIFIER_HIGHADDR $M00_HIGHADDR
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set IDENTIFIER_SIZEADDR $M00_SIZEADDR
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#INPUT ARBITER base address and size
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set INPUT_ARBITER_BASEADDR $M01_BASEADDR
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set INPUT_ARBITER_HIGHADDR $M01_HIGHADDR
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set INPUT_ARBITER_SIZEADDR $M01_SIZEADDR
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#OUTPUT_QUEUES base address and size
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set OUTPUT_QUEUES_BASEADDR $M03_BASEADDR
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set OUTPUT_QUEUES_HIGHADDR $M03_HIGHADDR
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set OUTPUT_QUEUES_SIZEADDR $M03_SIZEADDR
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#OUPUT_PORT_LOOKUP base address and size
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set OUTPUT_PORT_LOOKUP_BASEADDR $M02_BASEADDR
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set OUTPUT_PORT_LOOKUP_HIGHADDR $M02_HIGHADDR
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set OUTPUT_PORT_LOOKUP_SIZEADDR $M02_SIZEADDR
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#SFP Port 0 base address and size
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set NF_10G_INTERFACE0_BASEADDR $M04_BASEADDR
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set NF_10G_INTERFACE0_HIGHADDR $M04_HIGHADDR
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set NF_10G_INTERFACE0_SIZEADDR $M04_SIZEADDR
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#SFP Port 1 base address and size
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set NF_10G_INTERFACE1_BASEADDR $M05_BASEADDR
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set NF_10G_INTERFACE1_HIGHADDR $M05_HIGHADDR
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set NF_10G_INTERFACE1_SIZEADDR $M05_SIZEADDR
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#SFP Port 2 base address and size
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set NF_10G_INTERFACE2_BASEADDR $M06_BASEADDR
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set NF_10G_INTERFACE2_HIGHADDR $M06_HIGHADDR
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set NF_10G_INTERFACE2_SIZEADDR $M06_SIZEADDR
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#SFP Port 3 base address and size
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set NF_10G_INTERFACE3_BASEADDR $M07_BASEADDR
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set NF_10G_INTERFACE3_HIGHADDR $M07_HIGHADDR
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set NF_10G_INTERFACE3_SIZEADDR $M07_SIZEADDR
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#RIFFA base address and size
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set NF_RIFFA_DMA_BASEADDR $M08_BASEADDR
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set NF_RIFFA_DMA_HIGHADDR $M08_HIGHADDR
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set NF_RIFFA_DMA_SIZEADDR $M08_SIZEADDR
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