master-thesis/netpfga/log/compile-2019-07-24-225806-ipv6-ready-6.5
Nico Schottelius fa28b46285 +logs
2019-07-24 23:30:57 +02:00

193 lines
16 KiB
Groff

+ date
Mit Jul 24 22:58:06 CEST 2019
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4
+ make
make -C src/ clean
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
rm -f *.sdnet *.tbl .sdnet_switch_info.dat
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
make -C testdata/ clean
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
rm -f *.pcap *.txt *.pyc *.axi config_writes.* *_reg_defines.py
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
rm -rf nf_sume_sdnet_ip/
rm -f
rm -f sw/config_tables.c
make -C src/
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
p4c-sdnet -o minip4.sdnet --sdnet_info .sdnet_switch_info.dat minip4_solution.p4
actions_egress.p4(52): warning: Table v6_networks is not used; removing
table v6_networks {
^^^^^^^^^^^
actions_nat64_generic.p4(178): warning: Table nat46 is not used; removing
table nat46 {
^^^^^
minip4_solution.p4(42): [--Wwarn=uninitialized_out_param] warning: out parameter meta may be uninitialized when RealParser terminates
out metadata meta,
^^^^
minip4_solution.p4(39)
parser RealParser(
^^^^^^^^^^
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/p4_px_tables.py commands.txt .sdnet_switch_info.dat
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/src'
make -C testdata/
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
./gen_testdata.py
Applying pkt on nf0 at 1:
Applying pkt on nf1 at 2:
Applying pkt on nf2 at 3:
Applying pkt on nf3 at 4:
nf0_applied times: [1]
nf1_applied times: [2]
nf2_applied times: [3]
nf3_applied times: [4]
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_in.axi --bus_width 256 src.pcap
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/pcap2axi --output Packet_expect.axi --bus_width 256 dst.pcap
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/testdata'
sdnet ./src/minip4.sdnet -skipEval -busType axi -busWidth 256 -singlecontrolport -workDir nf_sume_sdnet_ip -altVivadoScripts
Xilinx SDNet Compiler version 2018.2, build 2342300
Compilation successful
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_externs.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ ./testdata/ ./sw/ --base_address 0x44020000
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_API.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/gen_P4_SWITCH_CLI.py src/.sdnet_switch_info.dat nf_sume_sdnet_ip/SimpleSumeSwitch/ sw/ /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/templates/ --base_address 0x44020000
make[1]: Entering directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI'
cc -c -fPIC /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API/CAM.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API
cc -std=c99 -Wall -Werror -fPIC -c libcam.c -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -I/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/API
cc -L/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/sw/sume -shared -o libcam.so libcam.o CAM.o -lsumereg
make[1]: Leaving directory '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/sw/CLI'
# The following command only applies if running P4_SWITCH Questa Simulation with Ubuntu
sed -i 's/vsim/vsim \-ldflags \"\-B\/usr\/lib\/x86\_64\-linux-gnu\"/g' nf_sume_sdnet_ip/SimpleSumeSwitch/questa.bash
# modify the P4_SWITCH_tb so that it writes the table configuration writes to a file
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/bin/modify_P4_SWITCH_tb.py nf_sume_sdnet_ip/SimpleSumeSwitch/Testbench/SimpleSumeSwitch_tb.sv
# Fix introduced for SDNet 2017.4
sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim.bash
sed -i 's/xsim\.dir\/xsc\/dpi\.so/dpi\.so/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash
# Fix introduced for SDNet 2018.2
sed -i 's/glbl_sim/glbl/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash
sed -i 's/SimpleSumeSwitch_tb_sim#work.glbl/SimpleSumeSwitch_tb/g' nf_sume_sdnet_ip/SimpleSumeSwitch/vivado_sim_waveform.bash
cp src/*.tbl nf_sume_sdnet_ip/SimpleSumeSwitch/
cp testdata/*.txt nf_sume_sdnet_ip/SimpleSumeSwitch/
cp testdata/*.axi nf_sume_sdnet_ip/SimpleSumeSwitch/
+ date
Mit Jul 24 22:58:13 CEST 2019
+ cd /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch
+ ./vivado_sim.bash
+ find -name '*.v' -o -name '*.vp' -o -name '*.sv'
+ xargs -I % /opt/Xilinx/Vivado/2018.2/bin/xvlog -sv %
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.v" into library work
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t
INFO: [VRFC 10-2263] Analyzing SystemVerilog file "/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/nf_sume_sdnet_ip/SimpleSumeSwitch/TopPipe_lvl_0_t.HDL/TopPipe_lvl_0_t.vp" into library work
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_Engine
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_realmain_lookup_table_0_req_lookup_request_key
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_local_state_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_4_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_1
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_0_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_2
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_NoAction_3_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_task
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_user_metadata_ingress_port
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_sume_metadata_dst_port
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_2_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_table_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_task
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_user_metadata_ingress_port
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_sume_metadata_dst_port
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_controller_debug_table_id_2_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_src_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_TopPipe_fl_realmain_dst_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_version
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ihl
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_diff_serv
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ecn
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_totalLen
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_identification
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_flags
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_fragOffset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_ttl
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_protocol
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_src_addr
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_dst_addr
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ethernet_ethertype
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv4_checksum
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_p_ipv6_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_static_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_3
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_3_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_4
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_TopPipe_fl_realmain_tmp_2
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_0_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_TopPipe_fl_realmain_tmp_2
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_5
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_realmain_lookup_table_0_req_lookup_request_key
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_local_state_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_2_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_6
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_realmain_lookup_table_0_req_lookup_request_key
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_local_state_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_1_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_7
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_ipv4_protocol
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_switch_task
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_user_metadata_chk_icmp
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_na_ns_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_p_icmp6_option_link_layer_addr_isValid
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_realmain_nat64_icmp6_generic_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_8
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_0_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_9
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_type
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_p_icmp_code
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_1_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_10
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_local_state_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_condition_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_11
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_type
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_p_icmp_code
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_realmain_v4_networks_0_req_lookup_request_key_0
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_local_state_id
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_act_2_sec_compute_control_increment_offset
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_EngineStage_12
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_nextSection
INFO: [VRFC 10-311] analyzing module TopPipe_lvl_0_t_local_end_compute_control_increment_offset