master-thesis/p4src/minip4_solution-nat64.p4

96 lines
2.6 KiB
Text
Raw Normal View History

2019-07-10 20:28:37 +00:00
#include <core.p4>
#include <sume_switch.p4>
#include "headers.p4"
#include "settings.p4"
/********************************************************************************
* Possible bugs / things to fix:
- Does NoAction exist?
- Aligment of "meta" / replace metadate with our own
- what does sume_metadata contain? ingress port is where?
nico@nsg-System:~$ find . -name sume_switch.p4
./master-thesis/support/semester-thesis-1/project/SSS_example_2_SS/bitsnpices/sume_switch.p4
nico@nsg-System:~$
/******************** INFO ONLY *************************/
// one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
// typedef bit<8> port_t;
/* standard sume switch metadata */
// struct sume_metadata_t {
// bit<16> dma_q_size; // measured in 32-byte words
// bit<16> nf3_q_size; // measured in 32-byte words
// bit<16> nf2_q_size; // measured in 32-byte words
// bit<16> nf1_q_size; // measured in 32-byte words
// bit<16> nf0_q_size; // measured in 32-byte words
// bit<8> send_dig_to_cpu; // send digest_data to CPU
// bit<8> drop;
// port_t dst_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
// port_t src_port; // one-hot encoded: {DMA, NF3, DMA, NF2, DMA, NF1, DMA, NF0}
// bit<16> pkt_len; // unsigned int
// }
/********************************************************************************
* Header
*/
// digest_data, MUST be 256 bits -- not used by us
struct digest_data_t {
bit<256> unused;
}
@Xilinx_MaxPacketRegion(1024)
parser TopParser(packet_in packet,
out headers hdr,
out metadata meta,
out digest_data_t digest_data,
inout sume_metadata_t standard_metadata) {
#include "parsers.p4"
}
/********************************************************************************
* Main
*/
2019-07-10 20:36:34 +00:00
control TopPipe(inout headers hdr,
2019-07-10 20:28:37 +00:00
inout metadata meta,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
#include "netpfga.p4"
2019-07-10 20:28:37 +00:00
apply {
2019-07-10 20:47:52 +00:00
dummy_table_for_netpfga.apply();
2019-07-10 20:28:37 +00:00
}
}
/********************************************************************************
* Deparser
*/
@Xilinx_MaxPacketRegion(1024)
control TopDeparser(packet_out packet,
in headers hdr,
in metadata meta,
inout digest_data_t digest_data,
inout sume_metadata_t sume_metadata) {
#include "deparser.p4"
}
/********************************************************************************
* Switch
*/
SimpleSumeSwitch(
TopParser(),
TopPipe(),
TopDeparser()
) main;