Rewrite the netpfga p4 program
Nico Schottelius
4 years ago
parent
fb37c96a3b
commit
6e162ca63b
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minip4_solution-mirror.p4
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#include <core.p4>
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#include <sume_switch.p4>
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#include "headers.p4"
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/********************************************************************************
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* Header
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*/
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typedef bit<48> EthAddr_t;
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header Ethernet_h {
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EthAddr_t dstAddr;
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EthAddr_t srcAddr;
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bit<16> etherType;
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}
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struct Parsed_packet {
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Ethernet_h ethernet;
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}
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// user defined metadata: can be used to share information between
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// TopParser, TopPipe, and TopDeparser
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struct user_metadata_t {
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bit<8> unused;
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}
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// digest_data, MUST be 256 bits -- what is this used for?
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struct digest_data_t {
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bit<256> unused;
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}
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/********************************************************************************
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* Parser
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*/
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@Xilinx_MaxPacketRegion(1024)
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parser TopParser(packet_in b,
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out Parsed_packet p,
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out user_metadata_t user_metadata,
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out digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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state start {
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b.extract(p.ethernet);
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user_metadata.unused = 0;
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digest_data.unused = 0;
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transition accept;
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}
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}
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/********************************************************************************
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* Main
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*/
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control TopPipe(inout Parsed_packet p,
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inout user_metadata_t user_metadata,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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action swap_eth_addresses() {
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EthAddr_t temp = p.ethernet.dstAddr;
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p.ethernet.dstAddr = p.ethernet.srcAddr;
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p.ethernet.srcAddr = temp;
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/* set egress port */
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sume_metadata.dst_port = sume_metadata.src_port;
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}
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action send_to_port1() {
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sume_metadata.dst_port = 1;
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}
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action send_to_all_ports() {
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/* Taken from commands.txt of the "int" project:
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table_cam_add_entry forward set_output_port 0xffffffffffff => 0b01010101
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python convert:
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>>> 0b01010101
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85
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*/
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sume_metadata.dst_port = 85;
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}
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action do_nothing() {
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EthAddr_t temp = p.ethernet.dstAddr;
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}
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table lookup_table {
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key = {
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p.ethernet.dstAddr: exact;
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}
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actions = {
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swap_eth_addresses;
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do_nothing;
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send_to_port1;
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send_to_all_ports;
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}
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size = 64;
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// default_action = swap_eth_addresses; // test_mirror(): in gen_testdata.py
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default_action = send_to_port1; // test_port1()
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// default_action = send_to_all_ports; // test_allports():
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}
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apply {
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lookup_table.apply();
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}
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}
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/********************************************************************************
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* Deparser
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*/
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@Xilinx_MaxPacketRegion(1024)
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control TopDeparser(packet_out b,
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in Parsed_packet p,
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in user_metadata_t user_metadata,
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inout digest_data_t digest_data,
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inout sume_metadata_t sume_metadata) {
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apply {
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b.emit(p.ethernet);
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}
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}
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/********************************************************************************
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* Switch
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*/
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SimpleSumeSwitch(
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TopParser(),
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TopPipe(),
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TopDeparser()
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) main;
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