+notes -comment

This commit is contained in:
Nico Schottelius 2019-07-21 16:39:15 +02:00
parent 71404d9a58
commit d97864ffa7
2 changed files with 42 additions and 18 deletions

View File

@ -5925,8 +5925,26 @@ nf3_applied times: []
Should that not be [1] and then [3]?
--------> same packet / object!!!!!!!!!!
**** DONE try7: compile run output after ca. 1.5h
CLOSED: [2019-07-21 Sun 16:38]
#+BEGIN_CENTER
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/ip_repo'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2018.2/data/ip'.
WARNING: [IP_Flow 19-3664] IP 'bd_7ad4_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-26302-nsg-System/coregen/bd_7ad4_xpcs_0_1/elaborate/configure_gt.tcl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'bd_a1aa_xpcs_0' generated file not found '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/.Xil/Vivado-26302-nsg-System/coregen/bd_a1aa_xpcs_0_2/elaborate/configure_gt.tcl'. Please regenerate to continue.
open_project: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 1365.715 ; gain = 188.977 ; free physical = 9396 ; free virtual = 15104
# puts "\nOpening $design Implementation design\n"
Opening simple_sume_switch Implementation design
# open_run impl_1
ERROR: [Common 17-69] Command failed: Run 'impl_1' has not been launched. Unable to open
Vivado%
#+END_CENTER
**** TODO try8: use new script generating different sequences/objects in gen_testdata
*** TODO Further notes P4/master thesis
- Cannot easily run P4 on notebook - changes to the system very
invasive
@ -5941,6 +5959,11 @@ nico@nsg-System:~/master-thesis/netpfga/log$ ls -alh /home/nico/projects/P4-Net
ls: cannot access '/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/synth/runme.log': No such file or directory
- even "short" compile runs taking 30m+
control_sub_m02_data_fifo_0_synth_1: /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log
nico@nsg-System:~/master-thesis/netpfga/minip4/testdata$ less /home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log
/home/nico/projects/P4-NetFPGA/contrib-projects/sume-sdnet-switch/projects/minip4/simple_sume_switch/hw/project/simple_sume_switch.runs/control_sub_m02_data_fifo_0_synth_1/runme.log: No such file or directory
** The NetPFGA saga
Problems encountered:
- The logfile for a compile run is 10k+ lines

View File

@ -1,10 +1,14 @@
#!/usr/bin/env python
# from switch_calc_headers import *
from scapy.all import *
from nf_sim_tools import *
from collections import OrderedDict
import sss_sdnet_tuples
########################
# pkt generation tools #
########################
pktsApplied = []
pktsExpected = []
@ -39,11 +43,11 @@ nf_id_map = {
sss_sdnet_tuples.clear_tuple_files()
def applyPkt(pkt, ingress, time):
print("Applying pkt on {} at {}: ".format(ingress, time))
pktsApplied.append(pkt)
sss_sdnet_tuples.sume_tuple_in['src_port'] = nf_port_map[ingress]
sss_sdnet_tuples.sume_tuple_expect['src_port'] = nf_port_map[ingress]
pkt.time = time
print("apply packet on {} at {}: {}".format(ingress, time, pkt.__repr__()))
nf_applied[nf_id_map[ingress]].append(pkt)
def expPkt(pkt, egress):
@ -57,8 +61,6 @@ def expPkt(pkt, egress):
nf_expected[1].append(pkt)
nf_expected[2].append(pkt)
nf_expected[3].append(pkt)
print("exppkt packet on {}: {}".format(egress, pkt.__repr__()))
def print_summary(pkts):
for pkt in pkts:
@ -76,6 +78,7 @@ def write_pcap_files():
if (len(nf_expected[i]) > 0):
wrpcap('nf{0}_expected.pcap'.format(i), nf_expected[i])
# i = 0..3
for i in nf_applied.keys():
print "nf{0}_applied times: ".format(i), [p.time for p in nf_applied[i]]
@ -101,24 +104,22 @@ lookup_table = {
def test_port1():
""" packets for a certain mac always go to nf0 """
pktCnt = 0
pktCnt = 1
# First ethernet
pktCnt += 1
pkt = Ether(dst=MAC2, src=MAC1)
pkt = pad_pkt(pkt, 64)
applyPkt(pkt, 'nf0', pktCnt)
for inport in [ 'nf0', 'nf1', 'nf2', 'nf3' ]:
# Need to be regenerated, as object is modified above!
pkt = Ether(dst=MAC2, src=MAC1)
pkt = pad_pkt(pkt, 64)
pktCnt += 1
expPkt(pkt, 'nf0')
# Send on nf0..nf3
applyPkt(pkt, inport, pktCnt)
pktCnt += 1
applyPkt(pkt, 'nf1', pktCnt)
# Always receive on nf0 - also regenerate here!
pkt = Ether(dst=MAC2, src=MAC1)
pkt = pad_pkt(pkt, 64)
expPkt(pkt, 'nf0')
pktCnt += 1
expPkt(pkt, 'nf0')
pktCnt += 1
test_port1()
# don't write at the moment, just help debugging
# write_pcap_files()
write_pcap_files()